NSC CLC436AJP

N
Comlinear CLC436
200MHz, ±15V, Low-Power Voltage Feedback Op Amp
General Description
Features
The Comlinear CLC436 is a high-performance, low power,
voltage-feedback operational amplifier that has been designed
for a wide range of low-cost applications. The CLC436 is
specified to operate from dual ±5V to dual ±15V power supplies.
Operating from ±5V supplies, the unity gain stable CLC436
consumes a mere 23mW of power and features a 150MHz
bandwidth and 850V/µs slew rate. Operating from ±15V power
supplies, the CLC436 consumes only 69mW (Icc = 2.3mA) to
provide a 200MHz unity-gain bandwidth, a very fast 2400V/µs
slew rate and 13ns rise/fall times (5V step). At ±15V, the device
also provides large signal swings (>20Vpp) to give high dynamic
range and signal-to-noise ratio.
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■
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■
■
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Applications
■
■
■
The CLC436’s combination of low cost and high performance in
addition to its low-power voltage-feedback topology make it a
versatile signal conditioning building block for a wide range
of price-sensitive applications.
■
■
■
■
Video line driver
Video ADC driver
Desktop Multimedia
Low powered cable driver
Video DAC buffer
Active filters/integrators
NTSC & PAL video systems
Frequency Response (Av = +2V/V)
Vout = 0.5Vpp
Vcc = ±15V
RL = 1kΩ
Magnitude (1dB/div)
As a low-power NTSC or PAL video line-driver, the CLC436
delivers low differential gain and phase errors (0.2%, 1.2°) and
very high output drive current of 80mA. When used as a video
ADC driver, the CLC436 offers low Total Harmonic Distortion
(THD) and high Spurious Free Dynamic Range (SFDR).
Because of it’s voltage feedback topology, the CLC436
allows use of reactive elements in the feedback path and can
be configured as an excellent active filter for videoreconstruction DACs.
2.3mA supply current
200MHz unity-gain bandwidth
2400V/µs slew rate
Unity gain stable
110dB common-mode rejection ratio
80mA drive current
>20Vpp output swing
±5V to ±15V supplies
Comlinear CLC436
200MHz, ±15V, Low-Power Voltage Feedback Op Amp
August 1996
Bandpass Output
10
State-Variable Filter (1MHz, Q = 5, G = 2)
5
Magnitude (dB)
Typical Application
R3
R1
1326Ω
6631Ω
C
120pF
Vin
R4
3315Ω
CLC436
+
1326Ω
R
500Ω
-
R
CLC436
+
500Ω
© 1996 National Semiconductor Corporation
Printed in the U.S.A.
-10
-20
0.1
1
10
Frequency (MHz)
CLC436
+
Bandpass
Output
-5
-15
C
120pF
R2
0
Pinout
DIP & SOIC
Low-pass
Output
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CLC436 Electrical Characteristics
PARAMETERS
CONDITIONS
(Vcc = ±15V, Av = +2, Rf = 499W, RL = 1kW; unless specified)
Vcc
TYP
CLC436AJ
settling time to 0.05%
overshoot
slew rate
2V step, tr(in) = 5ns
5V step, tr(in) = 5ns
2V step, tr(in) = 5ns
2V step, tr(in) = 5ns
5V step, tr(in) = 5ns
±15, ±5
±15, ±5
UNITS NOTES
25°
25°
96,55
96,55
25
200,150
50
50
21
50
60
20
50
40
16
MHz
MHz
MHz
MHz
B
B
0.6
0
0.5
0.2
1.2
200,100
1.2
0.03
1.2
0.03
1.2
0.03
dB
dB
deg
%
deg
MHz
B
B
11
13
36,48
0.5
2400,850
13
16
42
1
2000
14
18
65
2
1900
18
20
85
2
1600
ns
ns
ns
%
V/µs
-72
-70
-65
-63
11
0.8
-65
-62
-56
-54
12.6
1.5
-62
-60
-56
-54
13.5
1.9
-62
-60
-53
-54
14.1
2.3
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
1.5,1.5
6
1,1.2
4
0.1,0.1
95
110
2.3
85,80
5
–
3
–
1
75
75
4
5
40
3
50
1
75
73
4
5
70
4
70
3
75
70
4
mV
µV/˚C
µA
nA/˚C
µA
dB
dB
mA
dB
20
3
4.0
±11
15
3
3.0
±10.5
10
5
2.5
±10
+8.5/-8.5
+12/-12
+8.5/-8.5
+12/-12
+8.5/-8.5
+12/-12
0.05
100
75
0.07
95
70
0.1
90
65
MΩ
pF
MΩ
V
V
V
V
V
V
Ω
mA
mA
FREQUENCY DOMAIN RESPONSE
±15, ±5
-3dB bandwidth
Vout < 0.5Vpp (AJP)
Vout < 0.5Vpp (AJE)
±15, ±5
Vout < 10Vpp
-3dB bandwidth AV = +1
Vout < 0.5Vpp, Rf = 0 ±15, ±5
gain flatness
Vout < 0.5Vpp
rolloff
DC to 20MHz
peaking
DC to 10MHz
linear phase deviation
DC to 10MHz
differential gain
4.43MHz, RL=150Ω
differential phase
4.43MHz, RL=150Ω
gain bandwidth product
Vout < 2.0Vpp
±15, ±5
TIME DOMAIN RESPONSE
rise and fall time
MIN/MAX RATINGS
DISTORTION AND NOISE RESPONSE
1Vpp, 1MHz
2nd harmonic distortion
3rd harmonic distortion
1Vpp, 1MHz
2nd harmonic distortion
1Vpp, 5MHz
3rd harmonic distortion
1Vpp, 5MHz
input voltage noise
@1kHz
current noise
@1kHz
STATIC DC PERFORMANCE
input offset voltage
average drift
input bias current
average drift
input offset current
power supply rejection ratio DC
common-mode rejection ratio DC
supply current
RL= ∞
open loop gain
±15, ±5
MISCELLANEOUS PERFORMANCE
input resistance
common-mode
input capacitance
common-mode
input resistance
differential-mode
input voltage range
common-mode
input voltage range
common-mode
output voltage range
RL = 100Ω
RL = ∞
output voltage range
RL = 100Ω
RL = ∞
output resistance, closed loop
output current sourcing
output current sinking
40
2
4.9
±15
±12
±5
±3
±15
+11.6/-10.5
±15
+13/-12.2
±5
±2.8
±5
±3.4
0.01
±15, ±5
120,90
±15, ±5
80,40
±15, ±5
±15, ±5
±15, ±5
0° to +70° -40° to +85°
B
B
A
A
A
B
A
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Absolute Maximum Ratings
supply voltage
maximum junction temperature
storage temperature range
lead temperature (soldering 10 sec)
Ordering Information
±18.0V
+150˚C
-65˚C to +150˚C
+260˚C
Model
Temperature Range
Description
-40˚C to +85˚C
-40˚C to +85˚C
8-pin PDIP
8-pin SOIC
CLC436AJP
CLC436AJE
Package Thermal Resistance
Notes
Package
A) J-level: spec is 100% tested at +25˚C, sample tested at +85˚C.
B) J-level: spec is sample tested at +25˚C.
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Plastic (AJP)
Surface Mount (AJE)
2
θJC
θJA
90°C/W
120°C/W
105°C/W
140°C/W
CLC436 Typical Performance Characteristics (Vcc = ±15V, Av = +2, Rf = 499
W,
Non-Inverting Frequency Response
Inverting Frequency Response
Frequency Response vs. Load
0
-90
Av = 5
-180
Av = 2
-270
Av = -1
-90
-270
100
1
10
-360
1
100
-450
10
100
Frequency (MHz)
Open Loop Gain and Phase
Magnitude (1dB/div)
-180
2Vpp
-270
CL=33pF
CL=100pF
CL=1000pF
+
-
499Ω
20
-90
1k
CL
0
499Ω
-450
10
1
100
Frequency (MHz)
10
-20
0.001
100
0.3
Magnitude (dB)
30
0.2
0.1
0
0
-0.1
-5
Gain
-0.2
-10
Phase
-0.3
20
-15
-0.4
300
500
700
-25
0
900
2
2nd Harmonic Distortion vs. Frequency
4
6
8
0
0.0001
10
0.1
0.001
0.01
0.1
1
10
Frequency (MHz)
Differential Gain and Phase
1.2
-40
RL = 100Ω
Vcc = ±5V
3.5
Vout = 2Vpp
RL = 1kΩ
Vcc = ±5V
-80
RL = 100Ω
Vcc = ±15V
Gain (%)
RL = 1kΩ
Vcc = ±15V
-50
Phase Neg
Sync
1.0
0.8
3.0
2.5
Phase Pos
Sync
Gain Neg
Sync
0.6
2.0
-60
RL = 1kΩ
Vcc = ±5V
-70
10
1
Frequency (MHz)
0.4
RL = 1kΩ
Vcc = ±15V
1.0
1
Small Signal Pulse Response
Vo = 5Vpp
3
4
PSRR and CMRR
Vo = 2Vpp
110
PSRR/CMRR (dB)
Output Voltage (0.5V/div)
2
Number of 150Ω Loads
Frequency (MHz)
Large Signal Pulse Response
1.5
Gain Pos
Sync
0.2
10
Phase (deg)
-60
Distortion (dBc)
RL = 100Ω
Vcc = ±5V
RL = 100Ω
Vcc = ±15V
Output Voltage (2V/div)
1
Current = 0.8pA/√Hz
3rd Harmonic Distortion vs. Frequency
-40
Time (20ns/div)
Voltage = 11nV/√Hz
10
Frequency (MHz)
Load Capacitance CL (pF)
Vout = 2Vpp
10
-20
-0.5
10
1000
Vout = 2Vpp
Phase (deg)
40
100
Frequency (MHz)
Voltage Noise (nV/√Hz)
1k
10
Current Noise pA/√Hz)
CL
499Ω
499Ω
1
100
0.4
Rs
-
50
0.1
Equivalent Input Noise
0.5
60
+
-180
0.01
Frequency (MHz)
Gain Flatness & Linear Phase
Recommended Rs vs. CL
CLC436
0
40
Rs
CLC436
-360
60
Gain (dB)
Magnitude (1dB/div)
0.5Vpp
80
CL=10pF
Phase (deg)
-90
Phase (deg)
0
1
Rs (Ω)
-270
100
5Vpp
Distortion (dBc)
-180
RL = 50Ω
RL = 50Ω
Frequency Response vs. CL
0.2Vpp
1
RL = 100Ω
RL = 100Ω
Av = 2V/V
-70
0
-90
Frequency (MHz)
Frequency Response vs. Vout
-50
RL = 1kΩ
-450
Frequency (MHz)
100
RL = 1kΩ
-360
Av = -5
-450
10
-180
Av = -2
-360
1
0
Av = -5
Magnitude (1dB/div)
Av = 1
Av = -1
Phase (deg)
Av = 2
Av = -2
Phase (deg)
Av = 1
Av = 5
Vout = 2Vpp
Magnitude (1dB/div)
Vout = 2Vpp
Phase (deg)
Magnitude (1dB/div)
Vout = 2Vpp
RL = 1kW; unless specified)
90
CMRR
70
PSRR
50
30
Time (20ns/div)
10
0.001
0.01
0.1
1
10
100
Frequency (MHz)
3
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CLC436 Typical Performance Characteristics (Vcc = ±15V, Av = +2, Rf = 499
W,
IBI, IOS, VIO vs. Temperature
AJP
0.4
AJE
0.2
2.5
2.0
IBI
1.0
VIO
0.8
1.5
0.6
1.0
0.4
0.5
0
20
40
60
80
100 120 140 160 180
-20
0
40
20
60
2.0
IOS
140
1.5
120
0.5
80
80
0
-10
Temperature (°C)
Ambient Temperature (°C)
1.0
IBI
100
0
-40
2.5
160
0.2
IOS
0
0
180
IBI (µA)
0.6
1.2
IBI, IOS (µA)
Offset Voltage VIO (mV)
0.8
Power (W)
IBI & IOS vs. Common Mode Input Voltage
3.0
IOS (nA)
Power Derating Curves
1.0
RL = 1kW; unless specified)
-5
0
5
10
Common Mode Input Voltage
CLC436 OPERATION
Description
The CLC436 is a unity gain stable voltage feedback
amplifier. The voltage feedback topology allows for
capacitors and nonlinear devices in the feedback path.
The matched input bias currents track well over
temperature. This allows the DC offset to be minimized
by matching the impedance seen by both inputs.
Output Drive Performance
The CLC436 can source over 120mA of output current.
It can easily drive 9Vpp into a 50Ω load. The circuit
shown in Figure 1 demonstrates the output current
capability of the CLC436. The circuit values listed
below, a 3Vpp input signal and ±15V supplies, were
used to obtain the result shown in Figure 2.
The low cost, low power, conventional topology, and
high output current make the CLC436 an excellent
choice for applications such as:
•
•
Rf = 499Ω
Rg = 249.5Ω
g
-
Vout (V)
Vo
20
0
0
-1
-20
-2
-40
-3
-60
-4
-80
-100
Single Supply Operation
The CLC436 can be operated from a single supply
using the topology shown in Figure 3. R1 and R2 form
a voltage divider that sets the non-inverting input
DC voltage. The coupling capacitor C1 isolates the
DC bias point from the previous stage. The DC gain
of this circuit is 1 and the high frequency gain is set by
Rf and Rg.
RL
6.8µF
-Vcc
Figure 1: Recommended Non-Inverting Gain Circuit
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40
1
The high output drive capability of the CLC436 is
suitable for driving capacitive loads. When driving a
capacitive load or coaxial cable, include a series
resistance Rs to improve stability. Refer to the Rs vs
Capacitive Load plot in the typical performance
section to determine the recommended resistance for
various capacitive loads.
0.1µF
Rg
60
2
Figure 2: Large Signal Pulse Response into 50W
0.1µF
Rf
80
Time (100ns/div)
6.8µF
CLC436
100
3
-5
+Vcc
Rin
Vin = 3Vpp
Vout = 9Vpp
4
Where Rf is the feedback resistor and Rg is the gain
setting resistor. Figure 1 shows the general noninverting gain configuration including the recommended
bypass capacitors.
+
p
5
Gain
The non-inverting and inverting gain equations for the
CLC436 are as follows:
R
Non-inverting Gain: 1 + f
Rg
R
Inverting Gain: − f
Rg
Vin
RL = 50Ω
Rin = 50Ω
Current (mA)
• Low Power Cable Drivers
• Active Filters
• Buffers
• NTSC and PAL Video Systems
•
•
4
1. Include 6.8µF tantalum and 0.01µF ceramic
bypass capacitors on both supplies.
2. Place the 6.8µF capacitors within 0.75 inches
of the power pins.
3. Place the 0.01µF capacitors within 0.1 inches
of the power pins.
4. Remove the ground plane near the input and
output pins to reduce parasitic capacitance.
5. Minimize all trace lengths to reduce series
inductances.
Vcc
Vcc
R1
Vin
+
C1
Vo
CLC436
R2
Rf
Rg
C2
Applications Circuit
Figure 3: Single Supply Circuit
State Variable Filter
The filter shown on the front page offers both a bandpass and a low pass output. The design equations are
shown below.
Power Dissipation
The power dissipation of an amplifier can be described
in two conditions:
• Quiescent Power Dissipation - PQ
•
Q=
(No Load Condition)
Total Power Dissipation - PT
(with Load Condition)
Av =
The following steps can be taken to determine the
power consumption of the CLC436:
fr =
1. Determine the quiescent power
PQ = Icc (Vcc - Vee)
2. Determine the RMS power at the output stage
PO = (Vcc - Vload) (Iload)
3. Determine the total RMS power
PT = PQ + PO
R1
, desired mid− band gain
R4
Q
, desired resonant frequency
2πR1C
R2 = R3
The state variable filter can be modified to obtain a
tunable band pass filter. This technique is shown in
the CLC522, Wideband Variable Gain Amplifier,
data sheet.
The maximum power that the package can dissipate at
a given temperature is illustrated in the Power Derating
plot in the Typical Performance Characteristics
section. The power derating curve for any package
can be derived by utilizing the following equation:
P=
R1
R3
Transimpedance Application
The low 1.1pA/√Hz input current noise and unity gain
stability make the CLC436 useful as a photo diode preamplifier. Figure 4 illustrates a transimpedance amplifier.
Rf sets the transimpedance gain. The photodiode current
is multiplied by Rf to determine the output voltage.
(175° − Tamb )
θ JA
Cf
where: Tamb = Ambient temperature in °C
θJA = Thermal resistance, from junction to
ambient, for a given package in °C/W
Rf
Photo Diode
Representation
Layout Considerations
A proper printed circuit layout is essential for achieving
high frequency performance. Comlinear provides evaluation boards for the CLC436 (730013 - DIP, 730027SOIC) and suggests their use as a guide for high
frequency layout and as an aid for device testing and
characterization.
Iin
Cd
-
Vo
CLC436
+
Vo = Iin*Rf
436 Fi 5
Figure 4: Transimpedance Amplifier
Supply bypassing is required for optimum performance.
The bypass capacitors provide a low impedance
current return path at the supply pins. They also provide
high frequency filtering on the power supply traces.
Other layout factors also play a major role in high
frequency performance. The following steps are
recommended as a basis for high frequency layout:
The feedback capacitor (Cf) is required to compensate
for the added input capacitance of the photodiode (Cd).
The feedback capacitance reduces peaking in the frequency response. As the value of the feedback capacitance increases from zero, the rolloff of the response
will increase.
5
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Comlinear CLC436
200MHz, ±15V, Low-Power Voltage Feedback Op Amp
Instrumentation Amplifier
An instrumentation circuit is shown in Figure 5. The
high CMRR of the CLC436 benefits this application.
The resistors are kept equal to improve the overall
CMRR.
R2
R1
Vin
C2
+
C1
Vo
CLC436
R3
-
V1
+
CLC436
500Ω
500Ω
500Ω
500Ω
CLC436
500Ω
CLC436
V2
Rf
50Ω
Vo = 3(V2-V1)
Rg
+
C2 =
500Ω
+
R1 500Ω
1
C
5 1
G = 1+
Rf
, desired mid− band gain
Rg
R1 = 2
Q
, where f = desired center frequency
GC1(2πf)
Figure 5: Instrumentation Amplifier
2nd Order Sallen-Key Band-Pass Filter
The CLC436 is well suited for Sallen-Key type active
filters. Figure 6 illustrates the band pass topology
and design equations. For optimum high frequency
performance:
R2 =
• Keep the resistor values between 10Ω and 1kΩ
• Keep the capacitor values between 10pF
R3 =
and 500pF
Begin design by choosing reasonable values for C1
and C2 and then setting the desired mid-band gain.
GR1 1 + 4.8Q2 − 2G + G2 + 1


4.8Q2 − 2G + G2
5GR1 1 + 4.8Q2 − 2G + G2 + G − 1


4Q 2
Figure 6: Sallen-Key Active Filter
Customer Design Applications Support
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National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018.
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of the president of National Semiconductor Corporation. As used herein:
1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or
sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its safety or effectiveness.
N
National Semiconductor
Corporation
National Semiconductor
Europe
National Semiconductor
Hong Kong Ltd.
National Semiconductor
Japan Ltd.
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
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circuitry and specifications.
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6
Lit #150436-004