HD74AC164/HD74ACT164 Serial-In, Parallel-Out Shift Register ADE-205-373 (Z) 1st. Edition Sep. 2000 Description The HD74AC164/HD74ACT164 is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the Low-to-High transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs Low independent of the clock. Features • Outputs Source/Sink 24 mA • HD74ACT164 has TTL-Compatible Inputs Pin Arrangement A 1 14 VCC B 2 13 Q7 Q0 3 12 Q6 Q1 4 11 Q5 Q2 5 10 Q4 Q3 6 9 MR GND 7 8 CP (Top view) HD74AC164/HD74ACT164 Logic Symbol A B CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Pin Names A, B CP MR Q0 to Q7 Data Inputs Clock Pulse Input (Active Rising Edge) Master Reset Input (Active Low) Outputs Functional Description The HD74AC164/HD74ACT164 is an edge-triggered 8-bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B); either of these inputs can be used as an active High Enable for data entry through the other inputs. An unused input must be tied High. Each Low-to-High transition on the Clock (CP) input shifts data one place to the right and enters into Q 0 the logical AND of the two data inputs (A•B) that existed before the rising clock edge. A Low level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q outputs Low. 2 HD74AC164/HD74ACT164 Mode Select Table Inputs Outputs Operating Mode MR A B Q0 Q1 to Q7 Reset (Clear) L X X L L to L Shift H L L L q0 to q 6 H L H L q0 to q 6 H H L L q0 to q 6 H H H H q0 to q 6 H L X qn : : : : High Voltage Level Low Voltage Level Immaterial Lower case letters indicate the state of the referenced input or output one setup time prior to the Low-to-High clock transition. Logic Diagram A B Q D D Q D CD CD Q D CD Q D CD Q D CD Q D CD Q D CD Q CD CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. DC Characteristics (unless otherwise specified) Item Symbol Max Unit Condition Maximum quiescent supply current I CC 80 µA VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case Maximum quiescent supply current I CC 8.0 µA VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C Maximum additional ICC/input (HD74ACT164) I CCT 1.5 mA VIN = VCC – 2.1 V, VCC = 5.5 V, Ta = Worst case 3 HD74AC164/HD74ACT164 AC Characteristics: HD74AC164 Ta = +25°C CL = 50 pF Ta = –40°C to +85°C CL = 50 pF Item Symbol VCC (V)*1 Min Typ Max Min Max Unit Maximum clock f max 3.3 125 — — 100 — MHz 5.0 150 — — 125 — 3.3 1.0 8.5 13.0 1.0 13.5 5.0 1.0 6.5 10.0 1.0 10.5 3.3 1.0 8.5 13.0 1.0 14.5 5.0 1.0 6.5 10.0 1.0 10.5 3.3 1.0 9.5 16.0 1.0 18.0 5.0 1.0 7.5 11.5 1.0 13.5 frequency Propagation delay t PLH CP to Qn Propagation delay t PHL CP to Qn Propagation delay t PHL MR to Q n Note: ns 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V AC Operating Requirements: HD74AC164 Ta = –40°C to +85°C CL = 50 pF Ta = +25°C CL = 50 pF Item Symbol VCC (V)*1 Typ Guaranteed Minimum Unit Setup time A or B to CP t su 3.3 3.0 5.5 6.0 ns 5.0 2.0 4.6 4.5 3.3 –1.5 0.0 0.0 5.0 –1.5 0.0 0.0 3.3 2.0 5.5 7.0 5.0 2.0 4.5 5.0 3.3 0.0 2.0 2.0 5.0 0.0 2.0 2.0 Hold time CP to A or B Pulse width CP or MR Recovery time MR or CP Note: 4 th tw t rec 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V HD74AC164/HD74ACT164 AC Characteristics: HD74ACT164 Ta = +25°C CL = 50 pF Ta = –40°C to +85°C CL = 50 pF Item Symbol VCC (V)*1 Min Typ Max Min Max Unit Maximum clock frequency f max 5.0 100 — — 80 — MHz Propagation delay CP to Qn t PLH 5.0 1.0 9.0 11.5 1.0 12.5 ns Propagation delay CP to Qn t PHL 5.0 1.0 9.0 11.5 1.0 12.5 Propagation delay MR to Q n t PHL 5.0 1.0 9.5 13.0 1.0 14.5 Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V AC Operating Requirements: HD74ACT164 Ta = –40°C to +85°C CL = 50 pF Ta = +25°C CL = 50 pF Item Symbol VCC (V)*1 Typ Guaranteed Minimum Unit Setup time A or B to CP t su 5.0 2.5 7.0 8.0 ns Hold time CP to A or B th 5.0 0.0 1.5 1.5 Pulse width CP or MR tw 5.0 4.5 7.0 8.0 Recovery time MR or CP t rec 5.0 0.0 2.0 2.0 Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V Capacitance Item Symbol Typ Unit Condition Input capacitance CIN 4.5 pF VCC = 5.5 V Power dissipation capacitance CPD 20.0 pF VCC = 5.0 V 5 HD74AC164/HD74ACT164 Package Dimensions Unit: mm 19.20 20.32 Max 8 6.30 7.40 Max 14 1.30 7 2.54 ± 0.25 0.48 ± 0.10 0.51 Min 2.39 Max 7.62 2.54 Min 5.06 Max 1 + 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Mass (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 8 5.5 14 1 0.10 ± 0.10 1.42 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension 6 Hitachi Code JEDEC EIAJ Mass (reference value) FP-14DA — Conforms 0.23 g HD74AC164/HD74ACT164 Unit: mm 8.65 9.05 Max 8 1 7 *0.20 ± 0.05 0.635 Max 1.75 Max 3.95 14 + 0.10 6.10 – 0.30 1.08 0.11 0.14 +– 0.04 0° – 8° 1.27 *0.40 ± 0.06 + 0.67 0.60 – 0.20 0.15 0.25 M Hitachi Code JEDEC EIAJ Mass (reference value) *Pd plating FP-14DN Conforms Conforms 0.13 g Unit: mm 4.40 5.00 5.30 Max 14 8 1 7 0.65 1.0 0.13 M 6.40 ± 0.20 0.10 *Dimension including the plating thickness Base material dimension *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.83 Max 0.07 +0.03 –0.04 *0.22+0.08 –0.07 0.20 ± 0.06 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Mass (reference value) TTP-14D — — 0.05 g 7 HD74AC164/HD74ACT164 Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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