HD74AC175 Quad D-Type Flip-Flop Description The HD74AC175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the Low-toHigh clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when Low. Features • • • • • Edge-Triggered D-Type Inputs Buffered Positive Edge-Triggered Clock Asynchronous Common Reset True and Complement Output Outputs Source/Sink 24 mA HD74AC175 Pin Arrangement MR 1 16 VCC Q0 2 15 Q3 Q0 3 14 Q3 D0 4 13 D3 D1 5 12 D2 Q1 6 11 Q2 Q1 7 10 Q2 GND 8 9 CP (Top view) Logic Symbol D0 D1 D2 D3 CP MR Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Pin Names D0 to D3 CP MR Q0 to Q3 Q0 to Q 3 2 Data Inputs Clock Pulse Input Master Reset Input True Outputs Complement Outputs HD74AC175 Functional Description The HD74AC175 consists of four edge-triggered D flip-flops with individual D inputs and Q and Q outputs. The Clock and Master Reset are common. The four flip-flops will store the state of their individual D inputs on the Low-to-High clock (CP) transition, causing individual Q and Q outputs to follow. A Low input on the Master Reset (MR) will force all Q outputs Low and Q outputs High independent of Clock or Data inputs. The HD74AC175 is useful for general logic applications where a common Master Reset and Clock are acceptable. Truth Table Inputs Outputs @ tn, MR = H @ tn+1 Dn Qn Qn L L H H H L H : L : tn : t n + 1: High Voltage Level Low Voltage Level Bit Time before Clock Pulse Bit Time after Clock Pulse Logic Diagram MR CP D3 D2 D Q D1 D CP Q CD Q D CP Q CD Q3 Q3 D0 Q D CP Q CD Q2 Q2 Q CP Q CD Q1 Q1 Q0 Q0 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 HD74AC175 DC Characteristics (unless otherwise specified) Item Symbol Max Unit Condition Maximum quiescent supply current I CC 80 µA VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case Maximum quiescent supply current I CC 8.0 µA VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C AC Characteristics Ta = +25°C CL = 50 pF Ta = –40°C to +85°C CL = 50 pF Item Symbol VCC (V)*1 Min Typ Max Min Max Unit Maximum clock f max 3.3 149 — — 139 — MHz 5.0 187 — — 187 — 3.3 1.0 9.5 12.0 1.0 13.5 5.0 1.0 7.0 9.0 1.0 9.5 3.3 1.0 8.5 13.0 1.0 14.5 5.0 1.0 6.0 9.5 1.0 10.5 3.3 1.0 7.5 12.5 1.0 13.5 5.0 1.0 5.5 9.0 1.0 10.0 3.3 1.0 8.5 11.0 1.0 12.5 5.0 1.0 6.0 8.5 1.0 9.5 frequency Propagation delay t PLH CP to Qn or Qn Propagation delay t PHL CP to Qn or Qn Propagation delay t PLH MR to Qn Propagation delay MR to Q n Note: 4 t PHL 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V ns ns ns ns HD74AC175 AC Operating Requirements Ta = –40°C to +85°C CL = 50 pF Ta = +25°C CL = 50 pF Item Symbol VCC (V)*1 Typ Guaranteed Minimum Unit Set-up time, HIGH or LOW t su 3.3 2.0 4.5 4.5 ns 5.0 1.0 3.0 3.0 3.3 0 1.0 1.0 5.0 0 1.0 1.0 3.3 2.5 4.5 4.5 5.0 2.0 3.5 3.5 3.3 2.5 4.5 5.0 5.0 2.0 3.5 3.5 3.3 –2.0 0.0 0.0 5.0 –1.0 0.0 0.0 Dn to CP Hold time, HIGH or LOW th Dn to CP CP pulse width HIGH or LOW MR pulse width, LOW Recovery time MR to CP Note: tw tw t rec ns ns ns ns 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V Capacitance Item Symbol Typ Unit Condition Input capacitance CIN 4.5 pF VCC = 5.5 V Power dissipation capacitance CPD 45.0 pF VCC = 5.0 V 5 Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Unit: mm 4.40 5.00 5.30 Max 16 9 1 8 0.65 0.13 M 1.10 Max 0.65 Max 0.10 *Dimension including the plating thickness Base material dimension 6.40 ± 0.20 0.07 +0.03 –0.04 0.20 ± 0.06 1.0 *0.17 ± 0.05 0.15 ± 0.04 0.08 *0.22 +– 0.07 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-16DA — — 0.05 g Cautions 1. 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