CY2309NZ Nine-Output 3.3V Buffer Features Functional Description ■ One-input to nine-output buffer/driver ■ Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset PLL ■ Low power consumption for mobile applications ❐ Less than 32 mA at 66.6 MHz with unloaded outputs The CY2309NZ is a low-cost buffer designed to distribute high-speed clocks in mobile PC systems and desktop PC systems with SDRAM support. The part has nine outputs, eight of which can be used to drive two DIMMs or four SO-DIMMs, and the remaining can be used for external feedback to a PLL. The device operates at 3.3V and outputs can run up to 133.33 MHz. ■ 1-ns Input-Output delay ■ Buffers all frequencies from DC to 133.33 MHz ■ Output-output skew less than 250 ps ■ Multiple VDD and VSS pins for noise and electromagnetic interference (EMI) reduction ■ Space-saving 16-pin 150-mil SOIC package ■ 3.3V operation ■ Industrial temperature available The CY2309NZ is designed for low EMI and power optimization. It has multiple VSS and VDD pins for noise optimization and consumes less than 32 mA at 66.6 MHz, making it ideal for the low-power requirements of mobile systems. It is available in an ultra-compact 150-mil 16-pin SOIC package. Logic Block Diagram BUF_IN OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT5 OUTPUT6 OUTPUT7 OUTPUT8 OUTPUT9 Cypress Semiconductor Corporation Document #: 38-07182 Rev. *E • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised September 23, 2008 [+] Feedback CY2309NZ Pinouts Figure 1. CY2309NZ - 16 SOIC-Top View BUF_IN OUTPUT1 1 16 2 15 OUTPUT2 VDD 3 14 4 13 GND OUTPUT3 OUTPUT4 VDD 5 12 6 11 7 10 8 9 OUTPUT9 OUTPUT8 OUTPUT7 VDD GND OUTPUT6 OUTPUT5 GND Table 1. Pin Description for CY2309NZ Pin Signal Description 4, 8, 13 VDD 5, 9, 12 GND Ground 1 BUF_IN Input Clock 3.3V Digital Voltage Supply 2, 3, 6, 7, 10, OUTPUT [1:9] 11, 14, 15, 16 Outputs Maximum Ratings Supply Voltage to Ground Potential................–0.5V to +7.0V Storage Temperature ................................. –65°C to +150°C DC Input Voltage (Except REF) ............ –0.5V to VDD + 0.5V Junction Temperature ................................................. 150°C DC Input Voltage REF .........................................–0.5V to 7V Static Discharge Voltage (per MIL-STD-883, Method 3015) ............................ >2,000V Operating Conditions for Commercial and Industrial Temperature Devices Parameter Description VDD Supply Voltage TA (Ambient Operating Temperature) Commercial (Ambient Operating Temperature) Industrial CL CIN Min Max Unit 3.0 3.6 V 0 70 –40 85 °C °C Load Capacitance, Fout < 100 MHz 30 pF Load Capacitance,100 MHz < Fout < 133.33 MHz 15 pF 7 pF BUF_IN, OUTPUT [1:9] Operating Frequency Input Capacitance DC 133.33 MHz tPU 0.05 50 ms Min Max Unit 0.8 V Power up time for all VDDs to reach minimum specified voltage (power ramps must be monotonic) Electrical Characteristics for Commercial and Industrial Temperature Devices Parameter Description Test Conditions VIL Input LOW Voltage[1] VIH Input HIGH Voltage[1] IIL Input LOW Current VIN = 0V 50.0 μA IIH Input HIGH Current VIN = VDD 100.0 μA 0.4 V Output LOW Voltage[2] VOH Output HIGH Voltage[2] IDD Supply Current VOL 2.0 IOL = 8 mA IOH = –8 mA Unloaded outputs at 66.66 MHz V 2.4 V 32 mA Notes 1. BUF_IN input has a threshold voltage of VDD/2. 2. Parameter is guaranteed by design and characterization. It is not 100% tested in production. Document #: 38-07182 Rev. *E Page 2 of 6 [+] Feedback CY2309NZ Switching Characteristics for Commercial and Industrial Temperature Devices[3] Parameter Name Duty Cycle t3 t4 [2] Description = t2 ÷ t1 Min Typ. Max Unit 40.0 50.0 60.0 % Measured between 0.8V and 2.0V 1.50 ns Measured between 0.8V and 2.0V 1.50 ns Measured at 1.4V [2] Rise Time [2] Fall Time [2] t5 Output to Output Skew All outputs equally loaded t6 Propagation Delay, BUF_IN Rising Edge to OUTPUT Rising Edge[2] Measured at VDD/2 1 5 250 ps 9.2 ns Switching Waveforms Figure 2. Duty Cycle Timing t1 t2 1.4V 1.4V 1.4V Figure 3. All Outputs Rise/Fall Time OUTPUT 2.0V 0.8V 2.0V 0.8V t3 3.3V 0V t4 Figure 4. Output-Output Skew OUTPUT 1.4V 1.4V OUTPUT t5 Figure 5. Input-Output Propagation Delay INPUT VDD/2 VDD/2 OUTPUT t6 Note 3. All parameters specified with loaded outputs. Document #: 38-07182 Rev. *E Page 3 of 6 [+] Feedback CY2309NZ Test Circuits VDD CLK out 0.1 μF OUTPUTS C LOAD VDD 0.1 μF GND GND Ordering Information Ordering Code Package Type Operating Range CY2309NZSC–1H[4] 16-pin 150-mil SOIC Commercial CY2309NZSC–1HT[4] 16-pin 150-mil SOIC – Tape and Reel Commercial Pb-free CY2309NZSXC–1H 16-pin 150-mil SOIC Commercial CY2309NZSXC–1HT 16-pin 150-mil SOIC – Tape and Reel Commercial CY2309NZSXI-1H 16-pin 150-mil SOIC Industrial CY2309NZSXI-1HT 16-pin 150-mil SOIC – Tape and Reel Industrial Package Diagram Figure 6. 16-Pin (150-Mil) SOIC S16 16 Lead (150 Mil) SOIC PIN 1 ID 8 1 DIMENSIONS IN INCHES[MM] MIN. MAX. REFERENCE JEDEC MS-012 PACKAGE WEIGHT 0.15gms 0.150[3.810] 0.157[3.987] 0.230[5.842] 0.244[6.197] PART # S16.15 STANDARD PKG. SZ16.15 LEAD FREE PKG. 9 16 0.386[9.804] 0.393[9.982] 0.010[0.254] 0.016[0.406] SEATING PLANE X 45° 0.061[1.549] 0.068[1.727] 0.004[0.102] 0.050[1.270] BSC 0°~8° 0.0138[0.350] 0.0192[0.487] 0.004[0.102] 0.0098[0.249] 0.016[0.406] 0.035[0.889] 0.0075[0.190] 0.0098[0.249] 51-85068-*B Note 4. Not recommended for new designs. Document #: 38-07182 Rev. *E Page 4 of 6 [+] Feedback CY2309NZ Document History Page Document Title: CY2309NZ Nine-Output 3.3V Buffer Document Number: 38-07182 ECN Orig. of Change Submission Date ** 111858 DSG 12/09/01 Change from Spec number: 38-00709 to 38-07182 *A 121834 RBI 12/14/02 Power-up requirements added to Operating Conditions Information REV. Description of Change *B 130563 SDR 10/23/03 Added industrial operating temperature to operating conditions *C 212991 RGL/GGK 03/30/04 Updated the propagation delay T6 spec to 9.2 ns in the Switching Characteristics table *D 270149 RGL 10/04/04 Added Lead-free devices Replaced 8.7ns Input/Output Delay to 1ns Input/Output Delayin the features section *E 2568533 AESA 09/23/08 Updated template. Added Note “Not recommended for new designs.” Changed "SDRAM [1:9]" to "OUTPUT [1:9]" in Operating Conditions table. Removed part number CY2309NZSI–1H and CY2309NZSI–1HT. Document #: 38-07182 Rev. *E Page 5 of 6 [+] Feedback CY2309NZ Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. 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Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-07182 Rev. *E Revised September 23, 2008 Page 6 of 6 All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback