TM UniFET FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Features Description • 5A, 500V, RDS(on) = 1.5Ω @VGS = 10 V These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. • Low gate charge ( typical 12.8 nC) • Low Crss ( typical 9 pF) This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction. • Fast switching • 100% avalanche tested • Improved dv/dt capability D G G DS TO-220 FDP Series TO-220F GD S FDPF Series S Absolute Maximum Ratings Symbol Parameter FDP7N50U VDSS Drain-Source Voltage ID Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) IDM Drain Current - Pulsed VGSS Gate-Source voltage EAS IAR FDPF7N50U 500 5 3.0 (Note 1) 20 Unit V 5* 3.0 * A A 20 * A ±30 V Single Pulsed Avalanche Energy (Note 2) 270 mJ Avalanche Current (Note 1) 5 A EAR Repetitive Avalanche Energy (Note 1) 8.9 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TC = 25°C) - Derate above 25°C 89 0.71 TJ, TSTG Operating and Storage Temperature Range TL Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds 39 0.31 W W/°C -55 to +150 °C 300 °C * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol Parameter FDP7N50U FDPF7N50U Unit Thermal Resistance, Junction-to-Case 1.4 3.2 °C/W RθCS Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W RθJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 °C/W RθJC ©2007 Fairchild Semiconductor Corporation FDP7N50U/FDPF7N50U REV. B 1 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET March 2007 Device Marking Device Package Reel Size Tape Width Quantity FDP7N50U FDP7N50U TO-220 -- -- 50 FDPF7N50U FDPF7N50U TO-220F -- -- 50 Electrical Characteristics Symbol TC = 25°C unless otherwise noted Parameter Conditions Min. Typ. Max Units 500 -- -- V Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250µA, Referenced to 25°C -- 0.5 -- V/°C IDSS Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V VDS = 400V, TC = 125°C --- --- 25 250 µA µA IGSSF Gate-Body Leakage Current, Forward VGS = 30V, VDS = 0V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30V, VDS = 0V -- -- -100 nA 3.0 -- 5.0 V -- 1.2 1.5 Ω -- 2.5 -- S On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-Source On-Resistance VGS = 10V, ID = 2.5A gFS Forward Transconductance VDS = 40V, ID = 2.5A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25V, VGS = 0V, f = 1.0MHz -- 720 940 pF -- 95 190 pF -- 9 13.5 pF Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 250V, ID = 7A RG = 25Ω (Note 4, 5) VDS = 400V, ID = 7A VGS = 10V (Note 4, 5) -- 6 20 ns -- 55 120 ns -- 25 60 ns -- 35 80 ns -- 12.8 16.6 nC -- 3.7 -- nC -- 5.8 -- nC 5 A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 20 A VSD Drain-Source Diode Forward Voltage VGS = 0V, IS = 7A -- -- 1.6 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0V, IS = 7A dIF/dt =100A/µs (Note 4) -- 40 -- ns -- 0.04 -- µC NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. IAS = 7A, VDD = 50V, L=10mH, RG = 25Ω, Starting TJ = 25°C 3. ISD ≤ 7A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2% 5. Essentially Independent of Operating Temperature Typical Characteristics FDP7N50U/FDPF7N50U REV. B 2 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Package Marking and Ordering Information Figure 1. On-Region Characteristics Top : ID, Drain Current [A] 15 Bottom : VGS 10.0 V 8.0V 7.5 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V 1 10 ID , Drain Current [A] 20 Figure 2. Transfer Characteristics 10 ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ 5 0 0 10 20 30 40 150℃ 0 10 25℃ -1 10 ※ Note 1. VDS = 40V 2. 250µ s Pulse Test -2 50 10 2 VDS, Drain-Source Voltage [V] 8 10 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 2.5 IDR , Reverse Drain Current [A] RDS(ON) [Ω ],Drain-Source On-Resistance 6 VGS , Gate-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 2.0 VGS = 10V 1.5 VGS = 20V 1.0 0.5 1 10 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250µ s Pulse Test ※ Note : TJ = 25℃ 0.0 -1 0 5 10 15 10 20 0.2 Figure 5. Capacitance Characteristics VGS, Gate-Source Voltage [V] Crss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 10 0 1.2 1.4 1.6 1.8 1 10 VDS = 250V 10 VDS = 400V 8 6 4 2 ※ Note : ID = 7 A 0 0 5 10 15 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] FDP7N50U/FDPF7N50U REV. B 1.0 VDS = 100V Coss 10 0.8 12 Ciss 100 0.6 Figure 6. Gate Charge Characteristics Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1000 0.4 VSD , Source-Drain Voltage [V] ID, Drain Current [A] Capacitance [pF] 4 3 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Typical Performance Characteristics Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. Maximum Drain Current Vs. Case Temperature 6 BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 ID, Drain Current [A] 1.1 1.0 ♦ Notes : 0.9 1. VGS = 0 V 4 2 2. ID = 250 µA 0.8 -100 -50 0 50 100 150 0 25 200 o 50 TJ, Junction Temperature [ C] Figure 9-1. Maximum Safe Operating Area - FDP7N50U ID, Drain Current [A] ID, Drain Current [A] DC -1 10 10 us ※ Notes : 100 us 1 ms 10 ms 0 10 Operation in This Area is Limited by R DS(on) DC -1 10 ※ Notes : o o 1. TC = 25 C 1. TC = 25 C o o 2. TJ = 150 C 3. Single Pulse 2. TJ = 150 C 3. Single Pulse -2 10 150 1 10 ms Operation in This Area is Limited by R DS(on) 125 10 100 us 1 ms 10 100 Figure 9-2. Maximum Safe Operating Area - FDPF7N50U 10 us 1 10 0 75 TC, Case Temperature [℃] -2 0 10 1 10 10 2 10 FDP7N50U/FDPF7N50U REV. B 0 10 VDS, Drain-Source Voltage [V] 1 10 2 10 VDS, Drain-Source Voltage [V] 4 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Typical Performance Characteristics (Continued) FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Figure 10-1. Transient Thermal Response Curve - FDP7N50U Zθ JC(t), Thermal Response 10 0 D = 0 .5 0 .2 0 .1 10 -1 PDM 0 .0 5 t1 0 .0 2 0 .0 1 s in g le p u ls e 10 t2 ※ N o te s : 1 . Z θ J C(t) = 1 .4 ℃ /W M a x. 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C(t) -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 10-2. Transient Thermal Response Curve - FDPF7N50U Zθ JC(t), Thermal Response D = 0 .5 10 0 0 .2 0 .1 PDM 0 .0 5 10 t1 -1 0 .0 2 0 .0 1 10 s in g le p u ls e -2 10 -5 10 -4 t2 ※ N o te s : 1 . Z θ JC(t) = 3 .2 ℃ /W M a x. 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z θ JC(t) 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] FDP7N50U/FDPF7N50U REV. B 5 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms FDP7N50U/FDPF7N50U REV. B 6 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms FDP7N50U/FDPF7N50U REV. B 7 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Mechanical Dimensions TO-220 Dimensions in Millimeters FDP7N50U/FDPF7N50U REV. B 8 www.fairchildsemi.com (Continued) 3.30 ±0.10 TO-220F 10.16 ±0.20 2.54 ±0.20 ø3.18 ±0.10 (7.00) (1.00x45°) 15.87 ±0.20 15.80 ±0.20 6.68 ±0.20 (0.70) 0.80 ±0.10 ) 0° (3 9.75 ±0.30 MAX1.47 #1 +0.10 0.50 –0.05 2.54TYP [2.54 ±0.20] 2.76 ±0.20 2.54TYP [2.54 ±0.20] 9.40 ±0.20 4.70 ±0.20 0.35 ±0.10 Dimensions in Millimeters FDP7N50U/FDPF7N50U REV. B 9 www.fairchildsemi.com FDP7N50U/FDPF7N50U 500V N-Channel MOSFET Mechanical Dimensions TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ® ACEx Across the board. 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A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I24 © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com