UniFETTM FDP52N20 / FDPF52N20T tm N-Channel MOSFET 200V, 52A, 0.049Ω Features Description • RDS(on) = 0.041Ω ( Typ.)@ VGS = 10V, ID = 26A These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. • Low gate charge ( Typ. 49nC) • Low Crss ( Typ. 66pF) This advance technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switching mode power supplies and active power factor correction. • Fast switching • 100% avalanche tested • Improve dv/dt capability • RoHS compliant D G G D S TO-220 FDP Series TO-220F FDPF Series GD S S MOSFET Maximum Ratings TC = 25oC unless otherwise noted Symbol VDSS Drain to Source Voltage Parameter VGSS Gate to Source Voltage FDP52N20 FDPF52N20T 200 ±30 Units V V -Continuous (TC = 25oC) 52 52* -Continuous (TC = 100oC) 33 33* ID Drain Current IDM Drain Current EAS Single Pulsed Avalanche Energy IAR Avalanche Current (Note 1) 52 A EAR Repetitive Avalanche Energy (Note 1) 35.7 mJ dv/dt Peak Diode Recovery dv/dt - Pulsed (Note 1) 208* 2520 (Note 3) A mJ 4.5 V/ns (TC = 25oC) 357 38.5 W - Derate above 25oC 2.86 0.3 W/oC PD Power Dissipation TJ, TSTG Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds TL 208 (Note 2) A -55 to +150 oC 300 oC *Drain current limited by maximum junction temperature Thermal Characteristics Symbol Parameter FDP52N20 FDPF52N20T RθJC Thermal Resistance, Junction to Case 0.35 3.3 RθCS Thermal Resistance, Case to Sink Typ. 0.5 - RθJA Thermal Resistance, Junction to Ambient 62.5 62.5 ©2007 Fairchild Semiconductor Corporation FDP52N20 / FDPF52N20T Rev. A 1 Units oC/W www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET October 2007 Device Marking FDP52N20 Device FDP52N20 Package TO-220 Reel Size - Tape Width - Quantity 50 FDPF52N20T FDPF52N20T TO-220F - - 50 Electrical Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS ∆BVDSS / ∆TJ Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient ID = 250µA, VGS = 0V, TJ = 25oC 200 - - V ID = 250µA, Referenced to 25oC - 0.2 - V/oC IDSS Zero Gate Voltage Drain Current VDS = 200V, VGS = 0V - - 1 VDS = 160V, TC = 125oC - - 10 µA IGSS Gate to Body Leakage Current VGS = ±30V, VDS = 0V - - ±100 3.0 - 5.0 V - 0.041 0.049 Ω - 35 - S nA On Characteristics VGS(th) RDS(on) Gate Threshold Voltage VGS = VDS, ID = 250µA Static Drain to Source On Resistance VGS = 10V, ID = 26A gFS Forward Transconductance VDS = 40V, ID = 26A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Qg(tot) Total Gate Charge at 10V Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge VDS = 25V, VGS = 0V f = 1MHz VDS = 160V, ID = 52A VGS = 10V (Note 4, 5) - 2230 2900 pF - 540 700 pF - 66 100 pF - 49 63 nC - 19 - nC - 24 - nC Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time VDD = 100V, ID = 20A RG = 25Ω (Note 4, 5) - 53 115 ns - 175 359 ns - 48 107 ns - 29 68 ns Drain-Source Diode Characteristics IS Maximum Continuous Drain to Source Diode Forward Current - - 52 A ISM Maximum Pulsed Drain to Source Diode Forward Current - - 204 A VSD Drain to Source Diode Forward Voltage VGS = 0V, ISD = 52A - - 1.5 V trr Reverse Recovery Time - 162 - ns Qrr Reverse Recovery Charge VGS = 0V, ISD = 52A dIF/dt = 100A/µs - 1.3 - µC (Note 4) Notes: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 1.4mH, IAS = 52A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C 3. ISD ≤ 52A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2% 5. Essentially Independent of Operating Temperature Typical Characteristics FDP52N20 / FDPF52N20T Rev. A 2 www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET Package Marking and Ordering Information TC = 25oC unless otherwise noted Figure 1. On-Region Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : 1 10 2 10 ID, Drain Current [A] 2 10 ID, Drain Current [A] Figure 2. Transfer Characteristics 0 10 150°C 1 25°C 10 -55°C * Notes : 1. VDS = 40V 2. 250µs Pulse Test * Notes : 1. 250µs Pulse Test 2. TC = 25°C -1 10 0 -1 0 10 10 1 10 10 2 4 6 8 10 12 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 0.12 IDR, Reverse Drain Current [A] RDS(ON) [Ω], Drain-Source On-Resistance 2 10 0.10 0.08 VGS = 10V 0.06 0.04 VGS = 20V 0.02 * Note : TJ = 25°C 1 10 150℃ 25℃ * Notes : 1. VGS = 0V 2. 250µs Pulse Test 0 0.00 0 25 50 75 100 125 10 0.2 150 0.4 ID, Drain Current [A] 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD, Source-Drain voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics 6000 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Capacitances [pF] 4000 3000 VGS, Gate-Source Voltage [V] Crss = Cgd 5000 Coss Ciss 2000 * Note ; 1. VGS = 0 V 1000 Crss 2. f = 1 MHz VDS = 40V 10 VDS = 100V VDS = 160V 8 6 4 2 * Note : ID = 52A 0 -1 10 0 10 0 1 0 10 FDP52N20 / FDPF52N20T Rev. A 10 20 30 40 50 60 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] 3 www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET Typical Performance Characteristics Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 1.1 1.0 * Notes : 1. VGS = 0 V 0.9 2.5 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 2. ID = 250µA 2.0 1.5 1.0 * Notes : 1. VGS = 10 V 0.5 2. ID = 26 A 0.8 -100 -50 0 50 100 150 0.0 -100 200 -50 0 TJ, Junction Temperature [°C] 50 100 150 200 TJ, Junction Temperature [°C] Figure 9-1. Maximum Safe Operating Area - FDP52N20 Figure 9-2. Maximum Safe Operating Area - FDPF52N20T 3 3 10 10 10 µs 2 10 ID, Drain Current [A] ID, Drain Current [A] 1 10 Operation in This Area is Limited by R DS(on) 0 10 * Notes : 1. TC = 25°C 2. TJ = 150°C 3. Single Pulse -1 10 100 µs 1 ms 1 10 10 ms 100 ms DC Operation in This Area is Limited by R DS(on) 0 10 * Notes : 1. TC = 25°C 2. TJ = 150°C 3. Single Pulse -1 10 -2 10 10 µs 2 100 µs 1 ms 10 ms 100 ms DC 10 -2 0 1 10 10 2 10 10 0 10 VDS, Drain-Source Voltage [V] 1 10 2 10 VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current 60 ID, Drain Current [A] 50 40 30 20 10 0 25 50 75 100 125 150 TC, Case Temperature [°C] FDP52N20 / FDPF52N20T Rev. A 4 www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET Typical Performance Characteristics (Continued) FDP52N20 / FDPF52N20T N-Channel MOSFET Typical Performance Characteristics (Continued) ZθJC(t), Thermal Response Figure 11-1. Transient Thermal Response Curve - FDP52N20 D =0.5 10 -1 0.2 0.1 PDM t1 0.05 * N o tes : 0.02 10 1 . Z θ JC (t) = 0.3 5 C /W M ax. 2 . D uty F actor, D =t 1 /t 2 3 . T JM - T C = P D M * Z θ JC (t) 0.01 single pulse 10 t2 0 -2 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u are W a ve P u lse D uration [se c] Figure 11-2. Transient Thermal Response Curve - FDPF52N20T ZθJC(t), Thermal Response D=0.5 10 0 0.2 0.1 PDM 0.05 10 t1 -1 0.02 * N otes : 0.01 t2 0 1. Z θ JC (t) = 3.3 C /W M ax. 2. D uty Factor, D =t 1 /t 2 3. T JM - T C = P DM * Z θ JC (t) single pulse 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , Square W ave Pulse Duration [sec] FDP52N20 / FDPF52N20T Rev. A 5 www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms FDP52N20 / FDPF52N20T Rev. A 6 www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + V DS _ I SD L D r iv e r R V V GS ( D r iv e r ) GS G S am e T ype as DUT V DD • d v / d t c o n t r o lle d b y R G • I S D c o n t r o lle d b y p u ls e p e r io d G a te P u ls e W id t h D = -------------------------G a t e P u ls e P e r io d 10V IF M , B o d y D io d e F o r w a r d C u r r e n t I SD ( DUT ) d i/d t IR M B o d y D io d e R e v e r s e C u r r e n t V DS ( DUT ) B o d y D io d e R e c o v e r y d v / d t V V SD DD B o d y D io d e F o r w a r d V o lta g e D r o p FDP52N20 / FDPF52N20T Rev. A 7 www.fairchildsemi.com TO-220 4.50 ±0.20 2.80 ±0.10 (3.00) +0.10 1.30 –0.05 18.95MAX. (3.70) ø3.60 ±0.10 15.90 ±0.20 1.30 ±0.10 (8.70) (1.46) 9.20 ±0.20 (1.70) 9.90 ±0.20 1.52 ±0.10 10.08 ±0.30 (1.00) 13.08 ±0.20 ) (45° 1.27 ±0.10 0.80 ±0.10 2.54TYP [2.54 ±0.20] +0.10 0.50 –0.05 2.40 ±0.20 2.54TYP [2.54 ±0.20] 10.00 ±0.20 FDP52N20 / FDPF52N20T Rev. A 8 www.fairchildsemi.com FDP52N20 / FDPF52N20T N-Channel MOSFET Mechanical Dimensions FDP52N20 / FDPF52N20T N-Channel MOSFET Mechanical Dimensions 3.30 ±0.10 TO-220F 10.16 ±0.20 2.54 ±0.20 ø3.18 ±0.10 (7.00) (1.00x45°) 15.87 ±0.20 15.80 ±0.20 6.68 ±0.20 (0.70) 0.80 ±0.10 ) 0° (3 9.75 ±0.30 MAX1.47 #1 +0.10 0.50 –0.05 2.54TYP [2.54 ±0.20] 2.76 ±0.20 2.54TYP [2.54 ±0.20] 9.40 ±0.20 4.70 ±0.20 0.35 ±0.10 Dimensions in Millimeters FDP52N20 / FDPF52N20T Rev. A 9 www.fairchildsemi.com TRADEMARKS The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I31 © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com