SII S-1133B28

Rev.2.1_00
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT
CMOS VOLTAGE REGULATOR
S-1133 Series
The S-1133 Series is a positive voltage regulator with a low dropout
voltage, high output voltage accuracy, and low current consumption
(300 mA output current) developed based on CMOS technology.
A 1 µF small ceramic capacitor can be used*1. It operates with low
current consumption of 60 µA typ. The S-1133 Series includes an
overcurrent protection circuit that prevents the output current from
exceeding the current capacitance of the output transistor and a
thermal shutdown circuit that prevents damage due to overheating.
In addition to the types in which output voltage is set inside the IC,
a type for which output voltage can be set via an external resistor is
added to a lineup (S-1133x00 Series). SOT-89-5 and super-small
SNT-8A packages realize high-density mounting. This, in addition
to low current consumption, makes the S-1133 Series ideal for
mobile devices.
*1. A ceramic capacitor of 2.2 µF or more can be used for products
whose output voltage is 1.7 V or less.
„ Features
• Output voltage :
• Voltage setting via external resistor :
• Input voltage range :
• High-accuracy output voltage :
• Low dropout voltage :
• Low current consumption :
• Output current :
• Low ESR capacitor can be used :
• High ripple rejection :
• Built-in overcurrent protection circuit :
• Built-in thermal shutdown circuit :
• Built-in ON/OFF circuit :
• Small package :
• Lead-free products
*1.
1.2 to 6.0 V, selectable in 0.1 V steps.
Selectable from 1.8 to 8.2 V (S-1133B00/S-1133A00)
2.0 to 10 V
±1.0% accuracy (1.2 to 1.4 V output product : ±15 mV accuracy)
130 mV typ. (3.0 V output product, IOUT = 100 mA)
During operation :
60 µA typ., 90 µA max.
During shutdown : 0.1 µA typ., 1.0 µA max.
300 mA output is possible (at VIN ≥ VOUT(S) + 1.0 V)*1
A ceramic capacitor of 1.0 µF or more can be used for the input and output
capacitors.
(A ceramic capacitor of 2.2 µF or more can be used for products whose
output voltage is 1.7 V or less.)
70 dB typ. (at 1.0 kHz, VOUT = 1.2 V)
Overcurrent of output transistor can be restricted.
Prevents damage due to overheating.
Ensures long battery life.
SOT-89-5, SNT-8A
Attention should be paid to the power dissipation of the package when the output current is large.
„ Applications
• Power supply for battery-powered devices
• Power supply for communication devices
• Power supply for home electric appliances
„ Packages
Package Name
SOT-89-5
SNT-8A
Drawing Code
Package
Tape
Reel
Land
UP005-A
PH008-A
UP005-A
PH008-A
UP005-A
PH008-A
UP005-A
PH008-A
Seiko Instruments Inc.
1
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Block Diagrams
1. Types in which output voltage is internally set (S-1133x12 to S-1133x60)
*1
VOUT
VIN
Thermal
shutdown circuit
Overcurrent
protection circuit
ON/OFF
circuit
ON/OFF
Reference
voltage circuit
VSS
*1. Parasitic diode
Figure 1
2. Types in which output voltage is externally set (S-1133B00 and S-1133A00 only)
*1
VOUT
VIN
Thermal
shutdown circuit
Overcurrent
protection circuit
VADJ
ON/OFF
circuit
ON/OFF
Reference
voltage circuit
VSS
*1. Parasitic diode
Figure 2
2
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Product Name Structure
• The product types, output voltage, and package types for the S-1133 Series can be selected at the user’s request.
Refer to the “Product name” for the meanings of the characters in the product name and “Product name list” for the
full product names.
1. Product name
S-1133
x
xx
-
xxxx
G
Package abbreviation and packing specifications*1
U5T1 : SOT-89-5, Tape
I8T1 : SNT-8A, Tape
Output voltage
00 :
Externally set
12 to 60 : Internally set
(e.g., when the output voltage is 1.2 V, it is expressed as 12.)
Product type*2
A : ON/OFF pin negative logic
B : ON/OFF pin positive logic
*1.
*2.
Refer to the taping specifications at the end of this book.
Refer to “3. Shutdown pin (ON/OFF pin)” in “Operation”.
Seiko Instruments Inc.
3
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
2. Product name list
Table 1 (1/2)
Output Voltage
4
SOT-89-5
SNT-8A
Externally set
S-1133B00-U5T1G
S-1133B00-I8T1G
1.2 V ±15 mV
S-1133B12-U5T1G
S-1133B12-I8T1G
1.3 V ±15 mV
S-1133B13-U5T1G
S-1133B13-I8T1G
1.4 V ±15 mV
S-1133B14-U5T1G
S-1133B14-I8T1G
1.5 V ±1.0%
S-1133B15-U5T1G
S-1133B15-I8T1G
1.6 V ±1.0%
S-1133B16-U5T1G
S-1133B16-I8T1G
1.7 V ±1.0%
S-1133B17-U5T1G
S-1133B17-I8T1G
1.8 V ±1.0%
S-1133B18-U5T1G
S-1133B18-I8T1G
1.9 V ±1.0%
S-1133B19-U5T1G
S-1133B19-I8T1G
2.0 V ±1.0%
S-1133B20-U5T1G
S-1133B20-I8T1G
2.1 V ±1.0%
S-1133B21-U5T1G
S-1133B21-I8T1G
2.2 V ±1.0%
S-1133B22-U5T1G
S-1133B22-I8T1G
2.3 V ±1.0%
S-1133B23-U5T1G
S-1133B23-I8T1G
2.4 V ±1.0%
S-1133B24-U5T1G
S-1133B24-I8T1G
2.5 V ±1.0%
S-1133B25-U5T1G
S-1133B25-I8T1G
2.6 V ±1.0%
S-1133B26-U5T1G
S-1133B26-I8T1G
2.7 V ±1.0%
S-1133B27-U5T1G
S-1133B27-I8T1G
2.8 V ±1.0%
S-1133B28-U5T1G
S-1133B28-I8T1G
2.9 V ±1.0%
S-1133B29-U5T1G
S-1133B29-I8T1G
3.0 V ±1.0%
S-1133B30-U5T1G
S-1133B30-I8T1G
3.1 V ±1.0%
S-1133B31-U5T1G
S-1133B31-I8T1G
3.2 V ±1.0%
S-1133B32-U5T1G
S-1133B32-I8T1G
3.3 V ±1.0%
S-1133B33-U5T1G
S-1133B33-I8T1G
3.4 V ±1.0%
S-1133B34-U5T1G
S-1133B34-I8T1G
3.5 V ±1.0%
S-1133B35-U5T1G
S-1133B35-I8T1G
3.6 V ±1.0%
S-1133B36-U5T1G
S-1133B36-I8T1G
3.7 V ±1.0%
S-1133B37-U5T1G
S-1133B37-I8T1G
3.8 V ±1.0%
S-1133B38-U5T1G
S-1133B38-I8T1G
3.9 V ±1.0%
S-1133B39-U5T1G
S-1133B39-I8T1G
4.0 V ±1.0%
S-1133B40-U5T1G
S-1133B40-I8T1G
4.1 V ±1.0%
S-1133B41-U5T1G
S-1133B41-I8T1G
4.2 V ±1.0%
S-1133B42-U5T1G
S-1133B42-I8T1G
4.3 V ±1.0%
S-1133B43-U5T1G
S-1133B43-I8T1G
4.4 V ±1.0%
S-1133B44-U5T1G
S-1133B44-I8T1G
4.5 V ±1.0%
S-1133B45-U5T1G
S-1133B45-I8T1G
4.6 V ±1.0%
S-1133B46-U5T1G
S-1133B46-I8T1G
4.7 V ±1.0%
S-1133B47-U5T1G
S-1133B47-I8T1G
4.8 V ±1.0%
S-1133B48-U5T1G
S-1133B48-I8T1G
4.9 V ±1.0%
S-1133B49-U5T1G
S-1133B49-I8T1G
5.0 V ±1.0%
S-1133B50-U5T1G
S-1133B50-I8T1G
5.1 V ±1.0%
S-1133B51-U5T1G
S-1133B51-I8T1G
5.2 V ±1.0%
S-1133B52-U5T1G
S-1133B52-I8T1G
5.3 V ±1.0%
S-1133B53-U5T1G
S-1133B53-I8T1G
5.4 V ±1.0%
S-1133B54-U5T1G
S-1133B54-I8T1G
5.5 V ±1.0%
S-1133B55-U5T1G
S-1133B55-I8T1G
5.6 V ±1.0%
S-1133B56-U5T1G
S-1133B56-I8T1G
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
Table 1 (2/2)
Output Voltage
Remark
SOT-89-5
SNT-8A
5.7 V ±1.0%
S-1133B57-U5T1G
S-1133B57-I8T1G
5.8 V ±1.0%
S-1133B58-U5T1G
S-1133B58-I8T1G
5.9 V ±1.0%
S-1133B59-U5T1G
S-1133B59-I8T1G
6.0 V ±1.0%
S-1133B60-U5T1G
S-1133B60-I8T1G
Please contact our sales office for type A products.
Seiko Instruments Inc.
5
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Pin Configurations
Table 2
SOT-89-5
Top view
5
Pin No.
4
Symbol
VADJ
1
NC*1
1
2
*1.
3
Description
Output voltage adjustment pin
(S-1133B00/S-1133A00 only)
No connection
(S-1133x12 to S-1133x60)
GND pin
Shutdown pin
Voltage input pin
Voltage output pin
2
VSS
3
ON/OFF
4
VIN
5
VOUT
The NC pin is electrically open.
The NC pin can be connected to VIN or VSS.
Figure 3
Table 3
SNT-8A
Top view
Pin No.
1
8
2
7
1
2
VOUT
Voltage output pin
VOUT
*1
Voltage output pin
No connection
(S-1133x12 to S-1133x60)
Output voltage adjustment pin
NC
3
5
4
VADJ
Figure 4
Functions
*1
*2
6
3
Pin Name
*2
(S-1133B00/S-1133A00 only)
4
NC
No connection
5
VSS
GND pin
6
ON/OFF
7
VIN*3
Shutdown pin
Voltage input pin
*3
*1.
6
VIN
8
Voltage input pin
Although pins of number 1 and 2 are connected internally, be
sure to short-circuit them nearest in use.
*2.
The NC pin is electrically open.
The NC pin can be connected to VIN or VSS.
*3.
Although pins of number 7 and 8 are connected internally, be
sure to short-circuit them nearest in use.
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Absolute Maximum Ratings
Table 4
Item
Input voltage
Output voltage
Symbol
VIN
VON/OFF
VADJ
VOUT
SOT-89-5
PD
SNT-8A
Operating ambient temperature
Topr
Storage temperature
Tstg
*1. When mounted on printed circuit board
[Mounted Board]
(1) Board size : 114.3 mm × 76.2 mm × t1.6 mm
(2) Board name : JEDEC STANDARD51-7
Power dissipation
Caution
(Ta = 25 °C unless otherwise specified)
Absolute Maximum Rating
Unit
VSS − 0.3 to VSS + 12
V
VSS − 0.3 to VSS + 12
V
VSS − 0.3 to VSS + 12
V
VSS − 0.3 to VIN + 0.3
V
1000*1
mW
450*1
mW
−40 to +85
°C
−40 to +125
°C
The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Power Dissipation (PD) [mW]
1200
SOT-89-5
800
SNT-8A
400
0
0
150
100
50
Ambient Temperature (Ta) [°C]
Figure 5 Power Dissipation of Packages (Mounted on Printed Circuit Board)
Caution
The thermal shutdown circuit may operate when the junction temperature is around 150 °C.
Seiko Instruments Inc.
7
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Electrical Characteristics
1. Types in which output voltage is internally set (S-1133x12 to S-1133x60)
Table 5
Item
Output voltage*1
Symbol
VOUT(E)
Conditions
VIN = VOUT(S) + 1.0 V,
IOUT = 100 mA
1.2 V ≤ VOUT(S) ≤ 1.4 V
1.5 V ≤ VOUT(S) ≤ 6.0 V
*2
Output current
Dropout voltage*3
Line regulation
Load regulation
Output voltage
*4
temperature coefficient
Current consumption
during operation
Current consumption
during shutdown
Input voltage
Shutdown pin
input voltage “H”
Shutdown pin
input voltage “L”
Shutdown pin
input current “H”
Shutdown pin
input current “L”
Ripple rejection
Short-circuit current
Thermal shutdown
detection temperature
Thermal shutdown
release temperature
8
IOUT
Vdrop
∆VOUT1
∆VIN VOUT
VIN ≥ VOUT(S) + 1.0 V
IOUT = 100 mA
VOUT(S) = 1.2 V
VOUT(S) = 1.3 V
VOUT(S) = 1.4 V
1.5 V ≤ VOUT(S) ≤ 1.9 V
2.0 V ≤ VOUT(S) ≤ 2.4 V
2.5 V ≤ VOUT(S) ≤ 2.9 V
3.0 V ≤ VOUT(S) ≤ 3.2 V
3.3 V ≤ VOUT(S) ≤ 6.0 V
VOUT(S) + 0.5 V ≤ VIN ≤ 10 V, IOUT = 100 mA
(Ta = 25 °C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit
VOUT(S)
VOUT(S)
VOUT(S)
V
1
− 0.015
+ 0.015
VOUT(S)
VOUT(S)
VOUT(S)
V
1
× 0.99
× 1.01
*5
300


mA
3
0.8
0.84
0.88
V
1

0.74
0.78
V
1

0.64
0.68
V
1

0.54
0.58
V
1

0.15
0.23
V
1

0.14
0.21
V
1

0.13
0.19
V
1

0.10
0.15
V
1

0.02
0.2
%/V
1

15
40
mV
1

±130

ppm/
°C
1

60
90
µA
2

0.1
1.0
µA
2
VIN
VIN = VOUT(S) + 1.0 V,
1.0 mA ≤ IOUT ≤ 100 mA
VIN = VOUT(S) + 1.0 V, IOUT = 30 mA,
−40 °C ≤ Ta ≤ 85 °C
VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
no load
VIN = VOUT(S) + 1.0 V, ON/OFF pin = OFF,
no load

2.0

10
V

VSH
VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ
1.5


V
4
VSL
VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ


0.25
V
4
ISH
VIN = VOUT(S) + 1.0 V, VON/OFF = 7 V
−0.1

0.1
µA
4
ISL
VIN = VOUT(S) + 1.0 V, VON/OFF = 0 V
−0.1

0.1
µA
4
VIN = VOUT(S) + 1.0 V, 1.2 V ≤ VOUT(S) ≤ 1.5 V
f = 1.0 kHz,
1.6 V ≤ VOUT(S) ≤ 3.0 V
∆Vrip = 0.5 Vrms,
3.1 V ≤ VOUT(S) ≤ 6.0 V
IOUT = 50 mA
VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
VOUT = 0 V

70

dB
5

65

dB
5

60

dB
5

200

mA
3
TSD
Junction temperature

150

°C

TSR
Junction temperature

120

°C

∆VOUT2
∆VOUT
∆Ta VOUT
ISS1
ISS2
RR
Ishort
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
*1. VOUT(S) : Specified output voltage
VOUT(E) : Actual output voltage at the fixed load
The output voltage when fixing IOUT (= 100 mA) and inputting VOUT(S) + 1.0 V
*2. The output current at which the output voltage becomes 95% of VOUT(E) after gradually increasing the output current.
*3. Vdrop = VIN1 − (VOUT3 × 0.98)
VOUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 100 mA.
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input
voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
∆VOUT
[mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000
∆Ta
∆Ta VOUT
*1. The change in temperature of the output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
*5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not
be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This
specification is guaranteed by design.
Seiko Instruments Inc.
9
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
2. Types in which output voltage is externally set (S-1133B00 and S-1133A00 only)
Table 6
Item
Output voltage of adjust
*1
pin
Output voltage range
Internal resistance value
of adjust pin
Output current*2
Dropout voltage*3
Symbol
VVADJ
VROUT
1.818
V
6
1.8

8.2
V
11

200

kΩ

300


0.24

0.28
mA
V
8
6

0.02
0.2
%/V
6

15
40
mV
6

±130

ppm/
°C
6

60
90
µA
7

0.1
1.0
µA
7
2.0

10
V

*5
VSH
VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ
1.5


V
9
VSL
VIN = VOUT(S) + 1.0 V, RL = 1.0 kΩ


0.25
V
9
ISH
VIN = VOUT(S) + 1.0 V, VON/OFF = 7 V
−0.1

0.1
µA
9
ISL
VIN = VOUT(S) + 1.0 V, VON/OFF = 0 V
−0.1

0.1
µA
9
VVADJ = VOUT, VIN = VOUT(S) + 1.0 V,
f = 1.0 kHz, ∆Vrip = 0.5 Vrms,
IOUT = 50 mA, VOUT(S) = 1.8 V

65

dB
10
Ishort
VIN = VOUT(S) + 1.0 V, ON/OFF pin = ON,
VOUT = 0 V

200

mA
8
TSD
Junction temperature

150

°C

TSR
Junction temperature

120

°C

∆VOUT2
Output voltage
*4
temperature coefficient
Current consumption
during operation
Current consumption
during shutdown
Input voltage
Shutdown pin
input voltage “H”
Shutdown pin
input voltage “L”
Shutdown pin
input current “H”
Shutdown pin
input current “L”
∆VOUT
∆Ta VOUT
10
1.800
VIN
Load regulation
Thermal shutdown
detection temperature
Thermal shutdown
release temperature

1.782
VIN ≥ VOUT(S) + 1.0 V
IOUT = 100 mA, VVADJ = VOUT, VOUT(S) = 1.8 V
VVADJ = VOUT, VOUT(S) + 0.5 V ≤ VIN ≤ 10 V,
IOUT = 100 mA
VVADJ = VOUT, VIN = VOUT(S) + 1.0 V,
1.0 mA ≤ IOUT ≤ 100 mA
VIN = VOUT(S) + 1.0 V, IOUT = 30 mA,
−40 °C ≤ Ta ≤ 85 °C
VIN = VOUT(S) + 1.0 V, VOUT = VVADJ,
ON/OFF pin = ON, no load
VIN = VOUT(S) + 1.0 V, VOUT = VVADJ,
ON/OFF pin = OFF, no load

IOUT
Vdrop
∆VOUT1
∆VIN VOUT
Short-circuit current
VVADJ = VOUT, VIN = VOUT(S) + 1.0 V,
IOUT = 100 mA

RVADJ
Line regulation
Ripple rejection
Conditions
(Ta = 25 °C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit
ISS1
ISS2
RR
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
*1. VOUT(S) : Extarnal setting reference voltage ( = 1.8 V)
*2. The output current at which the output voltage becomes 95% of VVADJ after gradually increasing the output current.
*3. Vdrop = VIN1 − (VOUT3 × 0.98)
VOUT3 is the output voltage when VIN = VOUT(S) + 1.0 V and IOUT = 100 mA.
VIN1 is the input voltage at which the output voltage becomes 98% of VOUT3 after gradually decreasing the input
voltage.
*4. The change in temperature [mV/°C] is calculated using the following equation.
∆VOUT
[mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000
∆Ta
∆Ta VOUT
*1. The change in temperature of the output voltage
*2. Extarnal setting reference voltage
*3. Output voltage temperature coefficient
*5. The output current can be at least this value. Due to restrictions on the package power dissipation, this value may not
be satisfied. Attention should be paid to the power dissipation of the package when the output current is large. This
specification is guaranteed by design.
Seiko Instruments Inc.
11
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Test Circuits
1.
VIN
+
VOUT
ON/OFF
V
VSS
A
+
Set to power ON
Figure 6
2.
+
A
VOUT
VIN
ON/OFF
VSS
Set to VIN or
GND
Figure 7
3.
VIN
+
VOUT
ON/OFF
A
+
V
VSS
Set to power ON
Figure 8
4.
VOUT
VIN
+
+
A
ON/OFF
V
VSS
RL
Figure 9
5.
VIN
VOUT
+
ON/OFF
VSS
V
RL
Set to power ON
Figure 10
12
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
6.
VIN
+
VOUT
VADJ
ON/OFF
V
VSS
A
+
Set to power ON
Figure 11
7.
+
A
VIN
VOUT
VADJ
ON/OFF
VSS
Set to VIN or
GND
Figure 12
8.
VIN
VOUT
VADJ
ON/OFF
+
A
+
V
VSS
Set to power ON
Figure 13
9.
VIN
+
A
VOUT
VADJ
ON/OFF
VSS
+
V
RL
Figure 14
10.
VIN
VOUT
VADJ
ON/OFF
VSS
+
V
RL
Set to power ON
Figure 15
11.
VIN
+
VOUT
VADJ
ON/OFF
VSS
V
A
+
Set to power ON
Figure 16
Seiko Instruments Inc.
13
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Standard Circuit
INPUT
OUTPUT
VIN
CIN
*1
VOUT
ON/OFF
VSS
Single GND
*2
CL
GND
*1. CIN is a capacitor for stabilizing the input.
A ceramic capacitor of 2.2 µF or more can be used as the output capacitor for
products whose output voltage is 1.7 V or less.
*2. A ceramic capacitor of 1.0 µF or more can be used for CL.
A ceramic capacitor of 2.2 µF or more can be used as the output capacitor for
products whose output voltage is 1.7 V or less.
Figure 17
Caution
The above connection diagram and constant will not guarantee successful operation.
thorough evaluation using the actual application to set the constant.
Perform
„ Application Conditions
Input capacitor (CIN) :
Output capacitor (CL) :
ESR of output capacitor :
*1.
1.0 µF or more*1
1.0 µF or more*1
1.0 Ω or less
2.2 µF or more for products whose output voltage is 1.7 V or less
Caution
A general series regulator may oscillate, depending on the external components selected.
that no oscillation occurs with the application using the above capacitor.
Check
„ Selection of Input and Output Capacitors (CIN, CL)
The S-1133 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. Operation is
*1
stabilized by a ceramic capacitor with an output capacitance of 1.0 µF or more in the entire temperature range. However,
when using an OS capacitor, tantalum capacitor, or aluminum electrolytic capacitor, a capacitor with a capacitance of 1.0 µF
or more and an Equivalent Series Resistance (ESR) of 1.0 Ω or less is required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output capacitor.
Perform thorough evaluation using the actual application, including temperature characteristics.
*1.
14
The capacitance is 2.2 µF or more for products whose output voltage is 1.7 V or less.
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Explanation of Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in low onresistance transistor.
2. Low ESR
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1133 Series enables use of a low ESR
capacitor, such as a ceramic capacitor, for the output-side capacitor CL. A capacitor whose ESR is 1.0 Ω or less can
be used.
3. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input voltage*1, fixed
output current, and fixed temperature.
*1.
Differs depending on the product.
Caution
If the above conditions change, the output voltage value may vary and exceed the accuracy
range of the output voltage.
Please see the electrical characteristics and attached
characteristics data for details.
Remark
In the types of the S-1133 Series in which the output voltage is 1.2 to 1.4 V, the output voltage accuracy
is ±15 mV.
∆VOUT1
4. Line regulation ∆V
IN VOUT
Indicates the dependency of the output voltage on the input voltage. That is, the values show how much the output
voltage changes due to a change in the input voltage with the output current remaining unchanged.
5. Load regulation (∆VOUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how much the
output voltage changes due to a change in the output current with the input voltage remaining unchanged.
6. Dropout voltage (Vdrop)
Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where the output
voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased from VIN = VOUT(S) +
1.0 V, and the output voltage at that point (VOUT3 × 0.98).
Vdrop = VIN1 − (VOUT3 × 0.98)
Seiko Instruments Inc.
15
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
∆VOUT
7. Temperature coefficient of output voltage ∆Ta
VOUT
The shadowed area in Figure 18 is the range where VOUT varies in the operating temperature range when the
temperature coefficient of the output voltage is ±130 ppm/°C.
Ex. S-1133B30 Typ.
VOUT
[V]
+0.39 mV/°C
VOUT(E)*1
−0.39 mV/°C
−40
*1.
25
85
Ta [°C]
VOUT(E) is the value of the output voltage measured at 25°C.
Figure 18
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
∆VOUT
[mV/ °C]*1 = VOUT(S)[V ]*2 × ∆VOUT [ppm/ °C]*3 ÷ 1000
∆Ta
∆Ta VOUT
*1.
*2.
*3.
16
Change in temperature of output voltage
Specified output voltage
Output voltage temperature coefficient
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Operation
1. Basic operation
Figure 19 shows the block diagram of the S-1133 Series.
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-divided by
feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary to ensure a certain
output voltage free of any fluctuations of input voltage and temperature.
VIN
*1
Current
supply
Error
amplifier
Vref
VOUT
−
Rf
+
Vfb
Reference
voltage circuit
Rs
VSS
*1.
Parasitic diode
Figure 19
2. Output transistor
The S-1133 Series uses a low on-resistance P-channel MOS FET as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse
current flowing from the VOUT pin through a parasitic diode to the VIN pin.
Seiko Instruments Inc.
17
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-in P-channel
MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially reduce the current
consumption. The VOUT pin becomes the VSS level due to the internally divided resistance of several hundreds kΩ
between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 20. Since the ON/OFF pin is neither pulled down nor pulled
up internally, do not use it in the floating state. In addition, note that the current consumption increases if a voltage of
0.3 V to VIN − 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not used, connect it to the VSS pin if the
logic type is “A” and to the VIN pin if it is “B”.
Table 7
Logic Type
ON/OFF Pin
Internal Circuits
VOUT Pin Voltage
Current Consumption
A
“L”: Power on
Operating
Set value
ISS1
A
“H”: Power off
Stopped
VSS level
ISS2
B
“L”: Power off
Stopped
VSS level
ISS2
B
“H”: Power on
Operating
Set value
ISS1
VIN
ON/OFF
VSS
Figure 20
18
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
4. Thermal shutdown circuit
The S-1133 Series implements a thermal shutdown circuit to protect the device from damage due to overheating.
When the junction temperature rises to 150 °C (typ.), the thermal shutdown circuit operates and the regulator operation
stops. When the junction temperature drops to 120 °C (typ.), the thermal shutdown circuit is released and the
regulator operation resumes.
If the thermal shutdown circuit starts operating due to self-heating, the regulator operation stops and the output voltage
falls. When the regulator operation has stopped, no self-heat is generated and the temperature of the IC is lowered.
When the temperature has dropped, the thermal shutdown circuit is released, the regulator operation resumes, and
self-heat is generated again. By repeating this procedure, the output voltage waveform forms pulses. This
phenomenon, stopping and resuming the regulator operation, continues until the internal power consumption is
reduced by reducing either the input voltage or output current or both, or the ambient temperature is lowered.
Table 8
Thermal Shutdown Circuit
Operating : 150 °C (typ.)*1
Released : 120 °C (typ.)*1
*1. Junction temperature
VOUT Pin Voltage
VSS level
Set value
5. Externally setting output voltage
The S-1133 Series provides the types in which output voltage can be set via the external resistor (S-1133B00/S1133A00). With such types, the external voltage can be optionally set between 1.8 V and 8.2 V by connecting a
resistor (Ra) between the VOUT and VADJ pins and a resistor (Rb) between the VADJ and VSS pins.
The output voltage to be set is determined by the following formulas.
VOUT = 1.8 + Ra × la ·························· (1)
By substituting Ia = IVADJ + 1.8/Rb to above formula (1),
VOUT = 1.8 + Ra × (IVADJ + 1.8/Rb) = 1.8 × (1.0 + Ra/Rb) + Ra × IVADJ ··············· (2)
In above formula (2), Ra × IVADJ is a factor for the output voltage error.
Whether the output voltage error is minute is judged depending on the following (3) formula.
By substituting IVADJ = 1.8/RVADJ to Ra × IVADJ
VOUT = 1.8 × (1.0 + Ra/Rb) + 1.8 × Ra/RVADJ ·························· (3)
If RVADJ is sufficiently larger than Ra, the error is judged as minute.
VOUT
VIN
IVADJ
VADJ
RVADJ
Ia
Ra
1.8 V
Ib
Rb
VOUT
VSS
Figure 21
The following expression is in order to determine output voltage VOUT = 3.0 V.
If resistance Rb = 2 KΩ, substitute internal resistance in adjust pin RVADJ = 200 kΩ (typ.) into (3),
Resistance Ra = (3.0/1.8-1) × ((2 k × 200 k)/(2 k + 200 k)) ≒ 1.3 kΩ
Caution The above connection diagrams and constants will not guarantee successful operation.
thorough evaluation using the actual application to set the constants.
Seiko Instruments Inc.
Perform
19
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Precautions
• Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low. When
mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing the input between
VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as short as possible.
• When setting the output voltage using the external resistor, connect the resistors, Ra between the VOUT and VADJ
pins and Rb between the VADJ and VSS pins close to the respective pins.
• In the product that users set the output voltage externally, it is possible to set a voltage arbitrarily; by feeding back
the voltage which is from VOUT to the VADJ pin, after dividing it with the dividers connected between the VOUT and
VADJ pin and the VADJ and VSS pin.
Note that if any device other than the divider specified above is connected between the VOUT and VADJ pin or the
VADJ and VSS pin, S-1133 Series may not work stably as a voltage regulator IC.
• Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or less).
• Note that the output voltage may increase due to driver leakage when a series regulator is used at high
temperatures.
• A general series regulator may oscillate, depending on the external components selected. The following conditions
are recommended for this IC. However, be sure to perform sufficient evaluation under the actual usage conditions
for selection, including evaluation of temperature characteristics.
Input capacitor (CIN) :
Output capacitor (CL) :
Equivalent series resistance (ESR) :
*1.
1.0 µF or more*1
1.0 µF or more*1
1.0 Ω or less
The capacitance is 2.2 µF or more for products whose output voltage is 1.7 V or less.
• The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitor is small
or an input capacitor is not connected.
• The power supply fluctuation and load fluctuation characteristics become worse. It is therefore important to
sufficiently evaluate the output voltage fluctuation in the actual equipment.
• If the power supply suddenly increases sharply, a momentary overshoot may be output. It is therefore important to
sufficiently evaluate the output voltage at power application in the actual equipment.
• When the thermal shutdown circuit starts operating and the regulator stops, input voltage may exceed the absolute
maximum ratings.
It will be affected largely when input voltage, output current and inductance of power supply are high.
Perform thorough evaluation using the actual application.
• The application conditions for the input voltage, output voltage, and load current should not exceed the package
power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• In determining the output current, attention should be paid to the output current value specified in Tables 5 and 6 in
“Electrical Characteristics” and footnote *5 of the table.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
20
Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Characteristics (Typical Data)
(1) Output voltage vs. Output current (when load current increases) (Ta = 25 °C)
S-1133B30
= VOUT [V]
S-1133B12
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
VIN = 3.5 V
4.0 V
5.0 V
10.0 V
0
100 200 300 400 500 600 700
IOUT [mA]
VOUT [V]
S-1133B60
7
6
5
4
3
2
1
0
VIN = 6.5 V
7.0 V
8.0 V
10.0 V
0
100 200 300 400 500 600 700
IOUT [mA]
Remark In determining the output current, attention
should be paid to the following.
1. The minimum output current value and
footnote *5 in Table 5 to 6 in the
“Electrical Characteristics”
2. The package power dissipation
(2) Output voltage vs. Input voltage (Ta = 25 °C)
1.25
3.0
1.20
2.9
IOUT = 1 mA
2.8
30 mA
2.7
100 mA
IOUT = 1 mA
30 mA
100 mA
1.15
1.10
1.05
1.00
VOUT [V]
S-1133B30
3.1
VOUT [V]
S-1133B12
1.30
1.0
1.5
2.0
2.5
VIN [V]
2.6
3.0
3.5
6.5
7.0
2.5
2.5
3.0
3.5
4.0
VIN [V]
4.5
5.0
VOUT [V]
S-1133B60
6.5
6.0
IOUT = 1 mA
5.5
30 mA
5.0
4.5
100 mA
4.5
5.0
5.5
6.0
VIN [V]
Seiko Instruments Inc.
21
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
(3) Dropout voltage vs. Output current
- °
°
°
S-1133B60
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
S-1133B30
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
−40°C
25°C
Vdrop [V]
S-1133B12
85°C
0
Vdrop [V]
−40°C
25°C
85°C
0
50
100 150 200 250 300 350
IOUT [mA]
(4) Dropout voltage vs. Set output voltage
22
Seiko Instruments Inc.
50
100 150 200 250 300 350
IOUT [mA]
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
(5) Output voltage vs. Ambient temperature
S-1133B30
S-1133B12
- -
°
°
-
-
°
S-1133B60
-
-
(6) Current consumption vs. Input voltage
S-1133B30
60
ISS1 [µA]
50
25°C
40
−40°C
85°C
30
20
50
ISS1 [µA]
S-1133B12
60
30
20
10
10
0
0
0
1
2
3
4
5 6
VIN [V]
7
8
9 10
25°C
85°C
40
−40°C
0
1
2
3
4
5 6
VIN [V]
7
8
9 10
S-1133B60
60
ISS1 [µA]
50
85°C
40
25°C
30
20
−40°C
10
0
0
1
2
3
4
5 6
VIN [V]
7
8
9 10
Seiko Instruments Inc.
23
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
(7) Ripple rejection (Ta = 25 °C)
S-1133B30
S-1133B12
100
Ripple Rejection [dB]
VIN = 2.2 V, COUT = 2.2 µF
IOUT = 1 mA
80
50 mA
60
40
20
100 mA
0
10
100
1K
10K 100K
Frequency [Hz]
1M
VIN = 4.0 V, COUT = 1.0 µF
!"#$ = S-1133B60
24
VIN = 7.0 V, COUT = 1.0 µF
!"#$ = Seiko Instruments Inc.
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Reference Data
(1) Input transient response characteristics (Ta = 25 °C)
3.0
2.5
1.24
2.0
1.20
1.5
VOUT
1.16
1.12
−20 0
3
3.04
VOUT
3.00
1.0
2.96
0.5
2.92
20 40 60 80 100 120 140 160 180
t [µs]
2
VIN [V]
VIN
1.28
VIN [V]
VOUT [V]
1.32
S-1133B30
IOUT = 100 mA, tr = tf = 5.0 µs, COUT = 1.0 µF, CIN = 1.0 µF
3.16
6
VIN
3.12
5
4
3.08
VOUT [V]
S-1133B12
IOUT = 100 mA, tr = tf = 5.0 µs, COUT = 2.2 µF, CIN = 2.2 µF
1.36
3.5
1
0
−20 0
20 40 60 80 100 120 140 160 180
t [µs]
6
6.04
VOUT
6.00
5.96
5.92
5
VIN [V]
VOUT [V]
S-1133B60
IOUT = 100 mA, tr = tf = 5.0 µs, COUT = 1.0 µF, CIN = 1.0 µF
6.16
9
VIN
6.12
8
7
6.08
4
3
−20 0
20 40 60 80 100 120 140 160 180
t [µs]
(2) Load transient response characteristics (Ta = 25 °C)
1.3
1.2
VOUT
1.1
1.0
−40 −20 0 20 40 60 80 100 120 140 160
t [µs]
100
3.12
50
3.08
0
−50
VOUT [V]
1.4
IOUT
IOUT [mA]
VOUT [V]
1.5
S-1133B30
VIN = 4.0 V, COUT = 1.0 µF, CIN = 1.0 µF, IOUT = 50 ↔ 100 mA
3.16
150
3.04
3.00
−100
2.96
−150
2.92
IOUT
VOUT
100
50
0
−50
IOUT [mA]
S-1133B12
VIN = 2.2 V, COUT = 2.2 µF, CIN = 2.2 µF, IOUT = 50 ↔ 100 mA
1.6
150
−100
−40 −20 0 20 40 60 80 100 120 140 160
t [µs]
−150
S-1133B60
VIN = 7.0 V, COUT = 1.0 µF, CIN = 1.0 µF, IOUT = 50 ↔ 100 mA
6.16
150
6.08
IOUT
6.04
6.00
50
0
VOUT
−50
−100
5.96
5.92
100
IOUT [mA]
VOUT [V]
6.12
−40 −20 0 20 40 60 80 100 120 140 160
t [µs]
−150
Seiko Instruments Inc.
25
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
(3) ON/OFF pin transient response characteristics (Ta = 25 °C)
S-1133B30
VIN = 4.0 V, COUT = 1.0 µF, CIN = 1.0 µF, IOUT = 100 mA
10
6
0
1
−2
−1
VOUT
−40 −20 0 20 40 60 80 100 120 140 160
t [µs]
VOUT [V]
VON/OFF
6
4
2
−4
0
−6
−2
S-1133B60
VIN = 7.0 V, COUT = 1.0 µF, CIN = 1.0 µF, IOUT = 100 mA
8
14
12
6
VON/OFF
10
4
8
2
0
6
VOUT
4
−2
2
−4
0
−6
−2
−8
−40 −20 0 20 40 60 80 100 120 140 160
t [µs]
26
VOUT [V]
2
2
0
8
4
VON/OFF [V]
VON/OFF
3
4
2
0
VOUT
−40 −20 0 20 40 60 80 100 120 140 160
t [µs]
VON/OFF [V]
VOUT [V]
4
Seiko Instruments Inc.
−2
−4
−6
VON/OFF [V]
S-1133B12
VIN = 2.2 V, COUT = 2.2 µF, CIN = 2.2 µF, IOUT = 100 mA
5
6
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
„ Marking Specifications
(1) SOT-89-5
SOT-89-5
Top view
1
(1) to (3) :
(4) to (6) :
Product code (Refer to Product name vs. Product code.)
Lot number
(4) (5) (6)
4
(1) (2) (3)
5
2
3
Product name vs. Product code
Product code
Product name
(1)
(2)
(3)
S-1133B00-U5T1G
Q
8
A
S-1133B36-U5T1G
S-1133B12-U5T1G
Q
8
B
S-1133B37-U5T1G
S-1133B13-U5T1G
Q
8
C
S-1133B38-U5T1G
S-1133B14-U5T1G
Q
8
D
S-1133B39-U5T1G
S-1133B15-U5T1G
Q
8
E
S-1133B40-U5T1G
S-1133B16-U5T1G
Q
8
F
S-1133B41-U5T1G
S-1133B17-U5T1G
Q
8
G
S-1133B42-U5T1G
S-1133B18-U5T1G
Q
8
H
S-1133B43-U5T1G
S-1133B19-U5T1G
Q
8
I
S-1133B44-U5T1G
S-1133B20-U5T1G
Q
8
J
S-1133B45-U5T1G
S-1133B21-U5T1G
Q
8
K
S-1133B46-U5T1G
S-1133B22-U5T1G
Q
8
L
S-1133B47-U5T1G
S-1133B23-U5T1G
Q
8
M
S-1133B48-U5T1G
S-1133B24-U5T1G
Q
8
N
S-1133B49-U5T1G
S-1133B25-U5T1G
Q
8
O
S-1133B50-U5T1G
S-1133B26-U5T1G
Q
8
P
S-1133B51-U5T1G
S-1133B27-U5T1G
Q
8
Q
S-1133B52-U5T1G
S-1133B28-U5T1G
Q
8
R
S-1133B53-U5T1G
S-1133B29-U5T1G
Q
8
S
S-1133B54-U5T1G
S-1133B30-U5T1G
Q
8
T
S-1133B55-U5T1G
S-1133B31-U5T1G
Q
8
U
S-1133B56-U5T1G
S-1133B32-U5T1G
Q
8
V
S-1133B57-U5T1G
S-1133B33-U5T1G
Q
8
W
S-1133B58-U5T1G
S-1133B34-U5T1G
Q
8
X
S-1133B59-U5T1G
S-1133B35-U5T1G
Q
8
Y
S-1133B60-U5T1G
Remark Please contact the SII marketing department for type A products.
Product name
Seiko Instruments Inc.
(1)
Q
Q
Q
Q
Q
Q
Q
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Q
Q
Q
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Q
Q
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Product code
(2)
(3)
8
Z
9
A
9
B
9
C
9
D
9
E
9
F
9
G
9
H
9
I
9
J
9
K
9
L
9
M
9
N
9
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9
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9
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9
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9
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9
T
9
U
9
V
9
W
9
X
27
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.2.1_00
S-1133 Series
(2) SNT-8A
SNT-8A
Top view
(1) (2) (3) (4)
(9) (10) (11)
4
(5) (6) (7) (8)
1
8
(1)
(2) to (4)
(5), (6)
(7) to (11)
Blank
Product code (Refer to Product name vs. Product code)
Blank
Lot number
5
Product name vs. Product code
Product code
Product name
(2)
(3)
(4)
S-1133B00-I8T1G
Q
8
A
S-1133B36-I8T1G
S-1133B12-I8T1G
Q
8
B
S-1133B37-I8T1G
S-1133B13-I8T1G
Q
8
C
S-1133B38-I8T1G
S-1133B14-I8T1G
Q
8
D
S-1133B39-I8T1G
S-1133B15-I8T1G
Q
8
E
S-1133B40-I8T1G
S-1133B16-I8T1G
Q
8
F
S-1133B41-I8T1G
S-1133B17-I8T1G
Q
8
G
S-1133B42-I8T1G
S-1133B18-I8T1G
Q
8
H
S-1133B43-I8T1G
S-1133B19-I8T1G
Q
8
I
S-1133B44-I8T1G
S-1133B20-I8T1G
Q
8
J
S-1133B45-I8T1G
S-1133B21-I8T1G
Q
8
K
S-1133B46-I8T1G
S-1133B22-I8T1G
Q
8
L
S-1133B47-I8T1G
S-1133B23-I8T1G
Q
8
M
S-1133B48-I8T1G
S-1133B24-I8T1G
Q
8
N
S-1133B49-I8T1G
S-1133B25-I8T1G
Q
8
O
S-1133B50-I8T1G
S-1133B26-I8T1G
Q
8
P
S-1133B51-I8T1G
S-1133B27-I8T1G
Q
8
Q
S-1133B52-I8T1G
S-1133B28-I8T1G
Q
8
R
S-1133B53-I8T1G
S-1133B29-I8T1G
Q
8
S
S-1133B54-I8T1G
S-1133B30-I8T1G
Q
8
T
S-1133B55-I8T1G
S-1133B31-I8T1G
Q
8
U
S-1133B56-I8T1G
S-1133B32-I8T1G
Q
8
V
S-1133B57-I8T1G
S-1133B33-I8T1G
Q
8
W
S-1133B58-I8T1G
S-1133B34-I8T1G
Q
8
X
S-1133B59-I8T1G
S-1133B35-I8T1G
Q
8
Y
S-1133B60-I8T1G
Remark Please contact the SII marketing department for type A products.
Product name
28
Seiko Instruments Inc.
(2)
Q
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Q
Q
Q
Q
Q
Q
Q
Q
Product code
(3)
(4)
8
Z
9
A
9
B
9
C
9
D
9
E
9
F
9
G
9
H
9
I
9
J
9
K
9
L
9
M
9
N
9
O
9
P
9
Q
9
R
9
S
9
T
9
U
9
V
9
W
9
X
4.5±0.1
1.5±0.1
1.6±0.2
5
1
4
2
3
1.5±0.1 1.5±0.1
0.4±0.05
0.3
0.4±0.1
0.4±0.1
45°
0.45±0.1
No. UP005-A-P-SD-1.1
TITLE
SOT895-A-PKG Dimensions
UP005-A-P-SD-1.1
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1(10 pitches : 40.0±0.2)
ø1.5 +0.1
-0
2.0±0.05
5° max.
ø1.5 +0.1
-0
0.3±0.05
8.0±0.1
2.0±0.1
4.75±0.1
3 2 1
4
5
Feed direction
No. UP005-A-C-SD-1.1
TITLE
SOT895-A-Carrier Tape
UP005-A-C-SD-1.1
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
16.5max.
13.0±0.3
Enlarged drawing in the central part
(60°)
(60°)
No. UP005-A-R-SD-1.1
TITLE
SOT895-A-Reel
No.
UP005-A-R-SD-1.1
SCALE
QTY.
UNIT
mm
Seiko Instruments Inc.
1,000
0.7
0.7
1.0
2.0
1.5
1.5
No. UP005-A-L-S1-1.0
TITLE
SOT895-A-Land Recommendation
UP005-A-L-S1-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
1.97±0.03
8
7
6
5
3
4
+0.05
1
0.5
2
0.08 -0.02
0.48±0.02
0.2±0.05
No. PH008-A-P-SD-2.0
TITLE
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
+0.1
ø1.5 -0
5°
2.25±0.05
4.0±0.1
2.0±0.05
ø0.5±0.1
0.25±0.05
0.65±0.05
4.0±0.1
4 321
5 6 78
Feed direction
No. PH008-A-C-SD-1.0
TITLE
SNT-8A-A-Carrier Tape
PH008-A-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PH008-A-R-SD-1.0
TITLE
SNT-8A-A-Reel
No.
PH008-A-R-SD-1.0
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
5,000
0.52
2.01
0.52
0.3
0.2
0.3
0.2
0.3
0.2
0.3
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
No. PH008-A-L-SD-3.0
TITLE
SNT-8A-A-Land Recommendation
PH008-A-L-SD-3.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
•
•
•
•
•
•
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.