19-0971; Rev 0; 9/07 KIT ATION EVALU E L B AVAILA Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs The MAX8798 includes a high-performance, step-up regulator; a high-speed operational amplifier; a digitally adjustable VCOM calibration device with nonvolatile memory and an I2C interface; and a high-voltage, levelshifting scan driver. The device is optimized for thin-film transistor (TFT) liquid-crystal display (LCD) applications. The step-up DC-DC converter provides the regulated supply voltage for panel source driver ICs. The high switching frequency allows the use of ultra-small inductors and ceramic capacitors. The current-mode control architecture provides fast transient response to pulsed loads typical of source driver loads. The step-up regulator features soft-start and current limit. The high-current operational amplifier is designed to drive the LCD backplane (VCOM). The amplifier features high output current (±150mA), fast slew rate (45V/µs), wide bandwidth (20MHz), and rail-to-rail inputs and outputs. The programmable VCOM calibrator is externally attached to the VCOM amplifier’s resistive voltage-divider and sinks a programmable current to adjust the VCOM output-voltage level. An internal 7-bit digital-to-analog converter (DAC) controls the sink current. The DAC is ratiometric relative to BOOST and is guaranteed to be monotonic over all operating conditions. The calibrator IC includes an EEPROM to store the desired VCOM voltage level. The 2-wire I2C interface between the LCD panel and the programming circuit minimizes panel connector pin count and simplifies production equipment. The high-voltage, level-shifting scan driver is designed to drive the TFT panel gate drivers. Its three outputs swing from +35V (maximum) to -25V (minimum) and can swiftly drive capacitive loads. To save power, the two complementary outputs are designed to allow charge sharing during state changes. The MAX8798 is available in a 36-pin, thin QFN package with a maximum thickness of 0.8mm for ultra-thin LCD panels. Features o 1.8V to 5.5V IN Supply Voltage Range o 1.8V to 4.0V VDD Input Voltage Range o 1.2MHz Current-Mode Step-Up Regulator Fast Transient Response Built-In 20V, 1.9A, 150mΩ MOSFET o High-Speed (20MHz) Operational Amplifier ±150mA Output Current o High-Voltage Drivers with Scan Logic +35V to -25V Outputs Output Charge Sharing o Programmable VCOM Calibrator 7-Bit Adjustable Current-Sink Output I2C Interface EEPROM Setting Memory o Thermal-Overload Protection Simplified Operating Circuit VP VN VIN VMAIN 50kΩ SHDN IN LX DISH 1kΩ CPV SCAN DRIVER LOGIC AND GATE DRIVERS STV OECON VN PGND FB COMP OE SYSTEM 1.9A STEP-UP REG AGND GON GOFF VP STVP BOOST CKVCS NEG PANEL CKVB VCOM CKVBCS Applications TO VCOM BACKPLANE CKV Notebook Computer Displays VL 3.3V LINEAR REG VDD LCD Monitor Panels VIN Ordering Information VCOM CALIBRATOR 7 GND POS BGND OUT SDA SCL PART TEMP RANGE PINPACKAGE MAX8798ETX+ -40°C to +85°C 36 Thin QFN 6mm x 6 mm PKG CODE I2 C BUS SCLS WPP WPN SET T-3666M-1 ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. MAX8798 General Description MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs ABSOLUTE MAXIMUM RATINGS IN, VL, SHDN to AGND .........................................-0.3V to +7.5V VDD, SDA, SCL, SCLS, WPN, WPP, SET to GND...-0.3V to +4.0V OECON, CPV, OE, STV to AGND..........................-0.3V to +4.0V COMP, FB to AGND ......................................-0.3V to (VL + 0.3V) DISH to GND ............................................................-6V to +0.3V LX to PGND ............................................................-0.3V to +20V OUT, VCOM, NEG, POS to BGND........-0.3V to (BOOST + 0.3V) PGND, BGND, AGND to GND...............................-0.3V to +0.3V GON to AGND ........................................................-0.3V to +40V GOFF to AGND .............................................-30V to (VIN + 0.3V) BOOST to BGND ....................................................-0.3V to +20V CKV, CKVB, STVP, CKVCS, CKVBCS to AGND..................(GOFF - 0.3V) to (GON + 0.3V) LX, PGND RMS Current Rating.............................................2.4A Continuous Power Dissipation (TA = +70°C) NiPd Lead Frame with Nonconductive Epoxy 36-Pin, 6mm x 6mm Thin QFN (derate 27.2mW/°C above +70°C) .........................2179.8mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS VDD Input Voltage Range MIN TYP 1.8 MAX UNITS 4.0 V 4 10 μA 1.3 1.75 V VDD Quiescent Current VDD = 3V VDD Undervoltage Lockout VDD rising; typical hysteresis 100mV IN Input Voltage Range (Note 1) 6.0 V IN Quiescent Current VIN = 3V, VFB = 1.5V, not switching 0.04 0.1 mA IN Undervoltage Lockout IN rising; typical hysteresis 100mV 1.4 1.75 Thermal Shutdown 1.8 o Rising edge, hysteresis = 15 C V o 160 C BOOTSTRAP LINEAR REGULATOR (VL) VL Output Voltage I VL = 100μA 3.15 3.3 3.45 VL Undervoltage Lockout VL rising, typical hysteresis 200mV 2.4 2.7 3.0 VL Maximum Output Current VFB = 1.1V 10 V V mA MAIN DC-DC CONVERTER BOOST Supply Current LX not switching, no load on VL LX switching, no load on VL Operating Frequency 990 Oscillator Maximum Duty Cycle FB Regulation Voltage 1170 1350 kHz mA 92 96 % 1.235 1.254 V -0.15 -0.08 +0.15 %/V 125 200 nA 160 280 0 < ILOAD < 200mA, transient only VIN = 1.8V to 5.5V, FB to COMP FB Input Bias Current VFB = 1.25V 50 FB Transconductance I = 5μA at COMP 70 FB Voltage Gain FB to COMP FB Fault Timer Trip Threshold Falling edge LX On-Resistance LX Leakage Current LX Current Limit Duty cycle = 65% 2 4 88 FB Line Regulation Soft-Start Period 2 3 1.216 FB Load Regulation Current-Sense Transresistance 1.5 -1 % 2400 0.96 μS V/V 1 1.04 V ILX = 1.2A 150 300 m VLX = 18V 0.01 20 μA 1.6 1.9 2.2 A 0.25 0.42 0.55 V/A 3 _______________________________________________________________________________________ ms Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 18 V 19 19.9 V 1.4 V OPERATIONAL AMPLIFIER BOOST Supply Range 5 BOOST Overvoltage Fault Threshold (Note 2) BOOST Undervoltage Fault Threshold (Note 3) 1.0 1V < (VNEG, VPOS) < (VBOOST - 1V) 1V < (VNEG, VPOS) < (VBOOST - 1V) 120 Large-Signal Voltage Gain Common-Mode Rejection Ratio 18.1 dB 75 dB 1V < (VNEG, VPOS) < (VBOOST - 1V) -25 -5 +25 VBOOST/2 +15 -2.5 +12 Input Bias Current 1V < (VNEG, VPOS) < (VBOOST - 1V) -50 +50 nA Input Common-Mode Voltage Range 1V < (VNEG, VPOS) < (VBOOST - 1V) 0 VBOOST V VCOM Output Voltage Swing High I VCOM = 5mA VCOM Output Voltage Swing Low I VCOM = -5mA 50 VCOM Output-Current High VVCOM = VBOOST - 1V -75 mA VCOM Output-Current Low VVCOM = 1V +75 mA Slew Rate 1V < (VNEG, VPOS) < (VBOOST - 1V) 40 V/μs -3dB Bandwidth 1V < (VNEG, VPOS) < (VBOOST - 1V) 20 MHz Input Offset Voltage VCOM Short-Circuit Current VBOOST VBOOST - 100 - 50 Short to VBOOST/2, sourcing 50 150 Short to VBOOST/2, sinking 50 150 mV mV 100 mV mA PROGRAMMABLE VCOM CALIBRATOR GON Input Range 16.1 GON Threshold to Enable Program Rising edge, 60mV hysteresis SET Voltage Resolution SET Differential Nonlinearity 35.0 15.6 16.0 7 Monotonic overtemperature V V Bits -2 +1 +2 LSB SET Zero-Scale Error -1 +2 LSB SET Full-Scale Error -3 +3 LSB 120 μA To GND, VBOOST = 18V 8.5 170.0 To GND, VBOOST = 6V 2.5 50.0 SET Current SET External Resistance (Note 4) k VSET/VBOOST Voltage Ratio DAC full scale 0.05 V/V OUT Leakage Current When OUT is off 1 nA OUT Settling Time To ±0.5 LSB error band 20 μs VSET + 0.5V OUT Voltage Range EEPROM Write Cycles (Note 5) 1000 18 V Times _______________________________________________________________________________________ 3 MAX8798 ELECTRICAL CHARACTERISTICS (continued) MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 0.3 x VDD V 2-WIRE INTERFACE Logic-Input Low Voltage (VIL) SDA, SCL, WPN, VDD = 3V Logic-Input High Voltage (VIH) SDA, SCL, WPN, VDD = 3V WPP Logic-Output Low Voltage IWPP = 1mA WPP Logic-Output High Voltage IWPP = 1mA 0.7 x VDD V +0.1 VDD 0.1 SDA Logic-Output Low Sink Current SDA forced to 3.3V 6 Logic Input Current SDA, SCL, SCL_S,WPN to VDD or GND -1 Input Capacitance SDA, SCL, SCL_S V V mA +1 μA 500 kHz 5 pF SCL Frequency (fCLK) DC SCL High Time (tCLH) SCL Low Time (tCLL) 600 ns 1300 ns SDA, SCL, SCLS Rise Time (tR) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS SDA, SCL, SCLS Fall Time (tF) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS START Condition Hold Time (tHDSTT) 10% of SDA to 90% of SCL START Condition Setup Time (tSVSTT) 300 ns 300 ns 600 ns 600 ns Data Input Hold Time (tHDDAT) 0 ns Data Input Setup Time (tSUDAT) 150 ns STOP Condition Setup Time (tSVSTP) 600 ns Bus Free Time (tUF) Input Filter Spike Suppression (tSP) SCL-SCLS Switch Resistance 1300 ns SDA, SCL (Note 5) WPN = GND 250 1 WPN = VDD ns M 20 50 35 V HIGH-VOLTAGE SCAN DRIVER GON Input Voltage Range 12 GOFF Input Voltage Range -2 V GON Supply Current STV, CPV, OE, OECON = AGND -25 250 350 μA GOFF Supply Current STV, CPV, OE, OECON = AGND 100 200 μA Output-Voltage Low CKV, CKVB, STVP, -5mA output current Output-Voltage High CKV, CKVB, STVP, 5mA output current Propagation Delay Between OE CPV = 0, STV = 0, CLOAD = 4.7nF, 50 Rising Edge and CKV/CKVB Edge 4 VGOFF + 0.2 VGOFF + 0.05 V VGON - 0.05 VGON - 0.2 V 250 450 ns _______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS Output Slew Rate CKV, CKVB Without charge sharing, STV = VDD, CLOAD = 4.7nF, 50 Propagation Delay Between STV and STVP CLOAD = 4.7nF STVP Output Slew Rate CLOAD = 4.7nF, 50 Charge-Sharing Discharge Path Resistance CKV to CKVCS and CKVB to CKVBCS MIN TYP 20 40 250 20 DISH Discharge Path Resistance GOFF to -3V, DISH = -3V DISH Turn-On Threshold 450 ns V/μs 250 400 250 500 STV, CPV, OE Input Low Voltage -1.8 V 0.8 V 1.6 V OECON Input Low Voltage 1.5 OECON Input High Voltage UNITS V/μs 40 Dish falling STV, CPV, OE Input High Voltage MAX 2.0 V V OECON Sink Current OECON = 5W = VDD 0.4 STV, CPV, OE Input Current VSTV = VDD or GND, VCPV = VDD or GND, VOE = VDD or GND, VOECON = VDD or GND 0.8 mA -1 +1 μA CKV, CKVB, STVP Output Three-State Current VCKV = GON or GOFF, three-state VCKVB = GON or GOFF, three-state VCKVCS = GON or GOFF, three-state VCKVBCS = GON or GOFF, three-state VSTVP = GON or GOFF, three-state -1 +1 μA 0.6 V CONTROL INPUTS SHDN Input Low Voltage Input High Voltage SHDN Input Current SHDN, 1.8V < VIN < 3.0V 1.8 SHDN, 3.0V < VIN < 5.5V SHDN = 0V or 3V 2.0 V -1 +1 μA ELECTRICAL CHARACTERISTICS (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS VDD Input Voltage Range MIN 1.8 TYP MAX UNITS 4.0 V 10 μA 1.75 V VDD Quiescent Current VDD = 3V VDD Undervoltage Lockout VDD rising; typical hysteresis 100mV IN Input Voltage Range (Note 1) 6.0 V IN Quiescent Current VIN = 3V, VFB = 1.5V, not switching 0.1 mA IN Undervoltage Lockout IN rising; typical hysteresis 100mV 1.75 V 1.8 _______________________________________________________________________________________ 5 MAX8798 ELECTRICAL CHARACTERISTICS (continued) MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS MIN TYP MAX UNITS BOOTSTRAP LINEAR REGULATOR (VL) VL Output Voltage I VL = 100μA 3.15 3.45 V VL Undervoltage Lockout VL rising, typical hysteresis 100mV 2.4 3.0 V MAIN DC-DC CONVERTER BOOST Supply Current LX not switching, no load on VL 2 LX switching, no load on VL 4 Operating Frequency Oscillator Maximum Duty Cycle FB Regulation Voltage FB Line Regulation VIN = 1.8V to 5.5V, FB to COMP FB Transconductance I = 5μA at COMP FB Fault-Timer Trip Threshold Falling edge LX On-Resistance ILX = 1.2A LX Current Limit Duty cycle = 65% mA 990 1350 kHz 88 96 % 1.216 1.254 V -0.15 +0.15 %/V 70 280 μS 0.96 1.04 V 300 m 2.2 A 1.6 OPERATIONAL AMPLIFIER BOOST Supply Range BOOST Overvoltage Fault Threshold (Note 2) 5 18 V 18.1 19.9 V BOOST Undervoltage Fault Threshold (Note 3) 1.4 V Input Offset Voltage 1V < (VNEG, VPOS) < (VBOOST - 1V) -25 +25 mV Input Common-Mode Voltage Range 1V < (VNEG, VPOS) < (VBOOST - 1V) 0 VBOOST V VCOM Output-Voltage Swing High I VCOM = 5mA VCOM Output-Voltage Swing Low I VCOM = -5mA VCOM Short-Circuit Current VBOOST - 100 mV 100 Short to VBOOST/2, sourcing 50 Short to VBOOST/2, sinking 50 mV mA PROGRAMMABLE VCOM CALIBRATOR GON Input Range GON Threshold to Enable Program 16.1 Rising edge, 60mV hysteresis SET Voltage Resolution SET Differential Nonlinearity 35.0 16.0 7 Monotonic overtemperature V V Bits -2 +2 LSB SET Zero-Scale Error -1 +2 LSB SET Full-Scale Error -3 +3 LSB 120 μA SET Current SET External Resistance (Note 4) To GND, VBOOST = 18V 8.5 170.0 To GND, VBOOST = 6V 2.5 50.0 VSET + 0.5V 18 OUT Voltage Range EEPROM Write Cycles 6 (Note 5) 1000 _______________________________________________________________________________________ k V Times Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS MIN TYP MAX UNITS 0.3 x VDD V 2-WIRE INTERFACE Logic-Input Low Voltage (VIL) SDA, SCL, WPN, VDD = 3V Logic-Input High Voltage (VIH) SDA, SCL, WPN, VDD = 3V WPP Logic-Output Low Voltage IWPP = 1mA WPP Logic-Output High Voltage IWPP = -1mA SDA Logic-Output Low Sink Current SDA forced to 3.3V SCL Frequency (fCLK) 0.7 x VDD V +0.1 VDD 0.1 V 6 DC V mA 500 kHz SCL High Time (tCLH) 600 ns SCL Low Time (tCLL) 1300 ns SDA, SCLS, and SCL Rise Time (tR) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS SDA, SCLS, and SCL Fall Time (tF) CBUS = total capacitance of bus line in pF 20 + 10 x CBUS START Condition Hold Time (tHDSTT) 10% of SDA to 90% of SCL 300 ns 300 ns 600 ns START Condition Setup Time (tSVSTT) 600 ns Data Input Hold Time (tHDDAT) 0 ns Data Input Setup Time (tSUDAT) 150 ns STOP Condition Setup Time (tSVSTP) 600 ns Bus Free Time (tUF) Input Filter Spike Suppression (tSP) 1300 ns SCL-SCLS Switch Resistance SDA, SCL (Note 5) WPN = GND 250 1 WPN = VDD ns M 50 HIGH-VOLTAGE SCAN DRIVER GON Input Voltage Range 12 35 V GOFF Input Voltage Range -25 -2 V GON Supply Current STV, CPV, OE, OECON = AGND 350 μA GOFF Supply Current STV, CPV, OE, OECON = AGND 200 μA Output-Voltage Low CKV, CKVB, STVP, -5mA output current Output-Voltage High CKV, CKVB, STVP, 5mA output current VGOFF + 0.2 V VGON - 0.2 V _______________________________________________________________________________________ 7 MAX8798 ELECTRICAL CHARACTERISTICS (continued) MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs ELECTRICAL CHARACTERISTICS (continued) (VIN = VDD = VSHDN = +3V, circuit of Figure 2, BOOST = 8V, GON = 23V, GOFF = -12V, VPOS = 0V, VNEG = 1.5V, OE = CPV = STV = OECON = 0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 6) PARAMETER CONDITIONS MIN TYP MAX UNITS 450 ns Propagation Delay Between OE Rising Edge and CKV/CKVB Edge CPV = 0, STV = 0, CLOAD = 4.7nF, 50 Output Slew Rate CKV, CKVB Without charge sharing, STV = VDD, CLOAD = 4.7nF, 50 Propagation Delay Between STV and STVP CLOAD = 4.7nF STVP Output Slew Rate CLOAD = 4.7nF, 50 Charge-Sharing Discharge Path Resistance CKV to CKVCS and CKVB to CKVBCS 400 DISH Switch Resistance GOFF to -3V, DISH = -3V 500 DISH Turn-On Threshold Dish falling -1.8 V 0.8 V 20 V/μs 450 20 V/μs STV, CPV, OE Input Low Voltage STV, CPV, OE Input High Voltage 1.6 V OECON Input Low Voltage 1.5 OECON Input High Voltage OECON Sink Current OECON = STV = VDD ns V 2.0 V 0.4 mA CONTROL INPUTS Input Low Voltage SHDN Input High Voltage SHDN, 1.8V < VIN < 3.0V SHDN, 3.0V < VIN < 5.5V 0.6 1.8 V V 2.0 Note 1: For 5.5V < VIN < 6.0V, use the MAX8798 for no longer than 1% of IC lifetime. For continuous operation, the input voltage should not exceed 5.5V. Note 2: Inhibits boost switching if VBOOST exceeds the threshold This fault is not latched. Note 3: Step-up regulator switching is not enabled until BOOST is above undervoltage threshold. Note 4: SET external resistor range is verified at DAC full scale. Note 5: Guaranteed by design, not production tested. Note 6: -40°C specs are guaranteed by design, not production tested. tHDSTT tR tCLH tCLL SCL tF SDA tHDDAT tSUDAT tSUSTP VIH VIL Figure 1. Timing Definitions Used in the Electrical Characteristics 8 _______________________________________________________________________________________ tBF Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs VIN = 2.2V 60 70 SUPPLY CURRENT (μA) OUTPUT ERROR (%) 70 -0.2 VIN = 3.0V -0.4 VIN = 2.2V -0.6 60 50 0.2A 40 30 20 50 -0.8 40 100 1000 0 1 10 LOAD CURRENT (mA) 100 2.7 2.5 40 1.20 35 1.19 30 2.0 25 20 1.5 IBOOST 15 1.0 10 0.5 5 0 10 35 60 1.18 200mA LOAD 1.17 1.16 1.15 1.14 1.13 1.12 1.10 1.6 85 TEMPERATURE (°C) 2.7 3.8 4.9 6.0 INPUT VOLTAGE (V) STEP-UP REGULATOR LOAD TRANSIENT RESPONSE (20mA TO 300mA) STEP-UP REGULATOR HEAVY-LOAD SOFT-START MAX8798 toc07 MAX8798 toc06 LX 5V/div VLX 10V/div 0V 0V VMAIN 5V/div IL 1A/div 0V IL 500mA/div 0A 0A LOAD CURRENT 200mA/div 0mV VMAIN (AC-COUPLED) 200mV/div SHDN CONTROL 5V/div 0V 2ms/div 6.0 1.11 0 -15 SWITCHING FREQUENCY (MHz) IIN 4.9 STEP-UP CONVERTER SWITCHING FREQUENCY vs. INPUT VOLTAGE IN SUPPLY CURRENT (μA) MAX8798 toc04 3.0 3.8 SUPPLY VOLTAGE (V) LOAD CURRENT (mA) STEP-UP REGULATOR SUPPLY CURRENT vs. TEMPERATURE -40 1.6 1000 MAX8798 toc05 10 NO LOAD 10 -1.0 1 BOOST SUPPLY CURRENT (mA) EFFICIENCY (%) 0 VIN = 5.0V VIN = 3.0V 80 MAX8798 toc02 VIN = 5.0V 80 0.2 MAX8798 toc01 100 90 IN SUPPLY QUIESCENT CURRENT vs. IN SUPPLY VOLTAGE STEP-UP REGULATOR OUTPUT LOAD REGULATION vs. LOAD CURRENT MAX8798 toc03 STEP-UP REGULATOR EFFICIENCY vs. LOAD CURRENT 0mA 100μs/div L = 3.6μH RCOMP = 100kΩ CCOMP1 = 220pF _______________________________________________________________________________________ 9 MAX8798 Typical Operating Characteristics (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs MAX8798 Typical Operating Characteristics (continued) (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) STEP-UP REGULATOR PULSED LOAD TRANSIENT RESPONSE (20mA TO 1A) TIMER-DELAY LATCH RESPONSE TO OVERLOAD MAX8798 toc08 L = 3.6μH RCOMP = 100kΩ CCOMP1 = 220pF MAX8798 toc09 VLX 10V/div 0V VLX 10V/div 0V IL 1A/div 0A VMAIN 5V/div 0V 0mV VMAIN AC-COUPLED 200mV/div IL 2A/div 0A LOAD CURRENT 1A/div IMAIN 1A/div 0A 0A 10μs/div 10ms/div POWER-UP SEQUENCE OF ALL SUPPLY OUTPUTS BOOST SUPPLY CURRENT vs. BOOST SUPPLY VOLTAGE 0V VCOM 5V/div VIN 5V/div 0V 0V VIN = 3.3V 2.5 VGOFF 20V/div SHDN 5V/div SHDN CONTROL 0V 2.0 VIN = 5V 1.5 1.0 0.5 9 12 VBOOST = 8V 1.5 1.0 15 -40 -15 10 35 85 TEMPERATURE (°C) OPERATIONAL AMPLIFIER PSRR vs. FREQUENCY OPERATIONAL AMPLIFIER RAIL-TO-RAIL INPUT/OUTPUT WAVEFORMS MAX8798 toc15 MAX8798 toc14 VPOS 5V/div -10 GAIN (dB) -15 -5 NO LOAD -10 -20 0V -25 -30 -15 -35 -20 VVCOM 5V/div -40 0V -45 -25 100 1k 10k FREQUENCY (Hz) 10 60 OUTPUT VOLTAGE (V) -5 0 GAIN (dB) 6 0 MAX8798 toc13 33pF LOAD 2.0 0 0 3 100pF LOAD VBOOST = 15V 0.5 OPERATIONAL AMPLIFIER FREQUENCY RESPONSE 5 2.5 NO LOAD ON VMAIN 2ms/div 10 3.0 BOOST CURRENT (mA) VGON 20V/div 3.5 MAX8798 toc11 0V 3.0 INPUT CURRENT (mA) 0V VL 5V/div VMAIN 5V/div MAX8798 toc12 MAX8798 toc10 BOOST SUPPLY CURRENT vs. TEMPERATURE 100k 100 1k 10k 100k 10μs/div FREQUENCY (Hz) ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs OPERATIONAL AMPLIFIER LOAD TRANSIENT RESPONSE OPERATIONAL AMPLIFIER SMALL-SIGNAL STEP RESPONSE OPERATIONAL AMPLIFIER LARGE-SIGNAL STEP RESPONSE MAX8798 toc16 MAX8798 toc18 MAX8798 toc17 VVCOM (AC-COUPLED) 200mV/div 0mV VPOS (AC-COUPLED) 100mV/div VPOS 2V/div 0mV 0V IVCOM 100mA/div VCOM (AC-COUPLED) 100mV/div 0mV VCOM 2V/div 0mA 0V 200ns/div 2μs/div 200ns/div STV/STVP INPUT/OUTPUT WAVEFORMS WITH LOGIC INPUT CPV AND OE/CKV AND CKVB INPUT/OUTPUT WAVEFORMS WITH LOGIC INPUT (STV = 0V, CLOAD = 5.0nF AND 50Ω, R1, R2 = 200Ω) STV RISING EDGE PROPAGATION DELAY MAX8798 toc19_1 MAX8798 toc19 MAX8798 toc20 CPV 5V/div 0V OE 5V/div 0V STV 5V/div 0V STV 5V/div 0V CKV 20V/div 0V STVP 10V/div STVP 10V/div 0V 0V CKVB 20V/div 0V 4μs/div 4μs/div 100ns/div OE/CKV RISING EDGE PROPAGATION DELAY STV FALLING EDGE PROPAGATION DELAY OE/CKV FALLING EDGE PROPAGATION DELAY MAX8798 toc20_1 MAX8798 toc21_1 MAX8798 toc21 OE 5V/div STV 5V/div OE 5V/div 0V 0V 0V CKV 10V/div 0V CKV 10V/div 100ns/div 0V STVP 10V/div 0V 100ns/div 100ns/div ______________________________________________________________________________________ 11 MAX8798 Typical Operating Characteristics (continued) (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Typical Operating Characteristics (continued) (Circuit of Figure 2, VIN = 3V, TA = +25°C, unless otherwise noted.) CALIBRATOR SIGNAL LSB DOWNWARD STEP RESPONSE CALIBRATOR SIGNAL LSB UPWARD STEP RESPONSE MAX8798 toc22 MAX8798 toc23 SCL 5V/div 0V SDA 5mV/div 0V VCOM (AC-COUPLED) 10mV/div 0mV VSET (AC-COUPLED) 10mV/div 0mV SCL 5V/div 0V SDA 5V/div 0V VCOM (AC-COUPLED) 10mV/div 0mV VSET (AC-COUPLED) 10mV/div 0mV 40μs/div 40μs/div CALIBRATOR FULL-SCALE UPWARD STEP RESPONSE CALIBRATOR FULL-SCALE DOWNWARD STEP RESPONSE MAX8798 toc24 MAX8798 toc25 SCL 5V/div SCL 5V/div 0V 0V SDA 5V/div 0V SDA 5V/div 0V 4.025V VCOM 2V/div 2.422V 4.025V VCOM 2V/div 2.422V VSET 200mV/div 0mV 0mV 40μs/div 12 VSET 200mV/div 40μs/div ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs PIN NAME FUNCTION 1 CKV High-Voltage, Gate-Pulse Output. When enabled, CKV toggles between its high state (connected to GON) and its low state (connected to GOFF) on each falling edge of the CPV input. Further, CKV floats whenever CPV and OE are both low or whenever CPV is low and OECON is high. 2 CKVCS CKV Charge-Sharing Connection. CKVCS connects to CKV whenever CKV floats to allow connection to CKVB, sharing charge between the capacitive loads on these two outputs. 3 CKVBCS 4 CKVB High-Voltage, Gate-Pulse Output. CKVB is the inverse of CKV during active states and floats whenever CKV floats. 5 STVP High-Voltage, Start-Pulse Output. STVP is low (connected to GOFF) whenever STV is low and is high (connected to GON) only when STV is high and CPV and OE are both low. When STV is high and either CPV or OE is high, STVP floats. 6 STV Vertical Sync Input. The rising edge of STV begins a frame of data. The STV input is used to generate the high-voltage STVP output. 7 OECON Active-Low, Output-Enable Timing Input. OECON is driven by an RC-filtered version of the OE input signal. If OE remains high long enough for the resistor to charge the capacitor up to the OECON threshold, the OE signal is masked until OE goes low and the capacitor is discharged below the threshold through the resistor. 8 OE Active-High, Gate-Pulse Output Enable. CKV and CKVB leave the floating charge-sharing state on the rising edge of OE. 9 CPV Vertical Clock-Pulse Input. CPV controls the timing of the CKV and CKVB outputs, which change state (by first sharing charge) on its falling edge. 10 GND Logic Ground 11 DISH GOFF Discharge Input. Pulling DISH below ground activates an internal connection between GOFF and GND, rapidly discharging the GOFF supply. Typically, DISH is capacitively connected to IN, so that when VIN falls GOFF is discharged. 12 VDD Supply Input. Logic supply input for the VCOM calibrator. Bypass to GND through a minimum 0.1μF capacitor. 13 WPN Active-Low, Write-Protect Input. When WPN is low, I2C commands are ignored and the VCOM calibrator settings cannot be modified. 14 SCLS Alternate I2C-Compatible Clock Input. When WPN is high, SCLS connects to SCL to drive SCL from an alternate clock source. 15 SCL I2C-Compatible Clock Input and Output 16 SDA I2C-Compatible Serial Bidirectional Data Line 17 WPP Write-Protect Output. WPP is the inverse of WPN. It can be used to control active-high, write-protect inputs on other devices. 18 SET Full-Scale, Sink-Current Adjustment Input. Connect a resistor, R SET, from SET to GND to set the fullscale adjustable sink current, which is VBOOST / (20 x R SET). I OUT is equal to the current through RSET. 19 VL 3.3V On-Chip Regulator Output. This regulator powers internal analog circuitry for the step-up regulator, op amp, and VCOM calibrator. External loads up to 10mA can be powered. Bypass VL to GND with a 0.22μF or greater ceramic capacitor. CKVB Charge-Sharing Connection. CKVBCS connects to CKVB whenever CKVB floats to allow connection to CKV, sharing charge between the capacitive loads on these two outputs. ______________________________________________________________________________________ 13 MAX8798 Pin Description Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs MAX8798 Pin Description (continued) 14 PIN NAME 20 BGND Amplifier Ground FUNCTION 21 BOOST Operational Amplifier Supply Input. Connect to VMAIN and bypass to BGND with a 1μF or greater ceramic capacitor. 22 OUT Adjustable Sink-Current Output. OUT connects to the resistive voltage-divider at the op amp input POS (between BOOST and GND) that determines the VCOM output voltage. I OUT lowers the divider voltage by a programmable amount. 23 POS Operational Amplifier Noninverting Input 24 NEG 25 VCOM Operational Amplifier Output 26 SHDN Shutdown Control Input. Pull SHDN low to disable the step-up regulator. The VCOM calibrator, op amp, and scan driver functions remain enabled. 27 IN Operational Amplifier Inverting Input Step-Up Regulator Supply Pin. Bypass IN to AGND (pin 34) with a 1μF or greater ceramic capacitor. 28, 29 LX 30, 31 PGND Switching Node. Connect inductor/catch diode here and minimize trace area for lowest EMI. 32 FB 33 COMP Compensation Pin for Error Amplifier. Connect a series RC from this pin to AGND. Typical values are 180k and 470pF. 34 AGND Ground 35 GOFF Gate-Off Supply. GOFF is the negative supply voltage for the CKV, CKVB, and STVP high-voltage driver outputs. Bypass to PGND with a minimum of 0.1μF ceramic capacitor. 36 GON Gate-On Supply. GON is the positive supply voltage for the CKV, CKVB, and STVP high-voltage driver outputs. Bypass to VMAIN or PGND with a minimum of 0.1μF ceramic capacitor. — EP Power Ground. Source connection of the internal step-up regulator power switch. Feedback Pin. Reference voltage is 1.24V nominal. Connect external resistor-divider midpoint here and minimize trace area. Set V OUT according to: VOUT = 1.24V (1 + R1/R2). Exposed Backside Paddle ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs MAX8798 0.1μF 0.1μF VN -12V, 20mA VP 20V, 20mA 0.1μF 0.1μF 0.1μF 0.1μF 10Ω 0.1μF 0.1μF 1μF D1 2.6μH VIN 2.2V TO 3.6V 0.1μF 10μF 10μF SHDN VN VP IN DISH LX GOFF PGND R1 200kΩ GON FB CPV OE SYSTEM 20kΩ VMAIN 8V, 300mA RCOMP 100kΩ COMP STV R2 34kΩ CCOMP 220pF OECON AGND 3nF STVP 200Ω CKVCS PANEL MAX8798 BOOST CKVB NEG 200Ω CKVBCS VCOM CKV TO VCOM BACKPLANE R3 200kΩ VL VL POS 0.22μF VDD BGND 0.1μF 20kΩ GND VIN R4 200kΩ OUT 20kΩ SDA I2C BUS SCL SCLS WPP WPN SET RSET 25kΩ Figure 2. MAX8798 Typical Operating Circuit ______________________________________________________________________________________ 15 MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs VN VP VIN 1.8V TO 5.5V VMAIN IN SHDN 250kΩ LX DISH 1.6A min STEP-UP 500Ω CPV SCAN DRIVER LOGIC AND GATE DRIVERS STV OECON VN FB COMP OE SYSTEM PGND AGND GON GOFF VP STVP BOOST CKVCS NEG PANEL CKVB VCOM CKVBCS CKV POS VL VL VL VDD BGND OUT VIN GND 7 2 IC INTERFACE DAC SDA I2C BUS SCL SCLS WPP WPN SET Figure 3. MAX8798 Functional Diagram 16 ______________________________________________________________________________________ TO VCOM BACKPLANE Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Detailed Description The MAX8798 typical application circuit (Figure 2) generates a +8V source-driver supply and approximately +20V and -12V gate-driver supplies for TFT displays. The inputvoltage range for the IC is from +1.8V to +5.5V, but the Figure 2 circuit is designed to run from 2.2V to 3.6V. Table 1 lists recommended components and Table 2 lists contact information of component suppliers. Table 1. Component List DESIGNATION DESCRIPTION C1 10μF, 6.3V X5R ceramic capacitor (1206) TDK C3216X5ROJ106M C21, C22 4.7μF, 10V X5R ceramic capacitors (1206) TDK C3216X5R1A475M D1 D2–D5 L1 3A, 30V Schottky diode (M-flat) Toshiba CMS02 200mA, 100V, dual, ultra-fast diodes (SOT23) Fairchild MMBD4148SE 3.6μH, 1.8A inductor Sumida CM0611BHPNP-3R6MC The MAX8798 contains a high-performance step-up switching regulator; one high-speed operational amplifier; one three-channel, high-voltage level-shifting scan driver for active-matrix TFT LCDs; and an I2C-controlled VCOM calibrator. Figure 3 shows the MAX8798 functional diagram. Step-Up Regulator The step-up regulator employs a current-mode, fixedfrequency PWM architecture to maximize loop bandwidth and provide fast transient response to pulsed loads found in source drivers of TFT LCD panels. The high switching frequency (1.2MHz) allows the use of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs. The integrated high-efficiency MOSFET and the IC’s built-in digital soft-start functions reduce the number of external components required while controlling inrush current. The output voltage can be set from VIN to 18V with an external resistive voltage-divider. The regulator controls the output voltage and the power delivered to the output by modulating the duty cycle (D) of the internal power MOSFET in each switching cycle. The duty cycle of the MOSFET is approximated by: V −V D ≈ MAIN IN VMAIN Table 2. Component Suppliers SUPPLIER PHONE FAX WEBSITE Fairchild 408-822-2000 408-822-2102 www.fairchildsemi.com Sumida 847-545-6700 847-545-6720 www.sumida.com TDK 847-803-6100 847-390-4405 www.component.tdk.com Toshiba 949-455-2000 949-859-3963 www.toshiba.com/taec ______________________________________________________________________________________ 17 MAX8798 Typical Application Circuit MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Figure 4 shows the block diagram of the step-up regulator. An error amplifier compares the signal at FB to 1.24V and changes the COMP output. The voltage at COMP determines the current trip point each time the internal MOSFET turns on. As the load varies, the error amplifier sources or sinks current to the COMP output accordingly to produce the inductor peak current necessary to service the load. To maintain stability at high duty cycles, a slope-compensation signal is summed with the current-sense signal. On the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel MOSFET and applying the input voltage across the inductor. The current through the inductor ramps up linearly, storing energy in its magnetic field. Once the sum of the current-feedback signal and the slope compensation exceed the COMP voltage, the controller resets the flipflop and turns off the MOSFET. Since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (D1). The voltage across the inductor then becomes the difference between the output voltage and the input voltage. This discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. The MOSFET remains off for the rest of the clock cycle. Undervoltage Lockout (UVLO) The undervoltage lockout (UVLO) circuit compares the input voltage at IN with the UVLO threshold (1.3V rising and 1.2V falling) to ensure that the input voltage is high enough for reliable operation. The 100mV (typ) hysteresis prevents supply transients from causing a restart. Once the input voltage exceeds the UVLO rising threshold, startup begins. When the input voltage falls below the UVLO falling threshold, the controller turns off the main step-up regulator and the linear regulator, disables the switch-control block, and the operational amplifier output becomes high impedance. LX CLOCK LOGIC AND DRIVER PGND ILIM COMPARATOR SOFTSTART ILIMIT SLOPE COMP PWM COMPARATOR CURRENT SENSE 1.2MHz OSCILLATOR TO FAULT LOGIC 1.0V FAULT COMPARATOR ERROR AMP FB 1.24V COMP Figure 4. Step-Up Regulator Block Diagram 18 ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Bootstrapping and Soft-Start The MAX8798 features bootstrapping operation. In normal operation, the internal linear regulator supplies power to the internal circuitry. The input of the linear regulator (BOOST) should be directly connected to the output of the step-up regulator. The MAX8798 is enabled when the voltages at IN and BOOST are above their UVLO thresholds and the fault latch is not set. After being enabled, the regulator starts open-loop switching to generate the supply voltage for the linear regulator. The internal reference block turns on when the VL voltage exceeds its 2.7V (typ). When the reference voltage reaches regulation, the PWM controller and the current-limit circuit are enabled and the stepup regulator enters soft-start. During soft-start, the main step-up regulator directly limits the peak inductor current, allowing from zero up to the full current-limit value in 128 equal current steps. The maximum load current is available after the output voltage reaches regulation (which terminates soft-start), or after the soft-start timer expires in approximately 3ms. The soft-start routine minimizes the inrush current and voltage overshoot and ensures a well-defined startup behavior. Fault Protection During steady-state operation, the MAX8798 monitors the FB voltage. If the FB voltage does not exceed 1V (typ), the MAX8798 activates an internal fault timer. If there is a continuous fault for the fault-timer duration, the MAX8798 sets the fault latch, turning off the main step-up regulator and the linear regulator, disabling the switch-control block and the operational amplifier. Once the fault condition is removed, cycle the input voltage to clear the fault latch and reactivate the device. The fault-detection circuit is disabled during the soft-start time. The MAX8798 monitors BOOST for undervoltage and overvoltage conditions. If the BOOST voltage is below 1.4V (typ) or above 19V (typ), the MAX8798 disables the gate driver of the step-up regulator and prevents the internal MOSFET from switching. The BOOST undervoltage and overvoltage conditions do not set the fault latch. Operational Amplifier The MAX8798 has an operational amplifier that is typically used to drive the LCD backplane (VCOM) or the gamma-correction-divider string. The operational amplifier features ±150mA output short-circuit current, 40V/µs slew rate, and 20MHz bandwidth. While the op amp is a rail-to-rail input and output design, its accuracy is significantly degraded for input voltages within 1V of its supply rails (BOOST and BGND). Short-Circuit Current Limit The operational amplifier limits short-circuit current to approximately ±150mA if the output is directly shorted to BOOST or to AGND. If the short-circuit condition persists, the junction temperature of the IC rises until it reaches the thermal-shutdown threshold (+160°C typ). Once the junction temperature reaches the thermal-shutdown threshold, an internal thermal sensor immediately sets the thermal-fault latch, shutting off the main step-up regulator, the linear regulator, the switch-control block, and the operational amplifier. Those portions of the device remain inactive until the input voltage is cycled. Driving Pure Capacitive Loads The operational amplifier is typically used to drive the LCD backplane (VCOM) or the gamma-correctiondivider string. The LCD backplane consists of a distributed series capacitance and resistance, a load that can be easily driven by the operational amplifier. However, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. As the operational amplifier’s capacitive load increases, the amplifier’s bandwidth decreases and gain peaking increases. A 5Ω to 50Ω small resistor placed between VCOM and the capacitive load reduces peaking, but also reduces the gain. An alternative method of reducing peaking is to place a series RC network (snubber) in parallel with the capacitive load. The RC network does not continuously load the output or reduce the gain. Typical values of the resistor are between 100Ω and 200Ω and the typical value of the capacitor is 10pF. ______________________________________________________________________________________ 19 MAX8798 Linear Regulator (VL) The MAX8798 includes an internal 3.3V linear regulator. BOOST is the input of the linear regulator. The input voltage range is between 5V and 18V. The regulator powers all the internal circuitry including the MOSFET gate driver. Bypass the VL pin to AGND with a 0.22µF or greater ceramic capacitor. BOOST should be directly connected to the output of the step-up regulator. This feature significantly improves the efficiency at low input voltages. MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs CKV CPV SYSTEM VIDEO TIMING OE CKVB MAX8798 SCAN DRIVER STV STVP HIGH-VOLTAGE SHIFT REGISTER COLUMN DRIVER PANEL GLASS CKV = SCAN CLK ODD CKVB = SCAN CLK EVEN STVP = HIGH-VOLTAGE STV Figure 5. Scan Driver System Diagram High-Voltage Level-Shifting Scan Driver The MAX8798 includes a 3-channel high-voltage (60V) level-shifting scan driver, which includes logic functions necessary to drive row driver functions on the panel glass (Figure 5). The driver outputs (CKV, CKVB, STVP) swing between their power-supply rails (GON and GOFF) according to the input logic levels on the block’s Table 3. STVP Logic SIGNAL LOGIC STATE STV H H H L OECON X X X X CPV L H X X OE L X H X H Hi-Z Hi-Z L STVP X = Don’t care. inputs (STV, CPV, OE, and OECON) and the internal logic of the block (Tables 3, 4). STV is the vertical sync signal. CPV is the horizontal sync signal. OE is the output enable signal. OECON is a timing signal derived from OE that blanks OE if it stays high too long. These signals have CMOS input logic levels set by the IN supply voltage. CKV and CKVB are complementary scan clock outputs. STVP is the output scan start signal. These output signals swing from GON to GOFF, which have a maximum range of +35V and -25V. Their 10Ω (typ) output impedance enables them to swiftly drive capacitive loads. The complementary CKV and CKVB outputs feature power-saving, charge-sharing inputs (CKVCS, CKVBCS) that can be used to save power by shorting each output to its complement during transitions, making a portion of the transition “lossless.” Table 4. CKV, CKVB Logic SIGNAL LOGIC STATE STV H H H L L L L L OECON X X X L L L H H CPV L H X L — X L — OE L X H L X — X X CKV L H H CS Toggle Toggle CS Toggle CKVB H L L CS Toggle Toggle CS Toggle X = Don’t care. CS = Charge share state. 20 ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs The resistive voltage-divider and the BOOST supply set the maximum value of VCOM. OUT sinks current from the voltage-divider to reduce the POS voltage level and VCOM output. The external resistor at SET (RSET) sets the full-scale sink current and the minimum value of VCOM. The DISH input controls a switch between GOFF and PGND. When DISH is pulled below ground by at least 1V, GOFF is rapidly discharged to GND. Typically, DISH is capacitively coupled to IN so that if IN falls suddenly, GOFF is discharged to blank the display (Figure 3). The GON input provides the high voltage required to program the EEPROM. To allow programming, GON is connected to the TFT LCD VGON supply. VGON should be between 16.1V and 35V. EEPROM programming is disabled when GON is below 15.5V (typ). Bypass GON to GND or BOOST (which is bypassed to GND) with a 0.1µF or greater capacitor. VCOM Calibrator The VCOM calibrator is a solid-state alternative to mechanical potentiometers used for adjusting the LCD backplane voltage (VCOM) in TFT LCD displays. OUT attaches to the external resistive voltage-divider at POS and sinks a programmable current (IOUT), which sets the VCOM level (Figure 6). An internal 7-bit DAC controls the sink current and allows the user to increase or decrease the VCOM level. The DAC is ratiometrically relative to VBOOST and is monotonic over all operating conditions. The user can store the DAC setting in an internal EEPROM. On power-up, the EEPROM presets the DAC to the last stored setting. The 2-wire I 2 C interface between the system controller and the programming circuit adjusts the DAC and programs the EEPROM when WPN is high. Thermal-Overload Protection The thermal-overload protection prevents excessive power dissipation from overheating the device. When the junction temperature exceeds TJ = +160°C, a thermal sensor immediately activates the fault protection, which shuts down the step-up regulator, switch control block, operational amplifier, and the internal linear regulator, allowing the device to cool down. Once the device cools down by approximately 15°C, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device. The thermal-overload protection protects the controller in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of TJ = +150°C. VDD VDD VMAIN VDD BOOST LINEAR REGULATOR NEG 19R SDA VCOM SCL WPN I2C CONTROL INTERFACE VCOM R DAC R3 7 I2C BUS POS OUT SCLS R4 EEPROM BLOCK WPP 7 SET GON RSET VGON Figure 6. VCOM Calibrator Functional Diagram ______________________________________________________________________________________ 21 MAX8798 GOFF Rapid Discharge Function (DISH Input) MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Design Procedure Main Step-Up Regulator Inductor Selection The minimum inductance value, peak current rating, and series resistance are factors to consider when selecting the inductor. These factors influence the converter’s efficiency, maximum output-load capability, transient response time, and output-voltage ripple. Physical size and cost are also important factors to be considered. The maximum output current, input voltage, output voltage, and switching frequency determine the inductor value. Very high inductance values minimize the current ripple, and therefore, reduce the peak current, which decreases core losses in the inductor and I2R losses in the entire power path. However, large inductor values also require more energy storage and more turns of wire, which increase physical size and can increase I2R losses in the inductor. Low inductance values decrease the physical size, but increase the current ripple and peak current. Finding the best inductor involves choosing the best compromise between circuit efficiency, inductor size, and cost. The equations used here include a constant called LIR, which is the ratio of the inductor peak-to-peak ripple current to the average DC inductor current at the fullload current. The best trade-off between inductor size and circuit efficiency for step-up regulators generally has an LIR between 0.3 and 0.5. However, depending on the AC characteristics of the inductor core material and ratio of inductor resistance to other power-path resistances, the best LIR can shift up or down. If the inductor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. If the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin high-resistance inductors are used, as is common for LCD panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficiency improvements in typical operating regions. In Figure 2, the LCD’s gate-on and gate-off supply voltages are generated from two unregulated charge pumps driven by the step-up regulator’s LX node. The additional load on LX must therefore be considered in the inductance and current calculations. The effective maximum output current, IMAIN(EFF) becomes the sum of the maximum load current of the step-up regulator’s output plus the contributions from the positive and negative charge pumps: 22 IMAIN(EFF) = IMAIN(MAX) + nNEG × INEG + (nPOS + 1) × IPOS where IMAIN(MAX) is the maximum step-up output current, n NEG is the number of negative charge-pump stages, nPOS is the number of positive charge-pump stages, INEG is the negative charge-pump output current, and IPOS is the positive charge-pump output current, assuming the initial pump source for I POS is VMAIN. Calculate the approximate inductor value using the typical input voltage (VIN), the maximum output current (IMAIN(EFF)), the expected efficiency (ηTYP) taken from an appropriate curve in the Typical Operating Characteristics, and an estimate of LIR based on the above discussion: 2 ⎛ V ⎞ ⎛ VMAIN − VIN ⎞ ⎛ ηTYP ⎞ L = ⎜ IN ⎟ ⎜ ⎜ ⎟ ⎝ VMAIN ⎠ ⎝ IMAIN(EFF) × fOSC ⎟⎠ ⎝ LIR ⎠ Choose an available inductor value from an appropriate inductor family. Calculate the maximum DC input current at the minimum input voltage VIN(MIN) using conservation of energy and the expected efficiency at that operating point (ηMIN) taken from an appropriate curve in the Typical Operating Characteristics: IIN(DCMAX , )= IMAIN(EFF) × VMAIN VIN(MIN) × ηMIN Calculate the ripple current at that operating point and the peak current required for the inductor: IRIPPLE = VIN(MIN) × (VMAIN − VIN(MIN) ) L × VMAIN × fOSC IRIPPLE IPEAK = IIN(DCMAX , )+ 2 The inductor’s saturation current rating and the MAX8798’s LX current limit (ILIM) should exceed IPEAK and the inductor’s DC current rating should exceed IIN(DC,MAX). For good efficiency, choose an inductor with less than 0.1Ω series resistance. Considering Figure 2, the maximum load current (IMAIN(MAX)) is 300mA, with an 8V output and a typical input voltage of 3.3V. The effective full-load step-up current is: IMAIN(EFF) = 300mA + 2 × 20mA + (2 + 1) × 20mA = 400mA ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs 2 ⎛ 3.3V ⎞ ⎛ 8V − 3.3V ⎞ ⎛ 0.85 ⎞ L=⎜ ⎟ ⎜ ⎟⎜ ⎟ ≈ 2.8μH ⎝ 8V ⎠ ⎝ 0.4A × 1.2MHz ⎠ ⎝ 0.5 ⎠ A 2.6µH inductor is chosen. Then, using the circuit’s minimum input voltage (3.0V) and estimating efficiency of 80% at that operating point: IIN(DCMAX , )= 0.4A × 8V ≈ 1.33A 3V × 0.8 The ripple current and the peak current at that input voltage are: IRIPPLE = 3V × (8V − 3V ) 2.6μH × 8V × 1.2MHz IPEAK = 1.33A + ≈ 0.6A 0.6A = 1.53A 2 Output Capacitor Selection The total output-voltage ripple has two components: the capacitive ripple caused by the charging and discharging of the output capacitance, and the ohmic ripple due to the capacitor’s equivalent series resistance (ESR): VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) I ⎛V −V ⎞ VRIPPLE(C) ≈ MAIN ⎜ MAIN IN ⎟ COUT ⎝ VMAINfOSC ⎠ and: VRIPPLE(ESR) ≈ IPEAKRESR(COUT) where I PEAK is the peak inductor current (see the Inductor Selection section). For ceramic capacitors, the output-voltage ripple is typically dominated by VRIPPLE(C). The voltage rating and temperature characteristics of the output capacitor must also be considered. Input Capacitor Selection The input capacitor (CIN) reduces the current peaks drawn from the input supply and reduces noise injection into the IC. A 10µF ceramic capacitor is used in Figure 2 because of the high source impedance seen in typical lab setups. Actual applications usually have much lower source impedance since the step-up regulator often runs directly from the output of another regulated supply. Typically, CIN can be reduced below the values used in Figure 2. Ensure a low noise supply at IN by using adequate CIN. Alternatively, greater voltage variation can be tolerated on CIN if IN is decoupled from CIN using an RC lowpass filter (seen in Figure 2). Rectifier Diode The MAX8798’s high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. In general, a 2A Schottky diode complements the internal MOSFET well. Output Voltage Selection The output voltage of the main step-up regulator is adjusted by connecting a resistive voltage-divider from the output (VMAIN) to AGND with the center tap connected to FB (see Figure 2). Select R2 in the 10kΩ to 50kΩ range. Calculate R1 with the following equation: ⎛V ⎞ R1 = R2 × ⎜ MAIN − 1⎟ ⎝ VREF ⎠ where VREF, the step-up regulator’s feedback set point, is 1.235V (typ). Place R1 and R2 close to the IC. Loop Compensation Choose RCOMP to set the high-frequency integrator gain for fast transient response. Choose CCOMP to set the integrator zero to maintain loop stability. For low-ESR output capacitors, use the following equations to obtain stable performance and good transient response: RCOMP ≈ 1000 × VIN × VOUT × COUT L × IMAIN(MAX) CCOMP ≈ VOUT × COUT 10 × IMAIN(MAX) × RCOMP To further optimize transient response, vary RCOMP in 20% steps and CCOMP in 50% steps while observing transient response waveforms. ______________________________________________________________________________________ 23 MAX8798 Choosing an LIR of 0.5 and estimating efficiency of 85% at this operating point: MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Setting the VCOM Adjustment Range The external resistive voltage-divider sets the maximum value of the VCOM adjustment range. RSET sets the full-scale sink current, IOUT, which determines the minimum value of the VCOM adjustment range. Large RSET values increase resolution, but decrease the VCOM adjustment range. Calculate R3, R4, and RSET using the following procedure: 1) Choose the maximum VCOM level (VMAX), the minimum VCOM level (V MIN), and the V MAIN supply voltage. 2) Select R3 between 10kΩ and 500kΩ based on the acceptable power loss from the VMAIN supply rail connected to BOOST. 3) Calculate R4: R4 ≅ VMAX × R3 V ( BOOST - VMAX ) 4) Calculate RSET: RSET = VMAX × R3 20 × (VMAX − VMIN ) 5) Verify that ISET does not exceed 120µA: ISET = VBOOST 20 × RSET 6) If ISET exceeds 120µA, return to step 2 and choose a larger value for R1. 7) The resulting resolution is: (VMAX − VMIN ) 127 A complete design example is given below: VMAX = 4V, VMIN = 2.4V, VBOOST = 8V If R3 = 200kΩ, then R4 = 200kΩ and R SET = 24.9kΩ. Resolution = 12.5mV Applications Information Power Dissipation An IC’s maximum power dissipation depends on the thermal resistance from the die to the ambient environment and the ambient temperature. The thermal resistance depends on the IC package, PCB copper area, other thermal mass, and airflow. 24 The MAX8798, with its exposed backside paddle soldered to 1in 2 of PCB copper and a large internal ground plane layer, can dissipate about 2.18W into +70°C still air. More PCB copper, cooler ambient air, and more airflow increase the possible dissipation, while less copper or warmer air decreases the IC’s dissipation capability. The major components of power dissipation are the power dissipated in the step-up regulator and the power dissipated by the operational amplifiers. The MAX8798’s largest on-chip power dissipation occurs in the step-up switch, the VCOM amplifier, and the high-voltage scan-driver outputs. Step-Up Regulator The largest portions of the power dissipated by the step-up regulator are the internal MOSFET, the inductor, and the output diode. If the step-up regulator with 3.3V input and 300mA output has about 85% efficiency, about 5% of the power is lost in the internal MOSFET, about 3% in the inductor, and about 5% in the output diode. The remaining few percent are distributed among the input and output capacitors and the PCB traces. If the input power is about 3W, the power lost in the internal MOSFET is about 150mW. Operational Amplifier The power dissipated in the operational amplifier depends on the output current, the output voltage, and the supply voltage: PDSOURCE = IVCOM _ SOURCE × (VBOOST − VVCOM ) PDSINK = IVCOM _ SINK × VVCOM where IVCOM_SOURCE is the output current sourced by the operational amplifier, and IVCOM_SINK is the output current that the operational amplifier sinks. In a typical case where the supply voltage is 8V and the output voltage is 4V with an output source current of 30mA, the power dissipated is 120mW. Scan-Driver Outputs The power dissipated by the scan-driver outputs (CKV, CKVB, and STVP) depends on the scan frequency, the capacitive load, and the difference between the GON and GOFF supply voltages: PDSCAN = 3 × fSCAN × CPANEL × ( VGON − VGOFF ) 2 If the scan frequency is 50kHz, the load of the three outputs is 5nF, and the supply voltage difference is 30V, then the power dissipated is 675mW. ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs RPULLUP ≤ tR CBUS where tR is the rise time in the Electrical Characteristics table, and CBUS is the total capacitance on the bus. The MAX8798 uses a nonstandard I2C interface protocol with mostly standard voltage and timing parameters, as defined in the following subsections. Bus Free Both data and clock lines remain HIGH. Data transfers can be initiated only when the bus is not busy (Figure 7). START Condition (S) Starting from an idle bus state (both SDA and SCL are high), a HIGH to LOW transition of the SDA line while the clock (SCL) is HIGH determines a START condition. All commands must be preceded by a START condition from a master device on the bus. STOP Condition (P) A LOW to HIGH transition of the SDA line while the clock (SCL) is HIGH determines a STOP condition. All operations must be ended with a STOP condition from the master device. Data Valid The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. The master generates one clock pulse per bit of data during write operations and the slave device outputs 1 data bit per clock pulse during read operations. Each data transfer is initiated with a START condition and terminated with a STOP condition. Two bytes are transferred between the START and STOP conditions. Slave Address After generating a START condition, the bus master transmits the slave address consisting of the 7-bit device code (0b1001110 or 9Eh) for the MAX8798 (Figure 8). For a read operation the 8th bit is 1 and for write operations it is 0. The MAX8798 monitors the bus for its corresponding slave address continuously. It generates an acknowledge bit if it recognizes its slave address and it is not busy programming the EEPROM. SDA SCL S BUS FREE DATA LINE STABLE DATA VALID START CONDITION P CHANGE OF DATA ALLOWED STOP CONDITION BUS FREE Figure 7. I2C Bus Start, Stop, and Data Change Conditions S T A R T SLAVE ADDRESS 1001111 R/W A C K DATA BYTE D6 D5 D4 D3 D2 D1 D0 P R O G A C K S T O P READ BYTE: R/W = 1, MAX8798 OUTPUTS D6–D0 FOLLOWED BY PROG = 0 WRITE BYTE: R/W = 2, DATA = D6–D0, PROG = 1 PROGRAM EEPROM: R/W = 0, D6–D0 = DON'T CARE, PROG = 0 Figure 8. I2C Slave Address and Data Byte ______________________________________________________________________________________ 25 MAX8798 VCOM Calibrator Interface The MAX8798 is a slave-only device with an I2C address of 9Eh. The 2-wire I2C-bus-like serial interface (pins SCL and SDA) is designed to attach to a 1.8V to 4V I2C bus. Connect both SCL and SDA lines to the VDD supply through individual pullup resistors. Calculate the required value of the pullup resistors using: MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Data Byte The data byte follows successful transmission of the MAX8798’s slave address (Figure 8). For a read operation, the MAX8798 outputs the 7 bits corresponding to the current DAC setting followed by a 0 bit. For a write operation, the bus master must provide the 7-bit data corresponding to the desired DAC setting followed by a 1 bit. To program the IC’s EEPROM, the master must make the last bit a zero, in which case the other 7 bits of data are ignored. For programming, GON must exceed its programming threshold. Otherwise, programming does not occur and the MAX8798 does not acknowledge the programming command. DAC Values Table 5 lists the DAC values and the corresponding ISET, VSET, and VOUT values. Table 5. DAC Settings 7-BIT DATA BYTE ISET VSET (V) VOUT (V) 0000000 ISET(MAX) VSET(MAX) VMIN 0000001 ISET(MAX) 1-LSB VSET(MAX) 1-LSB VMIN + 1-LSB . . . . . . . . . . . . 1111110 ISET(MIN) + 1-LSB VSET(MIN) + 1-LSB VMAX 1-LSB 1111111 ISET(MIN) VSET(MIN) VMAX Acknowledge/Polling The MAX8798, when addressed, generates an acknowledge pulse after the reception of each byte (Figure 9). The master device must generate an extra clock pulse, which is associated with this acknowledge bit. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse so that the SDA line is stable LOW during the HIGH period of the acknowledge-related clock pulse. Of course, setup and hold times must be taken into account. The master signals an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave leaves the data line HIGH to enable the master to generate the STOP condition. The MAX8798 does not generate an acknowledge while an internal programming cycle is in progress. Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a START condition followed by the device address byte. Only if the internal write cycle has completed does the MAX8798 respond with an acknowledge pulse, allowing the read or write sequence to continue. The MAX8798 does not acknowledge a command to program the EEPROM if VGON is not high enough to properly program the device. Also, a program command must be preceded by a write command. The IC does not acknowledge a program command or program the EEPROM unless the DAC data has been modified since the most recent program command. DATA OUTPUT BY MASTER D7 D6 D0 NOT ACKNOWLEDGE DATA OUTPUT BY MAX8798 ACKNOWLEDGE SCL FROM MASTER S START CONDITION 1 2 8 9 CLK1 CLK2 CLK8 CLK9 ACKNOWLEDGE CLOCK PULSE Figure 9. I2C Bus Acknowledge 26 ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs BOOST and VL bypass capacitor ground connections, and the device’s exposed backside paddle. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside paddle. Make no other connections between these separate ground planes. • • Minimize the area of high-current loops by placing the inductor, output diode, and output capacitors near the input capacitors and near the LX and PGND pins. The high-current input loop goes from the positive terminal of the input capacitor to the inductor, to the IC’s LX pin, out of PGND, and to the input capacitor’s negative terminal. The high-current output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (D1), to the positive terminal of the output capacitors, reconnecting between the output capacitor and input capacitor ground terminals. Connect these loop components with short, wide connections. Avoid using vias in the high-current paths. If vias are unavoidable, use many vias in parallel to reduce resistance and inductance. Create a power ground island (PGND) consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all these together with short, wide traces or a small ground plane. Maximizing the width of the power ground traces improves efficiency and reduces output-voltage ripple and noise spikes. Create an analog ground plane (AGND) consisting of the AGND pin, all the feedback-divider ground connections, the operational-amplifier-divider ground connections, the COMP capacitor ground connection, the • Place the feedback-voltage-divider resistors as close as possible to the feedback pin. The divider’s center trace should be kept short. Placing the resistors far away causes the FB trace to become an antenna that can pick up switching noise. Care should be taken to avoid running the feedback trace near LX or the switching nodes in the charge pumps. • Place the IN pin and VL pin bypass capacitors as close as possible to the device. The ground connections of the IN and VL bypass capacitors should be connected directly to the AGND pin with a wide trace. • Minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. • Minimize the size of the LX node while keeping it wide and short. Keep the LX node away from the feedback node and analog ground. Use DC traces as shield if necessary. Refer to the MAX8798 evaluation kit for an example of proper board layout. ______________________________________________________________________________________ 27 MAX8798 PCB Layout and Grounding Careful PCB layout is important for proper operation. Use the following guidelines for good PCB layout: Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Chip Information TRANSISTOR COUNT: 15,227 PROCESS: BiCMOS NEG POS OUT BOOST BGND VL IN TOP VIEW SHDN VCOM MAX8798 Pin Configuration 27 26 25 24 23 22 21 20 19 SET WPP LX LX 28 18 29 17 PGND PGND 30 16 31 15 FB COMP 32 AGND GOFF GON 34 12 35 11 SCLS WPN VDD DISH 36 10 GND 14 MAX8798 4 5 6 7 8 9 OE 2 CPV 1 CKV 3 13 CKVCS CKVBCS CKVB STVP STV OECON 33 SDA SCL THIN QFN 28 ______________________________________________________________________________________ Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs QFN THIN.EPS ______________________________________________________________________________________ 29 MAX8798 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) MAX8798 Internal-Switch Boost Regulator with Integrated 3-Channel Scan Driver for TFT LCDs Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.