P-Channel Logic Level Enhancement NIKO-SEM P4404EDG Mode Field Effect Transistor ( Preliminary ) TO-252(DPAK) Lead-Free D PRODUCT SUMMARY V(BR)DSS RDS(ON) ID -40V 44mΩ -10A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Drain-Source Voltage VDS -40 V Gate-Source Voltage VGS ±20 V TC = 25 °C Continuous Drain Current -10 ID TC = 70 °C Pulsed Drain Current -8 1 IDM TC = 25 °C Power Dissipation A -32 30 PD TC = 70 °C W 20 Operating Junction & Storage Temperature Range Lead Temperature (1/16” from case for 10 sec.) Tj, Tstg -55 to 150 TL 275 °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS Junction-to-Case RθJc 4.1 °C / W Junction-to-Ambient RθJA 80 °C / W 1 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1% ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) 2 PARAMETER SYMBOL TEST CONDITIONS LIMITS UNIT MIN TYP MAX STATIC Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = -250µA -40 VGS(th) VDS = VGS, ID = -250µA -1 Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±250 Zero Gate Voltage Drain Current IDSS VDS = -32V, VGS = 0V 1 VDS = -30V, VGS = 0V, TJ = 125 °C 10 Gate Threshold Voltage On-State Drain Current 1 Drain-Source On-State Resistance1 ID(ON) RDS(ON) VDS = -5V, VGS = -10V V -1.8 -3.0 -32 nA µA A VGS = -4.5V, ID = -8A 57 68 VGS = -10V, ID = -10A 38 44 mΩ JAN-17-2005 1 P-Channel Logic Level Enhancement NIKO-SEM Mode Field Effect Transistor ( Preliminary ) Forward Transconductance1 gfs VDS = -10V, ID = -10A P4404EDG TO-252(DPAK) Lead-Free 11 S DYNAMIC Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 70 Total Gate Charge Qg 14 Gate-Source Charge2 Qgs VDS = 0.5V (BR)DSS, VGS = -10V, 2.2 Gate-Drain Charge2 Qgd ID = -10A 1.9 2 2 Turn-On Delay Time Rise Time2 Turn-Off Delay Time2 Fall Time2 660 VGS = 0V, VDS = -10V, f = 1MHz td(on) pF 300 nC 6.0 12.8 tr VDS = -20V, RL = 1Ω 9.2 18.6 td(off) ID ≅ -1A, VGS = -10V, RGS = 6Ω 19.2 34.8 11.8 21.6 tf nS SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current Pulsed Current 3 Forward Voltage1 IS -10 ISM -30 VSD IF = IS, VGS = 0V Reverse Recovery Time trr IF = -5 A, dlF/dt = 100A / µS Reverse Recovery Charge Qrr -1 A V 15.5 nS 7.9 nC Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2％. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. 1 2 REMARK: THE PRODUCT MARKED WITH “P4404EDG”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. JAN-17-2005 2 NIKO-SEM P-Channel Logic Level Enhancement Mode Field Effect Transistor ( Preliminary ) P4404EDG TO-252(DPAK) Lead-Free TYPICAL PERFORMANCE CHARACTERISTICS -Is - Reverse Drain Current(A) Body Diode Forward Voltage Variation with Source Current and Temperature 100 V GS = 0V 10 1 0.1 T A = 125°C 25°C -55°C 0.01 0.001 0 0.2 0.4 0.6 0.8 1.0 1.2 -VSD - Body Diode Forward Voltage(V) 1.4 JAN-17-2005 3 NIKO-SEM P-Channel Logic Level Enhancement Mode Field Effect Transistor ( Preliminary ) P4404EDG TO-252(DPAK) Lead-Free JAN-17-2005 4 P-Channel Logic Level Enhancement NIKO-SEM P4404EDG Mode Field Effect Transistor ( Preliminary ) TO-252(DPAK) Lead-Free TO-252 (DPAK) MECHANICAL DATA mm mm Dimension Dimension Min. Typ. Max. Min. Typ. Max. A 9.35 10.1 H 0.8 B 2.2 2.4 I 6.4 6.6 C 0.48 0.6 J 5.2 5.4 D 0.89 1.5 K 0.6 1 E 0.45 0.6 L 0.64 0.9 F 0.03 0.23 M 4.4 4.6 G 6 6.2 N D E C F B A G M XXXXXXXXX NIKOS J I L H K JAN-17-2005 5