ETC P2503BDG

NIKO-SEM
P2503BDG
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
TO-252
Lead-Free
D
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
30
25mΩ
12A
1.GATE
2.DRAIN
3.SOURCE
G
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
UNITS
Drain-Source Voltage
VDS
30
V
Gate-Source Voltage
VGS
±20
V
TC = 25 °C
Continuous Drain Current
TC = 70 °C
Pulsed Drain Current
12
ID
1
10
IDM
TC = 25 °C
Power Dissipation
30
32
PD
TC = 70 °C
Junction & Storage Temperature Range
A
W
22
Tj, Tstg
-55 to 150
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
UNITS
Junction-to-Case
RθJc
3
°C / W
Junction-to-Ambient
RθJA
75
°C / W
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
UNIT
TYP MAX
STATIC
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V(BR)DSS
VGS = 0V, ID = 250µA
30
VGS(th)
VDS = VGS, ID = 250µA
1
IGSS
IDSS
2.5
V
VDS = 0V, VGS = ±20V
±250
nA
VDS = 24V, VGS = 0V
1
VDS = 20V, VGS = 0V, TJ = 55 °C
10
1
1.5
µA
SEP-30-2004
NIKO-SEM
P2503BDG
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
On-State Drain Current1
Drain-Source On-State Resistance1
Forward Transconductance1
ID(ON)
VDS = 5V, VGS = 10V
TO-252
Lead-Free
30
A
VGS = 4.5V, ID = 6A
25
37
RDS(ON)
VGS = 10V, ID = 12A
18
25
gfs
VDS = 5V, ID = 12A
19
mΩ
S
DYNAMIC
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
2
Qg
Gate-Source Charge2
2
790
VGS = 0V, VDS = 10V, f = 1MHz
pF
175
65
VDS = 0.5V(BR)DSS, VGS = 10V,
Qgs
ID = 12A
16
2.5
nC
Qgd
2.1
Turn-On Delay Time2
td(on)
2.2
4.4
2
tr
VDD = 10V
7.5
15
Turn-Off Delay Time2
td(off)
ID ≅ 1A, VGS = 10V, RGEN = 6Ω
11.8
21.3
3.7
7.4
Gate-Drain Charge
Rise Time
Fall Time
2
tf
nS
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
IS
1.3
Pulsed Current3
ISM
2.6
A
Forward Voltage1
VSD
1
V
IF = 1A, VGS = 0V
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
1
2
REMARK: THE PRODUCT MARKED WITH “P2503BDG”, DATE CODE or LOT #
Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.
2
SEP-30-2004
NIKO-SEM
P2503BDG
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
TO-252
Lead-Free
TYPICAL PERFORMANCE CHARACTERISTICS
Body Diode Forward Voltage Variation with Source Current and Temperature
100
V GS = 0V
T A = 125° C
Is - Reverse Drain Current(A)
10
25° C
1
-55° C
0.1
0.01
0.001
0
3
0.4
0.2
0.6
0.8
1.0
VSD - Body Diode Forward Voltage(V)
1.2
1.4
SEP-30-2004
NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
4
P2503BDG
TO-252
Lead-Free
SEP-30-2004
NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P2503BDG
TO-252
Lead-Free
TO-252 (DPAK) MECHANICAL DATA
mm
mm
Dimension
Dimension
Min.
Typ.
Max.
Min.
Typ.
Max.
A
9.35
10.4
H
0.89
2.03
B
2.2
2.4
I
6.35
6.80
C
0.45
0.6
J
5.2
5.5
D
0.89
1.5
K
0.6
1
E
0.45
0.69
L
0.5
0.9
F
0.03
0.23
M
3.96
G
5.2
6.2
N
4.57
5.18
G
M
2
1
J
I
3
L
H
D
C
E
F
B
A
K
5
SEP-30-2004