ONSEMI NUS5530MNR2G

NUS5530MN
Integrated Power MOSFET
with PNP Low VCE(sat)
Switching Transistor
This integrated device represents a new level of safety and
board−space reduction by combining the 20 V P−Channel FET with a
PNP Silicon Low VCE(sat) switching transistor. This newly integrated
product provides higher efficiency and accuracy for battery powered
portable electronics.
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1
8
2
7
3
6
4
5
Features
•
•
•
•
•
Low RDS(on) (MOSFET) and Low VCE(sat) (Transistor)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive (MOSFET)
Performance DFN Package
This is a Pb−Free Device
Applications
• Power Management in Portable and Battery−Powered Products; i.e.,
(Top View)
Cellular and Cordless Telephones and PCMCIA Cards
8
MAXIMUM RATINGS FOR P−CHANNEL FET
(TA = 25°C unless otherwise noted)
Rating
Symbol
5 sec
Steady
State
Unit
VDS
−20
V
Gate−Source Voltage
VGS
"12
V
Continuous Drain Current
(TJ = 150°C) (Note 1)
TA = 25°C
TA = 85°C
ID
A
−5.3
−3.8
IDM
Continuous Source Current
(Note 1)
IS
Maximum Power Dissipation
(Note 1)
TA = 25°C
TA = 85°C
PD
Operating Junction and Storage
Temperature Range
1
1
Drain−Source Voltage
Pulsed Drain Current
MARKING DIAGRAM
−5.3
A
Y
WW
G
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
A
"20
−3.9
PIN ASSIGNMENT
A
W
2.5
1.3
TJ, Tstg
−3.9
−2.8
DFN8
CASE 506AL
5530
AYWW G
G
1.3
0.7
−55 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size
(Cu area = 1.27 in sq [1 oz] including traces).
Emitter
8
Base
7
N/C
6
Gate
5
Collector
Drain
1
N/C
2
Collector
3
Source
4
Drain
(Bottom View)
ORDERING INFORMATION
Device
NUS5530MNR2G
Package
Shipping †
DFN8
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 0
1
Publication Order Number:
NUS5530MN/D
NUS5530MN
MAXIMUM RATINGS FOR PNP TRANSISTORS (TA = 25°C)
Symbol
Max
Unit
Collector-Emitter Voltage
VCEO
−35
Vdc
Collector-Base Voltage
VCBO
−55
Vdc
Emitter-Base Voltage
VEBO
−5.0
Vdc
IC
−2.0
Adc
Collector Current − Peak
ICM
−7.0
A
Electrostatic Discharge
ESD
HBM Class 3
MM Class C
Rating
Collector Current − Continuous
THERMAL CHARACTERISTICS FOR P−CHANNEL FET
Characteristic
Symbol
Maximum Junction−to−Ambient (Note 4)
t v 5 sec
Steady State
RqJA
Maximum Junction−to−Foot (Drain)
Steady State
RqJF
Typ
Max
40
80
50
95
15
20
Unit
°C/W
°C/W
THERMAL CHARACTERISTICS FOR PNP TRANSISTORS
Characteristic
Total Device Dissipation
TA = 25°C
Derate above 25°C
Thermal Resistance, Junction−to−Ambient
Total Device Dissipation
TA = 25°C
Derate above 25°C
Symbol
Max
Unit
PD (Note 1)
635
mW
5.1
mW/°C
RqJA (Note 1)
200
°C/W
PD (Note 2)
1.35
W
11
mW/°C
Thermal Resistance, Junction−to−Ambient
RqJA (Note 2)
90
°C/W
Thermal Resistance, Junction−to−Lead #1
RqJL
15
°C/W
PDsingle
(Notes 2 & 3)
2.75
W
TJ, Tstg
−55 to +150
°C
Total Device Dissipation (Single Pulse < 10 sec)
Junction and Storage Temperature Range
mm2,
mm2,
1. FR−4 @ 100
1 oz copper traces.
2. FR−4 @ 500
1 oz copper traces.
3. Thermal response.
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2
NUS5530MN
ELECTRICAL CHARACTERISTICS FOR P−CHANNEL FET (TJ = 25°C unless otherwise noted)
Symbol
Test Condition
Min
VGS(th)
VDS = VGS, ID = −250 mA
−0.6
Gate−Body Leakage
IGSS
Zero Gate Voltage Drain Current
IDSS
Characteristic
Typ
Max
Unit
−1.2
V
VDS = 0 V, VGS = "12 V
"100
nA
VDS = −16 V, VGS = 0 V
−1.0
mA
VDS = −16 V, VGS = 0 V,
TJ = 85°C
−5.0
Static
Gate Threshold Voltage
On−State Drain Current (Note 5)
ID(on)
VDS v −5.0 V, VGS = −4.5 V
−20
Drain−Source On−State Resistance (Note 5)
rDS(on)
VGS = −3.6 V, ID = −1.0 A
−
Forward Transconductance (Note 5)
Diode Forward Voltage (Note 5)
A
0.050
0.06
0.083
W
VGS = −2.5 V, ID = −1.0 A
0.070
gfs
VDS = −10 V, ID = −3.9 A
12
VSD
IS = −2.1 A, VGS = 0 V
−0.8
−1.2
V
9.7
22
nC
Mhos
Dynamic (Note 6)
Total Gate Charge
QG
Gate−Source Charge
QGS
Gate−Drain Charge
QGD
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn−On Delay Time
td(on)
Rise Time
Turn−Off Delay Time
tr
td(off)
Fall Time
tf
Source−Drain Reverse Recovery Time
trr
VDS = −10 V, VGS = −4.5 V,
ID = −3.9 A
1.2
3.6
pF
710
VDS = −5.0 Vdc, VGS = 0 Vdc,
f = 1.0 MHz
400
140
14
VDD = −10 V, RL = 10 W
ID ^ −1.0 A, VGEN = −4.5 V,
RG = 6 W
IF = −1.1 A, di/dt = 100 A/ms
4. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq [1 oz] including traces).
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Guaranteed by design, not subject to production testing.
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3
30
22
55
42
100
35
70
30
60
ns
NUS5530MN
ELECTRICAL CHARACTERISTICS FOR PNP TRANSISTORS (TA = 25°C unless otherwise noted)
Symbol
Min
Typical
Max
Unit
Collector −Emitter Breakdown Voltage (IC = −10 mAdc, IB = 0)
V(BR)CEO
−35
−45
−
Vdc
Collector −Base Breakdown Voltage (IC = −0.1 mAdc, IE = 0)
V(BR)CBO
−55
−65
−
Vdc
Emitter −Base Breakdown Voltage (IE = −0.1 mAdc, IC = 0)
V(BR)EBO
−5.0
−7.0
−
Vdc
ICBO
−
−0.03
−0.1
mAdc
Collector−Emitter Cutoff Current (VCES = −35 Vdc)
ICES
−
−0.03
−0.1
mAdc
Emitter Cutoff Current (VEB = −6.0 Vdc)
IEBO
−
−0.01
−0.1
mAdc
100
100
100
200
200
200
−
400
−
−
−
−
−
−
−
−0.10
−0.15
−0.30
−
−0.68
−0.85
−
−0.81
−0.875
Characteristic
OFF CHARACTERISTICS
Collector Cutoff Current (VCB = −35 Vdc, IE = 0)
ON CHARACTERISTICS
DC Current Gain (Note 7)
(IC = −1.0 A, VCE = −2.0 V)
(IC = −1.5 A, VCE = −2.0 V)
(IC = −2.0 A, VCE = −2.0 V)
hFE
Collector −Emitter Saturation Voltage (Note 7)
(IC = −0.1 A, IB = −0.010 A)
(IC = −1.0 A, IB = −0.010 A)
(IC = −2.0 A, IB = −0.02 A)
VCE(sat)
Base −Emitter Saturation Voltage (Note 7)
(IC = −1.0 A, IB = −0.01 A)
VBE(sat)
Base −Emitter Turn−on Voltage (Note 7)
(IC = −2.0 A, VCE = −3.0 V)
VBE(on)
Cutoff Frequency (IC = −100 mA, VCE = −5.0 V, f = 100 MHz)
V
V
V
fT
100
−
−
MHz
Input Capacitance (VEB = −0.5 V, f = 1.0 MHz)
Cibo
−
600
650
pF
Output Capacitance (VCB = −3.0 V, f = 1.0 MHz)
Cobo
−
85
100
pF
Turn−on Time (VCC = −10 V, IB1 = −100 mA, IC = −1 A, RL = 3 W)
ton
−
35
−
nS
Turn−off Time (VCC = −10 V, IB1 = IB2 = −100 mA, IC = 1 A, RL = 3 W)
toff
−
225
−
nS
7. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
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4
NUS5530MN
TYPICAL ELECTRICAL CHARACTERISTICS FOR P−CHANNEL FET
−3.5 V
TJ = 25°C
16
−4.5 V
−4 V
12
−2.5 V
8
−2 V
4
TJ = −55°C
16
25°C
0
0.5
1
1.5
2
2.5
8
4
0
3
0
0.5
1
1.5
2
2.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.2
ID = −3.9 A
TJ = 25°C
0.15
0.1
0.05
0
1
2
4
3
5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TJ = 25°C
0.15
VGS = 2.5 V
0.1
VGS = 3.6 V
0.05
0
VGS = 4.5 V
2
6
10
ID = −3.9 A
VGS = −4.5 V
1
0.8
−25
0
18
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.2
0.6
−50
14
−ID, DRAIN CURRENT (AMPS)
1.6
1.4
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
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5
3
0.2
Figure 3. On−Resistance versus
Gate−to−Source Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
0
125°C
12
VGS = −1.5 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
20
−3 V
−ID, DRAIN CURRENT (AMPS)
−5 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
20
150
20
NUS5530MN
TJ = 25°C
VGS = 0
C, CAPACITANCE (pF)
1200
900
Ciss
600
Coss
300
Crss
0
0
4
8
12
16
20
−VDS, DRAIN−TO−SOURCE VOLTAGE ()
Figure 6. Capacitance Variation
5
11
QG
10
9
4
8
7
3
6
QGS
5
QGD
2
4
ID = −3.9 A
TJ = 25°C
QGD/QGS = 3.0
1
0
0
1
2
3
4
5
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1500
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS FOR P−CHANNEL FET
6
7
8
9
3
2
1
0
10
QG, TOTAL GATE CHARGE (nC)
Figure 7. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
−IS, SOURCE CURRENT (AMPS)
5
4
VGS = 0 V
TJ = 25°C
3
2
1
0
0.1
0.3
0.5
0.7
0.9
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
NORMALIZED EFFECTIVE TRANSIENT
THERMAL IMPEDANCE
Figure 8. Diode Forward Voltage versus
Current
1
Duty Cycle = 0.5
0.2
0.1
0.01
0.1
PDM
0.05
t1
0.02
t2
DUTY CYCLE, D = t1/t2
Single Pulse
0.0001
0.001
0.01
0.1
1
PER UNIT BASE = RqJA = 80°C/W
TJM − TA = PDMZqJA(t)
SURFACE MOUNTED
10
SQUARE WAVE PULSE DURATION (sec)
Figure 9. Normalized Thermal Transient Impedance, Junction−to−Ambient
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6
100
1000
NUS5530MN
VCE(sat), COLLECTOR EMITTER SATURATION
VOLTAGE (VOLTS)
0.1
IC/IB = 100
50
10
0.01
0.001
0.001
0.01
0.1
0.20
100°C
0.15
25°C
0.10
0.05
0
0.001
0.01
0.1
1.0
Figure 10. Collector Emitter Saturation Voltage
versus Collector Current
Figure 11. Collector Emitter Saturation Voltage
versus Collector Current
1.0
125°C (5 V)
125°C (2 V)
hFE , DC CURRENT GAIN
400
350
25°C (5 V)
300
25°C (2 V)
250
200
−55°C (5 V)
150
−55°C (2 V)
100
50
0.001
0.01
0.1
1
25°C
0.6
100°C
0.4
0.2
0
10
−55°C
0.8
0.001
0.01
0.1
1.0
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 12. DC Current Gain versus
Collector Current
Figure 13. Base Emitter Saturation Voltage
versus Collector Current
750
1.0
700
0.9
C ibo , INPUT CAPACITANCE (pF)
1.1
100°C
0.8
25°C
0.7
0.6
−55°C
0.5
0.4
0.3
−55°C
IC, COLLECTOR CURRENT (A)
450
V BE(on) , BASE EMITTER TURN−ON VOLTAGE (VOLTS)
IC/IB = 50
IC, COLLECTOR CURRENT (A)
500
0
0.25
1.0
VBE(sat) , BASE EMITTER SATURATION
VOLTAGE (VOLTS)
VCE(sat), COLLECTOR EMITTER SATURATION
VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS FOR PNP TRANSISTOR
650
600
550
500
450
400
350
0.001
0.01
0.1
300
1.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
IC, COLLECTOR CURRENT (A)
VEB, EMITTER BASE VOLTAGE (V)
Figure 14. Base Emitter Turn−On Voltage
versus Collector Current
Figure 15. Input Capacitance
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4.5
5.0
NUS5530MN
TYPICAL ELECTRICAL CHARACTERISTICS FOR PNP TRANSISTOR
10
200
1 ms
1s
10 ms
175
1.00
150
125
IC, (A)
Cobo, OUTPUT CAPACITANCE (pF)
225
100
100 ms
Thermal Limits
0.10
75
50
25
0
0.01
0
5.0
10
15
20
25
30
0.10
35
1
10
VCE, (Vdc)
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 16. Output Capacitance
Figure 17. Safe Operating Area
R(t), TRANSIENT THERMAL RESISTANCE
1000
D = 0.10
D = 0.50
100
D = 0.20
P(pk)
10
D = 0.05
1
D = 0.01
t1
0.1
Single Pulse
t2
Duty Cycle = D = t1/t2
qJC = 174°C/W
0.01
t1, TIME (Sec)
Figure 18. Normalized Thermal Response
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100
NUS5530MN
PACKAGE DIMENSIONS
DFN8
CASE 506AL−01
ISSUE A
PIN ONE
REFERENCE
2X
0.15 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30mm.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
D
B
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
E
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
TOP VIEW
2X
0.15 C
(A3)
0.10 C
A
MILLIMETERS
MIN
NOM MAX
0.80
0.90
1.00
0.00
0.03
0.05
0.20 REF
0.35
0.40
0.45
3.30 BSC
0.95
1.05
1.15
3.30 BSC
1.80
1.90
2.00
0.80 BSC
0.21
−−−
−−−
0.30
0.40
0.50
SOLDERING FOOTPRINT*
8X
0.08 C
SEATING
PLANE
SIDE VIEW
A1
D2
8X
L
C
1
D2
1
e
4
2.95
2X
2X
8X
K
8
5
1.20
E2
8X
BOTTOM VIEW
DIMENSIONS: MILLIMETERS
b
0.10 C A B
0.05 C
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
3.60
1.95
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
8X
0.55
0.45
0.80
PITCH
2X
0.60
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTE 3
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
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NUS5530M N/D