ONSEMI NUS5531MTR2G

NUS5531MT
Main Switch Power
MOSFET and Single
Charging BJT
−12 V, −6.2 A, Single P−Channel FET with
Single PNP low Vce(sat) Transistor,
3x3 mm WDFN Package
This device integrates one high performance power MOSFET and
one low Vce(sat) transistor, greatly reducing the layout space and
optimizing charging performance in battery−powered portable
electronics.
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MOSFET
V(BR)DSS
−6.2 A
44 mW @ −2.5 V
Low Vce(sat) PNP (Wall/USB)
High Performance Power MOSFET
Single Low Vce(sat) Transistor as Charging Power Mux
3.0x3.0x0.8 mm WDFN Package
Independent Pin−out Provides Circuit Flexibility
Low Profile (<0.8 mm) for Easy Fit in Thin Environments
This is a Pb−Free Device
VCEO MAX
VEBO MAX
IC MAX
−20 V
−7.0 V
−2.0 A
MARKING DIAGRAM
8
1
1
5531
AYWW G
G
WDFN8
CASE 506BC
Applications
• Main Switch and Battery Charging Mux for Portable Electronics
• Optimized for Commercial PMUs from Top Suppliers (See Figure 2)
Emitter
ID MAX
32 mW @ −4.5 V
−12 V
Features
•
•
•
•
•
•
RDS(on) TYP
1
8
5531
= Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
Base
PIN ASSIGNMENT
Emitter
Collector
Source
2
7
3
6
4
5
N/C
Gate
Base
8
NC
7
GATE
6
Drain
5
Drain
Collector
10
9
Drain
1
Emitter
2
Emitter
3
Collector
4
Source
(Bottom View)
(Top View)
Figure 1. Simple Schematic
ORDERING INFORMATION
Device
Package
Shipping†
NUS5531MTR2G
WDFN8
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2008
July, 2008 − Rev. 1
Publication Order Number:
NUS5531MT/D
NUS5531MT
P−Channel Power MOSFET Maximum Ratings (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Units
Drain−to−Source Voltage
VDSS
−12
V
Gate−to−Source Voltage
VGS
±8.0
V
ID
−5.47
A
Continuous Drain Current (Note 1)
Steady State
TA = 25°C
TA = 85°C
t≤5s
Power Dissipation (Note 1)
TA = 25°C
Steady State
t ≤ 10 s
Continuous Drain Current (Note 2)
−4.0
Steady State
TA = 25°C
−6.2
PD
1.46
2.1
ID
TA = 25°C
−4.4
TA = 85°C
Power Dissipation (Note 3)
TA = 25°C
Pulsed Drain Current
tp = 10 ms
Operating Junction and Storage Temperature
Operating Case Temperature (Note 3)
Source Current (Body
A
−3.2
PD
0.418
W
IDM
−25
A
TJ, TSTG
−55 to 150
°C
TC
−55 to 125
°C
IS
−2.8
A
TL
260
°C
Diode)2
Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)
W
THERMAL RESISTANCE RATINGS
Symbol
Max
Units
Junction−to−Ambient – Steady State (Note 3)
Parameter
RqJA
299
°C/W
Junction−to−Ambient – t < 10 s (Note 3)
RqJA
81.4
°C/W
Junction−to−Ambient – Steady State (Note 1)
RqJA
85.5
°C/W
Junction−to−Ambient – t < 10 s (Note 1)
RqJA
58.7
°C/W
Junction−to−Case – t < 10 s (Note 3)
yJC
26
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 sq in [1 oz] including traces).
2. Surface−mounted on FR4 board using 0.5 in sq pad size, 1 oz. Cu.
3. Surface−mounted on FR4 board using 50 sq mm pad size, 1 oz. Cu.
P−Channel MOSFET Electrical Characteristics (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
−12.0
Typ
Max
Unit
OFF CHARACTERISTICS
V(BR)DSS
VGS = 0 V, ID = −250 mA
Drain−to−Source Breakdown
Voltage Temperature Coefficient
Drain−to−Source Breakdown Voltage
V(BR)DSS/TJ
ID = −250 mA, ref to 25°C
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±8 V
VGS(TH)
VGS = VDS, ID = −250 mA
VGS = 0 V,
VDS = −12 V
V
−10.1
TJ = 25°C
mV/°C
−1.0
TJ = 125°C
mA
−10
±200
nA
−1.1
V
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
−0.67
2.68
VGS = −4.5 V, ID = −3.0 A
gFS
−0.45
mV/°C
32
40
VGS = −2.5 V, ID = −3.0 A
44
50
VDS = −16 V, ID = −3.0 A
5.9
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
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2
mW
S
NUS5531MT
P−Channel MOSFET Electrical Characteristics (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
CHARGES, CAPACITANCES AND GATE RESISTANCE
VGS = 0 V, f = 1.0 MHz,
VDS = −12 V
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Total Gate Charge
QG(tot)
Threshold Gate Charge
QG(th)
Gate−to−Source Charge
QGS
1.7
Gate−to−Drain Charge
QGD
2.5
pF
1329
200
116
VGS = −4.5 V, VDS = −12 V,
ID = −3.0 A
nC
13
1.1
SWITCHING CHARACTERISTICS
td(on)
Turn−On Delay Time
Rise Time
tr
Turn−Off Delay Time
VGS = −4.5 V, VDD = −12 V,
ID = −3.0 A, RG = 3.0
ns
8
17.5
td(off)
80
tf
56.5
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
VSD
Reverse Recovery Time
trr
Charge Time
ta
Discharge Time
Reverse Recovery Charge
VGS = 0 V,
IS = −1.0 A
TJ = 25°C
−0.66
TJ = 125°C
−0.54
VGS = 0 V,
dISD/dt = 100 A/ms,
IS = −1.0 A
−1.2
V
ns
70.8
14.3
tb
56.4
QRR
44
nC
Single−PNP Transistor Maximum Ratings (TJ = 25°C unless otherwise stated)
Symbol
Value
Units
Collector−Emitter Voltage
Parameter
VCEO
−20
V
Collector−Base Voltage
VCBO
−20
V
Emitter−Base Voltage
VEBO
−7.0
V
Collector Current, Continuous
IC
−2.0
A
Collector Current, Peak
IC
−4.0
A
TJ, TSTG
−55 to 150
°C
PD
1.58
W
RqJA
61.5
°C/W
PD
0.43
W
RqJA
293
°C/W
Operating Junction and Storage Temperature
Power Dissipation, TA = 25°C (Note 5)
Thermal Resistance (Note 5)
Power Dissipation, TA = 25°C (Note 6)
Thermal Resistance (Note 6)
5. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 sq in [1 oz] including traces)
6. Surface−mounted on FR4 board using 50 sq mm pad size, 1 oz. Cu.
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NUS5531MT
Single−PNP Transistor Electrical Characteristics (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Collector−Emitter Breakdown
Voltage
VbrCEO
IC = −10 mA, IB = 0
−20
V
Collector−Base Breakdown Voltage
VbrCBO
IC = −0.1 mA, IE = 0
−20
V
Emitter−Base Breakdown Voltage
VbrEBO
IE = −0.1 mA, IC = 0
−7.0
V
ICES
VCES = −15 V
DC Current Gain (Note 7)
hFE
IC = −1.0 A, VCE = −2.0 V
180
−
DC Current Gain (Note 7)
hFE
IC = −2.0 A, VCE = −2.0 V
150
−
Collector−Emitter Saturation Voltage
VCE(sat)
IC = −1.0 A, IB = −0.01 A
−0.10
−0.12
V
Collector−Emitter Saturation Voltage
VCE(sat)
IC = −1.0 A, IB = −0.1 A
−0.065
−0.09
V
Collector−Emitter Saturation Voltage
VCE(sat)
IC = −2.0 A, IB = −0.2 A
−0.13
−0.18
V
Base−Emitter Saturation Voltage
(Note 7)
VBE(sat)
IC = −1.0 A, IB = −0.01 A
−0.9
V
Base−Emitter Turn−On Voltage
(Note 7)
VBE(on)
IC = −1.0 A, IB = −2.0 A
−0.9
V
Cutoff Frequency (Note 8)
fT
IC = −100 mA, VCE = −5.0 V
f = 100 MHz
Input Capacitance (Note 8)
Cibo
VEB = −0.5 V, f = 1.0 MHz
330
pF
Output Capacitance (Note 8)
Cobo
VCB = −3.0 V, f = 1.0 MHz
100
pF
OFF CHARACTERISTICS
Collector−Emitter Cutoff Current
−0.1
mA
ON CHARACTERISTICS
100
MHz
7. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
8. Guaranteed by design but not tested.
from Wall/USB
1
8
CHR/USB_ctl
from Wall/USB
2
7
N/C
3
6
BAT_FET_N
4
5
R_sns
Main Battery
Supply
Voltage
VDD
Figure 2. Typical Application Circuit
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NUS5531MT
TYPICAL CHARACTERISTICS − MOSFET
−1.7 − −8.0 V
5
6
−1.5 V
4
VGS = −1.4 V
3
2
1
TJ = 25°C
0
1
2
3
4
5
1
0.5
1.0
1.5
2.0
Figure 4. Transfer Characteristics
0.04
TJ = 25°C
0.03
TJ = −55°C
1
2
3
4
5
6
−ID, DRAIN CURRENT (A)
0.05
TJ = 25°C
VGS = −2.5 V
0.04
VGS = −4.5 V
0.03
0.02
1
2
3
4
5
6
−ID, DRAIN CURRENT (A)
Figure 5. On−Resistance vs. Drain Current
Figure 6. On−Resistance vs. Drain Current and
Gate Voltage
10,000
ID = −3 A
VGS = −4.5 V
VGS = 0 V
TJ = 150°C
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = −55°C
2
Figure 3. On−Region Characteristics
TJ = 100°C
1.4
TJ = 100°C
3
−VGS, GATE−TO−SOURCE VOLTAGE (V)
VGS = 4.5 V
1.6
TJ = 25°C
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.05
0.02
VDS ≥ −10 V
5
0
6
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−1.6 V
−ID, DRAIN CURRENT (A)
−ID, DRAIN CURRENT (A)
6
1.2
1,000
1.0
0.8
0.6
−50
−25
0
25
50
75
100
125
150
TJ = 100°C
100
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. On−Resistance Variation with
Temperature
Figure 8. Drain−to−Source Leakage Current
vs. Voltage
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5
12
NUS5531MT
VDS = 0 V
VGS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
2400 Ciss
2000
1600
Ciss
1200
Crss
800
Coss
400
0
−4
−2
0
2
4
6
8
10
12
6
VGS
3
Qgs
2
0
tf
tr
10
td(on)
1
10
4
ID = −3 A
TJ = 25°C
0
2
4
6
8
10
12
2
0
14
Qg, TOTAL GATE CHARGE (nC)
Figure 10. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
VGS = 0 V
TJ = 25°C
1
TJ = −55°C
TJ = 150°C
0.1
0.01
100
6
Qgd
1
−IS, SOURCE CURRENT (A)
td(off)
100
0
0.2
0.4
0.6
0.8
1.0
RG, GATE RESISTANCE (W)
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
Figure 12. Diode Forward Voltage vs. Current
100
−ID, DRAIN CURRENT (A)
t, TIME (ns)
8
10
VDD = −12 V
ID = −3.0 A
VGS = −4.5 V
10
QT
4
Figure 9. Capacitance Variation
1
VDS
5
−VGS −VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
1,000
12
Single Pulse
TC = 25°C
10
Mounted on 2″ sq.
FR4 board (0.5″ sq.
2 oz. Cu single
sided) with MOSFET
die operating.
100 ms
1 ms
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
0.01
0.1
1
dc
10
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
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−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
2800
−VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS − MOSFET
100
NUS5531MT
TYPICAL CHARACTERISTICS − MOSFET
RqJA, EFFECTIVE TRANSIENT
THERMAL RESPONSE
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01 0.01
0.001
Single Pulse
1E−06
1E−05
1E−04
1E−03
1E−02
1E−01
t, TIME (s)
Figure 14. FET Thermal Response
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1E+00
1E+01
1E+02
1E+03
NUS5531MT
TYPICAL CHARACTERISTICS − BJT
0.35
150°C
IC/IB = 10
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
0.25
0.2
25°C
0.15
−55°C
0.1
0.05
0
0.001
0.01
0.1
1.0
0.25
0.2
150°C
0.15
25°C
0.1
0.05
10
0
0.001
0.01
Figure 15. Collector Emitter Saturation Voltage
vs. Collector Current
400
300
250
25°C (5.0 V)
25°C (2.0 V)
200
−55°C (5.0 V)
150
−55°C (2.0 V)
100
0.001
VBE(on), BASE EMITTER TURN−ON
VOLTAGE (V)
1.0
0.9
0.01
0.1
1.0
1.0
−55°C
0.9
0.8
25°C
0.7
0.6
150°C
0.5
0.4
0.3
0.001
10
0.01
0.1
1.0
10
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 17. DC Current Gain vs. Collector
Current
Figure 18. Base Emitter Saturation Voltage vs.
Collector Current
1.0
VCE = −2.0 V
0.9
−55°C
0.8
0.7
25°C
0.6
0.5
150°C
0.4
0.3
0.2
0.1
0.001
IC/IB = 10
1.1
150°C (2.0 V)
450
350
10
1.2
150°C (5.0 V)
VBE(sat), BASE EMITTER
SATURATION VOLTAGE (V)
500
1.0
Figure 16. Collector Emitter Saturation Voltage
vs. Collector Current
VCE, COLLECTOR−EMITTER
VOLTAGE (V)
hFE, DC CURRENT GAIN
550
0.1
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
600
−55°C
IC/IB = 100
0.3
0.01
0.1
1.0
10
0.8
0.7
10 mA
IC = 500 mA
100 mA
300 mA
0.6
0.5
0.4
0.3
0.2
0.1
0
0.01
IC, COLLECTOR CURRENT (A)
0.1
1.0
10
IB, BASE CURRENT (mA)
Figure 19. Base Emitter Turn−On Voltage vs.
Collector Current
Figure 20. Saturation Region
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100
NUS5531MT
TYPICAL CHARACTERISTICS − BJT
170
Cobo, OUTPUT CAPACITANCE (pF)
Cibo, INPUT CAPACITANCE (pF)
350
Cibo (pF)
325
300
275
250
225
200
175
150
125
0
1.0
2.0
3.0
4.0
5.0
6.0
Cobo (pF)
150
130
110
90
70
50
0
2.0
4.0
6.0
8.0
10
12
VEB, EMITTER BASE VOLTAGE (V)
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 21. Input Capacitance
Figure 22. Output Capacitance
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14
16
NUS5531MT
PACKAGE DIMENSIONS
WDFN8, 3x3, 0.65P
CASE 506BC−01
ISSUE A
A
D
L
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L1
ÉÉÉ
ÉÉÉ
ÉÉÉ
PIN ONE
REFERENCE
2X
0.10 C
2X
DETAIL A
0.10 C
OPTIONAL
CONSTRUCTIONS
E
ÉÉÉ
ÉÉÉ
EXPOSED Cu
TOP VIEW
MOLD CMPD
DETAIL B
A
(A3)
DETAIL B
DIM
A
A1
A3
b
D
D2
D3
E
E2
e
G2
G3
K
L
L1
OPTIONAL
CONSTRUCTIONS
0.05 C
8X
0.05 C
SIDE VIEW
NOTE 4
A1
C
SEATING
PLANE
SOLDERING FOOTPRINT*
G2
G3
0.10 C A B
2.60
0.10 C A B
D2
1
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
3.00 BSC
1.00
1.20
0.95
1.15
3.00 BSC
1.70
1.90
0.65 BSC
0.15 BSC
0.20 BSC
0.20
−−−
0.25
0.45
−−−
0.15
4
8X L
DETAIL A
1.30
D3
1.20
E2
ÇÇ
ÇÇ
ÇÇ
ÇÇÇÇ
ÇÇÇÇ
ÇÇ
1.94
0.10 C A B
8X
K
e
8
5
e/2
BOTTOM VIEW
8X
b
0.10 C A B
0.05 C
1.15
0.55 8X
3.30
ÇÇ
ÇÇÇÇÇÇ
ÇÇ
ÇÇÇÇÇÇ
1
NOTE 3
8X
0.35
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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NUS5531MT/D