SANYO LV1605M

Ordering number : ENN*7809
Preliminary
SANYO Semiconductors
DATA SHEET
Monolithic Linear IC
LV1605M
Analog Signal Processor for CD Players
Overview
The LV1605M implements the analog signal processing and servo control required by compact disc players, and, when
combined with a CD DSP such as the LC78604E or LC78605E, can implement a CD player with a minimal parts count.
The LV1605M also provides a gain switching pin to allow it to support playback of CD-RW discs.
Functions
IV amplifier, RF amplifier (with AGC and hold function on defect detection), APC, FE (with VCA), TE (with VCA and
auto-balance), focus servo amplifier (with offset canceller and hold function on defect detection), tracking servo
amplifier (with offset canceller and hold function on defect detection), spindle servo amplifier (with gain switching
function and hold function on defect detection), sled servo amplifier (with on/off function and hold function on defect
detection), focus detection (DRF and FZD), track detection (HFL and TES), defect detection, shock detection, and disc
mode gain switching function.
Features
• The LV1605M provides the following automatic adjustment functions.
— Focus offset, auto canceller: FE (pin 21)
— Tracking offset, auto canceller: TE (pin 7)
— E/F balance automatic adjustment
— RF level AGC function
— Tracking servo gain RF level following function
— Focus servo gain RF level following function
• Focus search smoothing setting pin: FSC (pin 58)
• Focus search mode switching pin: FSS (pin 54)
• Play disc mode (normal or CD-RW) switching pin: RW (pin 44)
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
22704TN (OT) No. 7809-1/24
LV1605M
Specifications
Absolute Maximum Ratings at Ta=25°C, pins 33, 57=GND
Parameter
Symbol
Maximum supply voltage
VCC max
Allowable power dissipation
Pd max
Conditions
Ratings
Pins 32, 51
Unit
5
200
V
mW
Operating temperature
Topr
–25 to +70
°C
Storage temperature
Tstg
–40 to +125
°C
Operating Condition at pins 33, 57=GND
Parameter
Symbol
Recommended supply voltage
Conditions
Ratings
VCC
Allowable operating supply voltage range
VCCop
Unit
3.3
V
3.0 to 3.6
V
* Operating Supply Voltage at Limit of Operating Temperature, pins 33, 57=GND
Parameter
Symbol
Operating ambient temperature
Allowable operating supply voltage range
Conditions
Ratings
Unit
Topr2
–10 to +75
°C
VCCop2
3.0 to 3.6
V
Package Dimensions
unit : mm
3159A
33
32
64
17
14.0
49
1
17.2
48
0.8
17.2
14.0
16
0.8
0.35
0.15
0.1
3.0max
(2.7)
(1.0)
SANYO : QIP64E (14 × 14)
No. 7809-2/24
LV1605M
Electrical Characteristics/Operating Characteristics at Ta=25°C, with VCC (pins 32, 51)=3.3V, GND (pins 33, 57)=0V
Parameter
Symbol
Conditions
Current drain (active mode)
ICCO
AVCC (pin32) + DVDD (pin51), pin55=3.3V
Current drain (sleep mode)
ICCs
AVCC (pin32) + DVDD (pin51), pin55=0V
Reference voltage
VREF
VR
Interface: CE - Vtp
CEvtp
CE
Ratings
min
typ
5
Unit
max
16
30
7.5
1.50
1.65
mA
mA
1.80
V
1.9
V
V
Interface: CE - Vtn
CEvtn
CE
1.2
Interface: CL - Vtp
CLvtp
CL
1.9
V
Interface: CL - Vtn
CLvtn
CL
1.2
V
Interface: DAT - Vtp
DATvtp
DAT
1.9
V
Interface: DAT - Vtn
DATvtn
DAT
1.2
V
Interface: Maximum CL frequency
CLmax
RF amplifier: RFSM no signal voltage
RFSMo
RF amplifier: Minimum gain (normal)
RFSMgmin1
RF amplifier: Minimum gain (CD-RW)
RFSMgmin1
Focus amplifier: FDO gain MIN (Normal)
FDg1
Focus amplifier: FDO gain MIN (CD-RW)
FDg2
Focus amplifier: FDO gain MAX (Normal)
FDg1
Focus amplifier: FDO gain MAX (CD-RW)
FDg2
Focus amplifier: FDO offset (Normal)
FDost1
Focus amplifier: FDO offset (CD-RW)
FDost2
Focus amplifier: Offset when off (Normal)
FDofost1
Focus amplifier: Offset when off (CD-RW)
FDofost2
500
RW=H, L
FIN1, FIN2: 100kΩ-input, PH1=2.65V
RW=H, freq-200kHz, RFSM
FIN1, FIN2: 100kΩ-input, PH1=2.65V
RW=L, freq-200kHz, RFSM
FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=H,
FDO, SCI=VR, PH1=2.65V, freq-10kHz, FD
1.15
1.70
V
0.5
4.5
8.5
dB
12.5
16.5
20.5
dB
–3.5
+0.5
+4.5
dB
FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=H,
FDO, SCI=VR, PH1=2.65V, freq-10kHz, FD
FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=H,
FDO, SCI=VR, PH1=1.0V, freq-10kHz, FD
FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=L,
FDO, SCI=VR, PH1=1.0V, freq-10kHz, FD
The difference from the reference voltage,
RW=high, servo on, FH=VR
The difference from the reference voltage,
RW=low, servo on, FH=VR
The difference from the reference voltage,
RW=high, servo off, FH=VR
The difference from the reference voltage,
RW=low, servo off, FH=VR
kHz
0.60
+12.5
dB
+6.5
dB
+18.5
dB
–300
0
+300
mV
–450
0
+450
mV
–100
0
+100
mV
–100
0
+100
mV
Focus amplifier: Offset adjustment step
FEstep
FE
Focus amplifier: F search voltage H1
FSmax1
FDO, FSS=ground, the difference from VR
0.25
V
Focus amplifier: F search voltage L1
FSmin1
FDO, FSS=ground, the difference from VR
–0.25
V
Focus amplifier: F search voltage H2
FSmax2
FDO, FSS=VCC, the difference from VR
0.25
V
Focus amplifier: F search voltage L2
FSmin2
FDO, FSS=VCC, the difference from VR
0
V
freq-10kHz, E, F: 180kΩ-input, E=–F,
18
Tracking amplifier: TE gain MAX (CD)
TEgmax1
Tracking amplifier: TE gain MAX (CD-R)
Tegmax2
Tracking amplifier: TE gain MAX (CD-RW)
Tegmax3
Tracking amplifier: TE gain MIN (CD)
TEgmin1
Tracking amplifier: TE gain MIN (CD-R)
Tegmin2
Tracking amplifier: TE gain MIN (CD-RW)
Tegmin3
Tracking amplifier: ∆TE (200k)
∆TE200k
E, F:180kΩ-input, RW=H, E=–F, TE,
Tracking amplifier: TGL offset (Normal)
TGLost1
Servo: on, TH=VR, TGL=H, RW=H, TO
–250
0
+250
Tracking amplifier: TGL offset (CD-RW)
TGLost2
Servo: on, TH=VR, TGL=H, RW=L, TO
–450
0
+450
mV
Tracking amplifier: THLD offset (Normal)
THLDost1
THLD mode, RW=high, the difference from VR, TA
–120
0
+120
mV
Tracking amplifier: THLD offset (CD-RW)
THLDost2
PH1=1.0V, RW=H, TE
+17.5
freq-10kHz, E, F: 180kΩ-input, E=–F,
PH1=1.0V, RW=H, TE
freq-10kHz, E, F: 180kΩ-input, E=–F,
PH1=1.0V, RW=L, TE
f=10kHz, E, F: 180kΩ-input, E=–F, PH1=2.65V,
RW=H, TE
+11.5
f=10kHz, E, F: 180kΩ-input, E=–F, PH1=2.65V,
PH1=2.65V, RW=L, TE
+26.0
+23.0
dB
+33.75
dB
+15.0
+18.5
+27.25
dB
dB
+31.5
12.0
∆TE200k=TE (10kHz) – TE(200kHz)
dB
+18.75
+12.0
RW=H, TE
f=10kHz, E, F: 180kΩ-input, E=–F,
+21.75
mV
dB
dB
mV
THLD mode, RW=low, the difference from VR, TA
–120
0
+120
mV
Tracking amplifier: Off 1 offset
OFF1ost
TOFF=H, TO
–120
0
+120
mV
Tracking amplifier: Off 2 offset
OFF2ost
TOF2 off (IF), TO
–120
0
+120
Tracking amplifier: Offset adjustment step
TEstep
TE
Tracking amplifier: Balance range - high
BAL-H
Tracking amplifier: Balance range - low
BAL-L
mV
40
mV
∆gain E/F input, TB=3.3V
+3.5
dB
∆gain E/F input, TB=0V
–3.5
dB
Continued on next page.
No. 7809-3/24
LV1605M
Continued from preceding page.
Parameter
Tracking servo switching threshold
TOFF-VTH
Tracking gain switching threshold
TGL-VTH
Symbol
Conditions
Ratings
min
typ
Unit
max
TOFFvth
+1.0
+2.05
V
TGLvth
+1.0
+3.05
V
V
PH
No signal voltage
PHo
The difference from RFSM
–0.9
–0.65
–0.4
BH
No signal voltage
BHo
The difference from RFSM
+0.4
+0.65
+0.9
V
DRF
Detection voltage
DRFvth
–0.40
–0.2
0
V
DRF
Output voltage - high
DRF-H
+2.7
+3.15
DRF
Output voltage - low
DRF-L
+0.5
V
The difference from VR at RFSM
0
FZD
Detection voltage 1
FZD1
FE, the difference from VR
FZD
Detection voltage 2
FZD2
FE, the difference from VR
HFL
Detection voltage
HFLvth
HFL
Output voltage - high
HFL-H
0
The difference from VR at RF
V
+0.2
V
0
V
–0.18
V
+2.4
+3.15
V
HFL
Output voltage - low
HFL-L
0
+0.5
V
TES
Detection voltage LH
TES-LH
TESI, the difference from VR
–0.15
–0.085
–0.02
V
TES
Detection voltage HL
TES-HL
TESI, the difference from VR
+0.02
+0.085
+0.15
TES
Output voltage - high
TES-H
+2.3
+3.15
TES
Output voltage - low
TES-L
JP
Output voltage - high
JP-H
JP
Output voltage - low
JP-L
0
TJP=3.3V, at SLD
+0.5
+1.0
TJP=0V, at SLD
V
V
V
V
–1.0
V
Spindle amplifier: Offset12
SPD12ost
The difference from VR at SPD, 12cm mode
–100
0
+100
mV
Spindle amplifier: Offset8
SPD8ost
The difference from VR at SPD, 8cm mode
–100
0
+100
mV
The difference from VR at SPD, off mode
–120
0
+120
mV
+0.3
+0.5
+0.8
V
–0.8
–0.5
–0.3
V
+0.1
+0.23
+0.36
V
Spindle amplifier: Offset off
SPDof
The difference from offset 12, 12cm mode,
Spindle amplifier: Output voltage H12
SPD-H12
Spindle amplifier: Output voltage L12
SPD-L12
Spindle amplifier: Output voltage H8
SPD-H8
Spindle amplifier: Output voltage L8
SPD-L8
Sled amplifier: SLEQ offset
SLDost
The difference from TO at SLEQ
–70
0
+70
mV
Sled amplifier: Offset SLD
SLDost
The difference from VR when SLEQ=VR
–180
0
+280
mV
Sled amplifier: Offset off
SLDof
Off mode
–180
0
+280
mV
Disc switching: RW-VTH
RWvth
RW
+1.0
+1.65
+2.3
V
–70
0
+70
mV
Anti-shock: No signal voltage
CLV=3.3V
The difference from offset 12, 12cm mode,
CLV=0V
The difference from offset 8, 8cm mode,
CLV=3.3V
The difference from offset 8, 8cm mode,
–0.23
CLV=0V
V
SCIo
SCI, the difference from VR
Anti-shock: Detection voltage - high
SCIvthH
SCI, the difference from VR
+20
+80
+140
mV
Anti-shock: Detection voltage - low
SCIvthL
SCI, the difference from VR
–140
–80
–20
mV
+0.10
+0.35
+0.60
V
2.4
3.0
0
+0.5
V
+240
mV
With RFSM=2.0V, the difference between the
Defect: Detection voltage
DEFvth
LF2 voltage on disc defect detection and the
LF2 voltage when RF=2.0V.
Defect: Output voltage - high
DEF-H
Defect: Output voltage - low
DEF-L
APC: Reference voltage
APC: Off voltage
LDS
LDDof
The LDS voltage such that LDD=1.65V
+100
+170
LDD
+2.85
+3.15
V
V
No. 7809-4/24
LV1605M
Pin Functions
Pin No.
Pin name
I/O
Description
1
FIN2
I
Pickup photodiode connection. The RF signal is generated by adding to the FIN1 pin, and the FE signal is generated by subtracting.
Pickup photodiode connection
2
FIN1
I
3
E
I
Pickup photodiode connection. The TE signal is generated by subtraction with the F pin.
4
F
I
Pickup photodiode connection
5
TB
I
TE signal DC component input
6
TE–
7
TE
O
TE signal output
8
TESI
I
TES (tracking error sense) comparator input. Apply a bandpass filter to the TE signal and input the result to this pin.
I
Shock detection input
The TE signal gain is set by connecting a resistor between this pin and the TE pin.
9
SCI
10
TH
Tracking gain time constant setting
11
TA
TA amplifier output
12
TD–
13
TD
14
JP
15
TO
O
Tracking control signal output
16
FD
O
Focusing control signal output
17
FD–
18
FA
Used for the focusing phase compensation constant formed between the FD- and FA- pins.
19
FA–
Used for the focusing phase compensation constant formed between the FA and FE pins.
20
FHO
21
FE
22
FE–
23
FH
24
SP
25
SPG
26
SP–
27
SPD
28
SLEQ
29
SLD
O
Sled control signal output
30
SL–
I
Input for the sled advance signal from the microcontroller.
31
SL+
I
Input for the sled advance signal from the microcontroller.
32
DVCC
Digital system VCC
33
DGND
Digital system ground
Used for the tracking phase compensation constant formed between the TD and VR pins.
I
Tracking phase compensation constant connection
Tracking jump signal (kick pulse) amplitude setting
Used for the focusing phase compensation constant formed between the FD and FA pins.
Focus gain time constant setting
O
FE signal output
The FE signal gain is set by connecting a resistor between this pin and the FE pin.
Focus gain time constant setting
O
CLV input signal single-end output
Spindle 12 cm mode gain setting resistor connection
Used for the spindle phase compensation constant in conjunction with the SPD pin.
O
Spindle control signal output
Sled phase compensation constant setting
34
TGL
I
Input for tracking gain control signal from the DSP. The gain is low when TGL is high.
35
TOFF
I
Input for tracking gain control signal from the DSP. The gain is off when TOFF is high.
36
TES
O
Outputs for the TES signal to the DSP.
37
TJP
I
Input for the tracking jump signal from the DSP
38
HFL
O
The high frequency level (HFL) signal is used to judge whether the position of the main beam is over a pit or over a mirror area.
39
CLV
I
CLV error signal from the DSP
40
INTI
I
Forced defect detected state signal input
41
CL
I
Microcontroller command clock input
42
DAT
I
Microcontroller command data input
43
CE
I
Microcontroller command chip enable input
44
RW
I
Gain switching input. RW=high: CD mode, RW=low: CD-RW mode.
45
CLK
I
Reference clock input. The DSP 130kHz clock signal is input to this pin.
46
DEF
O
Disc defect detection output
47
DRF
O
Defect RF: RF level detection output
48
RFSM
O
RF output
49
RF–
In conjunction with the RFSM pin, sets the RF gain and is used for the EFM signal 3T compensation constant setting.
50
PH1
RF signal peak hold capacitor connection
51
AVCC
Analog system VCC.
52
NC
NC (no connection)
53
FAJON
I
54
FSS
I
Focus search select (FSS): focus search mode (± or + search relative to the reference voltage) switching.
55
PON
I
Power On. PON=high: active mode, PON=low: sleep mode
Focus offset adjustment mode switching. FAJON=low: normal mode, FAJON=high: constant voltage FD mode.
56
LF2
57
AGND
Disc defect detection time constant setting
58
FSC
Focus search smoothing capacitor connection
59
BH1
RF signal bottom hold capacitor connection
60
REFI
61
VR
O
Reference voltage output
62
LDD
O
APC circuit output
63
LDS
I
APC circuit input
64
TC
Analog system ground
Reference voltage bypass capacitor connection
Tracking signal peak hold capacitor connection
No. 7809-5/24
LV1605M
Switching Characteristics
Relationships Between Control Pin Voltages and Operating Modes
(VCC (pins 32, 51)=3.3V, GND (pins 33, 57=0V)
TGL (pin 34) Tracking gain switching
Mode
Min
Max
High gain
0V
0.5V
Low gain
3.05V
3.3V
TOFF (pin 35) Tracking servo on/off switching
Mode
Min
Max
Tracking servo: on
0V
0.5V
Tracking servo: off
2.05V
3.3V
INTI (pin 40) Forces the defect detection signal to the high level
Mode
Min
Max
Defect detected signal forced to high function: on
0V
1.0V
Defect detected signal forced to high function: off
2.0V
3.3V
RW (pin 44) RF and servo system high gain (+12 dB) switching
Mode
Min
Max
Gain increase
CD mode
2.0V
3.3V
Low
CD-RW mode
0V
1.0V
Hi
FAJON (pin 53) Focus offset adjustment mode switching
Mode
Min
Max
Sony coupler mode
2.0V
3.3V
Coupler other than Sony mode
0V
1.0V
FSS (pin 54) Focus search mode switching
Mode
Min
Max
Search ± relative to the reference voltage
3.0V
3.3V
Search only in the + direction relative to the reference voltage
0V
0.5V
PON (pin 55) Sleep mode switching
Mode
Min
Max
Active mode
3.0V
3.3V
Sleep mode
0V
0.5V
No. 7809-6/24
LV1605M
TC
LDS
LDD
VR
REFI
BH1
FSC
AGND
LF2
PON
FSS
FAJON
NC
AVCC
PH1
RFS–
Equivalent Circuit
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
FIN2 1
APC
REF
48 RFSM
RF
Amp
RF DET
FIN1 2
47 DRF
I/V
E 3
46 DEF
VCA
F 4
45 CLK
BAL
TB 5
–
TE
VCA
44 RW
6
43 CE
Microcontroller
interface
TE 7
42 DAT
TESI 8
41 CL
SCI 9
40 INTI
TH 10
39 CLV
T. servo & T. logic
TA 11
38 HFL
TD– 12
37 TJP
TD 13
F. servo & F. logic
Spindle servo
36 TES
Sled servo
JP 14
35 TOFF
TO 15
34 TGL
HOLD
FD 16
21
22
23
24
25
26
27
28
29
FA
FA–
FHO
FE
FE–
FH
SP
SPG
SP–
SPD
SLEQ
SLD
30
31
32
DVCC
20
SL+
19
–
18
SL
17
FD–
33 DGND
A13932
No. 7809-7/24
LV1605M
Test Circuit
AVCC
10µF
10µF
+
+
+
0.01µF
AVCC
AGND
0.01µF
0.01µF
+
AGND
64
E
180kΩ
F
180kΩ
TB
TE–
10kΩ
TE
TESI
43
7
42
41
LV1605M
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
22kΩ
15kΩ
33kΩ
23
24
25
26
27
28
29
30
31
RFSM
CLK
CLOCK
RW
CE
DAT
CL
INTI
CLV
HFL
TJP
TES
TOFF
TGL
DGND
32
DVCC
22
SL+
21
SL–
20
SLD
19
SLEQ
18
0.01µF
100pF
56kΩ
15kΩ
17
SPD
33kΩ
15kΩ
1pF
PH1
1µF
AVCC
NC
FAJON
FSS
PON
0.01µF
FSC
LF2
0.33µF
BH1
REFI
VR
LDD
RFS–
49
6
SP–
FD
50
44
SPG
TO
51
5
33kΩ
JP
2.2kΩ
52
45
REF
REF
TD
53
4
SP
62kΩ
54
46 DEF
FH
TD–
55
3
–
3300pF
56
47 DRF
FE
TA
62kΩ
57
2
20kΩ
TH
3300pF
58
8
SCI
REF
59
48
FE
10kΩ
60
15kΩ
1
FHO
0.01µF
61
20kΩ
FI
100kΩ
62
FA–
EI
FIN1
63
FA
F1I
100kΩ
FD–
F2I
FIN2
LDS
TC
0.01µF
+
+
47µF
+
10µF
DGND
REF
DVDD
A13933
Operational Description
• APC (Automatic laser power control)
This circuit is provided to control the pickup laser power. The laser on/off state is set by the microcontroller.
• RF amplifier (eye pattern output)
The (A + C) component of the pickup photodiode output current is input to FIN2 (pin 1), and the (B + D) component
is input to FIN1 (pin 2). The input current is converted to a voltage. That signal is passed through the AGC circuit and
output from the RFSM amplifier output RFSM pin (pin 48). The internal AGC circuit has a variable gain range of ±3
dB, and its time constant can be changed by adjusting the value of the external capacitor connected to PH1 (pin 50).
The bottom level of the EFM signal (the RFSM output) is controlled, and the response of this function can be
changed by adjusting the value of the external capacitor connected to BH1 (pin 59). The center value of the range of
the AGC circuit is set by the value of the resistor inserted between RFSM (pin 48) and RFS- (pin 49). If required,
these pins can also be used for EFM signal 3T compensation. When playing CD-RW discs, the input gain is increased
when the IC receives a signal from the DSP that sets RW (pin 44) low.
No. 7809-8/24
LV1605M
• Focus Servo
The focus error signal is acquired by detecting the difference (B+D) – (A+C) of the (A+C) and (B+D) signals from
the pickup. This focus error signal is then passed through the VCA circuit, whose gain following is controlled by the
RF AGC circuit, and is output from FE (pin 21). The gain applied to the focus error signal is set by the value of the
resistor connected between FE (pin 21) and FE– (pin 22). When playing CD-RW discs, the input gain is increased
when the IC receives a signal from the DSP that sets RW (pin 44) low.
Offset cancellation is applied to the FE amplifier. This offset cancellation operation is provided to cancel the offset of
the IC's internal I-V amplifier and other circuits. Adjustment of this function is started by issuing a FOCUS-OFFSET
ADJUST START command and completes about 130ms later. The FOCUS-OFFSET ADJUST OFF command is
provided to return the IC's state to the state preceding the offset cancellation operation.
The FA amplifier is provided as a pickup phase compensation amplifier, and it's equalizer curve is set with an
external capacitor and resistor. This amplifier has a muting function, and mutes the output either when an F-SERVO
OFF command is issued in VCC ON mode or during an F-SEARCH operation. Issue either a LASER ON or an FSERVO ON command to turn focus search on.
The FH amplifier modifies the servo response characteristics on disc defect detection with SCI (pin 9).
The FD amplifier includes both a phase compensation circuit and a focus search signal synthesis function. A focus
search operation is started with the F-SEARCH command, a ramp waveform is generated using an internal clock, and
the operation completes in about 560ms. Focus is detected (focus zero cross detection) using the focus error signal
created from that waveform, and the focus servo is turned on. The amplitude of the ramp waveform is set by the value
of the resistor connected between FD (pin 16) and FD- (pin 17).
FSC (pin 58) is used to smooth the focus search ramp waveform; a capacitor for this purpose is connected between
FSC and REF.
FSS (pin 54) is the focus search mode switching pin; if FSS is shorted to VCC, the IC performs a + search relative to
the reference voltage, and if FSS is left open or shorted to ground, the IC performs a ± search.
FAJON (pin 53) is the focus offset adjustment mode switching pin, and is normally shorted to ground. Short this pin
to VCC to set the IC to operate in Sony coupler mode.
• Tracking servo
The photodiode output current is input to E (pin 3) and F (pin 4). The input current is I-V converted, and the voltage
signal passes through first the balance adjustment VCA circuit and then the VCA circuit, whose gain following is
controlled by the RF AGC circuit, and is output from TE (pin 7). The value of the resistor connected between TE(pin 6) and TE (pin 7) sets the tracking error gain. When playing CD-RW discs, the input gain is increased when the
IC receives a signal from the DSP that sets RW (pin 44) low. Furthermore, in E/F balance mode, the gain is lowered
by 3 dB when the tracking signal peak value is over VREF + 0.6V.
Offset cancellation is applied to the TE amplifier. This offset cancellation operation completes in about 60ms. The
TRACK-OFFSET ADJUST OFF command is provided to return the IC's state to the state preceding the offset
cancellation operation.
The TH amplifier detects either the TGL signal from the DSP or the JP signal, and changes the servo response
characteristics according to the internally generated THLD signal and other signals. The tracking servo switches to
THLD mode internally on disc defect detection. This operation can be avoided by simply shorting DEF (pin 46) to
ground (the low level). A bandpass filter that extracts just the mechanical shock (skip detection) component from the
tracking error signal is formed externally at SCI (pin 9), and if injected, the gain is increased automatically when a
shock (skip) is detected.
The LV1605M includes an internal resistor so that a low-pass filter can be formed at the TA output (pin 11).
The TD amplifier is a circuit provided for servo loop phase compensation. Its characteristics are set with an external
RC circuit. This amplifier has a muting function, and the muting function operates either when VCC is turned on and
when a TRACK-SERVO OFF command has been issued. This muting function is released when a TRACK-SERVO
ON command is issued.
The TOFF amplifier immediately following TD (pin 13), functions to turn off the servo according to the TOFF signal
from the DSP.
The TO amplifier includes a function for synthesizing JP pulses, and the JP pulse is set with JP (pin 14). (THLD is
detected internally.)
No. 7809-9/24
LV1605M
• Sled servo
The response characteristics are set with SLEQ (pin 28). The amplifier that follows SLEQ (pin 28) provides a muting
function; that muting function is turned on by the SLED OFF command. The sled is advanced by applying a current
input to SL- (pin 29) and SL+ (pin 30). In particular, connect the SLEQ pin to a microcontroller output port via a
resistor, and set the sled advance gain by the value of that resistor. Note that an offset in the SLD output will occur if
there is a discrepancy between the values of the SL- (pin 29) and SL+ (pin 30) resistors. The muting function also
operates on disc defect detection.
• Spindle servo
A servo circuit to hold the disc at a constant linear speed is formed in conjunction with the DSP. The IC receives a
signal from the DSP at CLV (pin 39) and outputs a signal from SPD (pin 27). The equalizer characteristics are set
with SP (pin 24), SP- (pin 26), and SPD (pin 27). The 12cm mode amplifier gain is set by the resistor connected
between SPG (pin 25) and the reference voltage. In 8cm mode, the amplifier is buffered internally and independent of
SPG (pin 25). Note that the gain must first be set for 8cm mode and then set for 12cm mode. Note that circuit can be
forcibly set to the 8cm mode gain regardless of the 8/12cm mode setting by setting SPG (pin 25) to the open state.
The muting function operates on disc defect detection.
• TES and HFL (traversal signals)
When the pickup moves from the outside of the disc towards the inside, the EF output from the pickup is connected
so that the HFL and TES signals have the phase relationship shown in the figure. The TES comparator is a negative
polarity comparator with respect to the TESI input, and has a hysteresis of about ±100mV. A bandpass filter used to
extract only the required signal components from the TE signal is formed externally.
2.1V
1.47V
1.1V
RFSM
HFL
TES
TE
A13934
• DRF (optical amplitude judgment)
A peak hold function using the PH1 (pin 50) capacitor is applied to the EFM signal (RFSM output). This circuit
outputs a high level when the RFSM peak value exceeds about 1.45V. The PH1 (pin 50) capacitor is related to the
settings for both the DRF detection time constant and the RF AGC response.
DRF
2.1V
1.45V
1.1V
RFSM
FE
Pickup position
Point where focus
is achieved
A13935
No. 7809-10/24
LV1605M
• Focus judgment
The pickup is judged to get in focus when the Scurve reaches the REF level after the level REF + 0.2 V has been
detected in the focus error signal Scurve.
REF+0.2V
Point where focus
is achieved
A13936
• Disc defect detection
The mirror surface detection level is held by the capacitor connected to LF2 (pin 56), and a high level is output from
DEF (pin 46) if the dropout level in the EFM signal (RFSM output) rises above 0.35V. When DEF (pin 46) goes high,
the tracking servo goes to THLD mode. To prevent the tracking servo from going to THLD mode when a disc defect
is detected, either short DEF (pin 46) or short LF2 (pin 56) to ground. This prevents the DEFECT output from being
issued.
EFM signal
(RFSM output)
LF2(Pin 56)
0.35V
DEF(Pin46)
A13937
• Microcontroller interface
Since the Reset (Nothing) command initializes the LV1605M, it must be used with care. The LV1605M's command
acceptance (mode switching) timing is such that the mode switches on the (130kHz) clock cycle following the CE
(RWC) falling edge. Therefore, a low-level period in the CE signal of at least 10 µs is required when issuing
consecutive commands. The 130kHz clock is required for this reason. The various LV1605M instructions can be
issued by setting CE high and then, in synchronization with the CL clock, issuing the command from the
microcontroller, LSB first, to DAT (pin 42). Note that commands are executed starting at the fall of the CE signal.
Timing Chart
CE(RWC)
CL(CQCK)
DAT(COIN)
LSB
MSB
A13938
* Items in parentheses are DSP pin names.
No. 7809-11/24
LV1605M
• Reset circuit
The power on reset is cleared when VCC rises above about 2.0V.
• Notes on PCB pattern design
Since noise may enter RFSM (pin 48) from CLV (pin 39), shielding must be run between these lines.
• VCC, REF, GND, and NC pins
AVCC (pin 51): Analog system
DVCC (pin 32) Digital system
AGND (pin 57): Analog system
DGND (pin 33): Digital system
NC (pin 52): No connect
VR (pin 61): Reference voltage
Command Table
MSB
LSB
Command
During a reset
During the power on state
DSP
0
0
0
0
0
0
0
0
RESET
RESET (Nothing)
0
0
0
0
1
0
0
0
FOCUS START
FOCUS START#1
1
0
0
1
0
0
0
0
FOCUS-OFFSET ADJUSTMENT START
1
0
0
1
0
0
0
1
FOCUS-OFFSET ADJUSTMENT OFF
1
0
0
1
0
0
1
0
TRACK-OFFSET ADJUSTMENT START
1
0
0
1
0
0
1
1
TRACK-OFFSET ADJUSTMENT OFF
1
0
0
1
0
1
0
0
LASER ON: F-SERVO ON
1
0
0
1
0
1
0
1
LASER OFF: F-SERVO ON
1
0
0
1
0
1
1
0
LASER OFF: F-SERVO OFF
1
0
0
1
0
1
1
1
SPINDLE 8CM
1
0
0
1
1
0
0
0
SPINDLE 12CM
1
0
0
1
1
0
0
1
SPINDLE OFF
1
0
0
1
1
0
1
0
SLED ON
1
0
0
1
1
0
1
1
SLED OFF
1
0
0
1
1
1
0
0
E/F BALANCE START
1
0
0
1
1
1
0
1
TRACK-SERVO OFF
1
0
0
1
1
1
1
0
TRACK-SERVO ON
●
●
●
●
Adjustment not performed
No. 7809-12/24
LV1605M
Notes on Microcontroller Software Implementation
• Command relationships
Since the IC internal registers are cleared after either a FOCUS START or an E/F BALANCE START command is
issued, applications must issue a 11111110 (= FEh (hexadecimal)) command after either of those commands.
Reason: Those two commands are executed at point (1) in the timing chart below. However, after that, if a CE signal
such as that shown below is input, the data will be executed again as the same command at point (2) in the timing
chart.
1
At least 2µs
At least 2µs
2
At least 10µs
CE
At least 1µs
CL
At least 1µs
DAT
LSB
MSB
0
0
0
1
0
0
0
0 : FOCUS START command
0
0
1
1
1
0
0
1 : E/F BALANCE START command
A13939
When either a TRACK-OFFSET ADJUST START or a FOCUS-OFFSET ADJUST START command is issued after
either a VCC ON (POWER ON RESET), RESET, or a corresponding OFFSET ADJUST OFF command, the wait
time shown below is required. (Note that this applies in the state where the 130kHz clock is input.)
TRACK-OFFSET ADJUST START: At least 4ms
FOCUS-OFFSET ADJUST START: At least 4ms
• Notes on E/F balance adjustment
The E/F balance adjustment must be performed not on a disc mirror area, but on a disc pit area.
Also, since track kick operations are not performed during the EF balance adjustment, care must be taken that a stable
TE signal is acquired. (For example, by performing sled advance operations from the microcontroller.)
No. 7809-13/24
LV1605M
Pin Internal Equivalent Circuits
Pin No.
Pin
Equivalent circuit
VCC
1
500Ω
(2)
1
FIN2
2
FIN1
GND
80kΩ
250kΩ
A13940
VCC
500Ω
3
E
3
4
F
(4)
7pF
1kΩ
100kΩ
500Ω
10pF
A13941
GND
VCC
5
TB
5
500Ω
A13942
GND
VCC
6
TE–
17
FD–
(6,17,22,
26,28,30)
22
FE–
6
26
SP–
28
SLEQ
GND
500Ω
A13943
Continued on next page.
No. 7809-14/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
10
TH
(21)
21
FE
23
FH
30kΩ
7
500Ω
500Ω
500Ω
10
(23)
66kΩ
TE
33kΩ
500Ω
7
GND
A13944
VCC
8
500Ω
8
TESI
36
TES
500Ω
36
GND
200kΩ
A13945
VCC
1kΩ
9
34
1kΩ
SCI
TGL
9
50kΩ
34
50kΩ
GND
A13946
VREF
VCC
11
TA
12
TD–
500Ω
500Ω
10kΩ
12
11
GND
A13947
Continued on next page.
No. 7809-15/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
13
TD
500Ω
13
500Ω
10kΩ
10kΩ
GND
A13948
VCC
9
14
500Ω
JP
500Ω
20kΩ
10kΩ
A13949
GND
VCC
10pF
15
TO
500Ω
12
40kΩ
GND
VCC
16
FD
27
SPD
58
FSC
A13950
500Ω
16
(27,58)
GND
A13951
Continued on next page.
No. 7809-16/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
15pF
500Ω
240kΩ
19
18
FA
19
FA–
20
FHO
500Ω
500Ω
40kΩ
18
20
GND
VCC
A13952
GND
VCC
500Ω
24
SP
25
SPG
500Ω
500Ω 500Ω
25
24
GND
5pF
500Ω
50kΩ
A13953
VCC
29
29
SLD
30
SL–
31
SL+
10kΩ
10kΩ
500Ω
500Ω
500Ω
10kΩ
30
50kΩ
31
GND
A13954
VCC
35
35
500Ω
TOFF
GND
A13955
Continued from preceding page.
No. 7809-17/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
37
37
TJP
60kΩ
500Ω
40kΩ
GND
A13956
VCC
38
HFL
46
DEF
47
DRF
500Ω
38
(46,47)
50kΩ
GND
A13957
VCC
10kΩ
39
CLV
500Ω
39
80kΩ
24
500Ω
GND
A13958
VCCV
40
40
INTI
1kΩ
1kΩ
GND
A13959
Continued from preceding page.
No. 7809-18/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
41
CL
42
DAT
41
43
CE
(42,43,45)
45
CLK
500Ω
GND
A13960
VCC
44
RW
44
500Ω
GND
A13961
VCC
1kΩ 1kΩ
1kΩ
500Ω
48
1kΩ 1kΩ
48
RFSM
50
PH1
59
BH1
1kΩ
VCC
VCC
59
50
GND
GND
GND
A13962
VCC
49
49
5kΩ
500Ω
500Ω 500Ω
RF–
10kΩ
GND
5kΩ
A13963
Continued from preceding page.
No. 7809-19/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
53
53
FAJON
500Ω
GND
A13964
VCC
50kΩ
54
54
FSS
10kΩ
50kΩ
A13965
GND
VCC
100kΩ
55
55
PON
91kΩ
50kΩ
12kΩ
GND
A13966
VCC
50kΩ
56
56
LF2
50kΩ
1kΩ
GND
A13967
Continued from preceding page.
No. 7809-20/24
LV1605M
Continued from preceding page.
Pin No.
Pin
Equivalent circuit
VCC
50kΩ
5pF
60
REFI
61
VR
500Ω
60
1kΩ
61
1kΩ
25kΩ
50kΩ
GND
A13968
VCC
20kΩ
180kΩ
62
200Ω
LDD
62
2.5kΩ
GND
A13969
V
VCC
50kΩ
63
50kΩ
LDS
500Ω
63
GND
VCC
A13970
1kΩ
64
64
TC
GND
A13971
No. 7809-21/24
LV1605M
Application Circuit
COM3
COM4
DVSS
COM2
TGL
TOFF
S7
COM1
TES
S6
S5
S4
S3
S2
S1
FMAMB
REMOTE
PUIN
CLOSE
XIN32K 32
XOUT32K 31
XVDD 30
XIN16M 29
XOUT16M 28
XVSS 27
R-CHO 26
LRVSS 25
LRVDD 24
L-CHO 23
MODE 22
AMUTEB 21
DMUTEB 20
SL– 19
SL+ 18
DVDD 17
CLK (130kHz)
RWB
RWC
COIN
CQCKB
FSEQ
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
HFL
JPO
DEFI
1
CLVC
DRF
LC78605E
DVCC
DVSS
0.001µF
330Ω
5.6kΩ 10pF 4.7kΩ
10kΩ
DVDD
TUNERIN
MONI3
MONI2
MONI1
TUNERSB
CDRESB
AD1
AD2
AD3
AVSS
PDO
ISET
FR
AVDD
SLCD
EFMI
49
50
51
52
53
54
55
56
57
58
59
AVSS 60
61
62
63
AVDD
64
DVDD
DVSS
DVSS
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
6.8kΩ
45
44
43
42
41
40
39
38
37
36
35
34
33
DRF
DEF
CLK
RW
CE
DAT
CL
INTI
CLV
HFL
TJP
TES
TOFF
TGL
DGND
49 RFS–
+
AVCC
1µF
DVCC 32
50 PH1
SL+ 31
51 AVCC
SL– 30
52 NC
SLD 29
100kΩ
46
100kΩ
47
3300pF
48
RFSM
1pF
P-OP 10kΩ
0.22µF
4.7µF
SLEQ 28
SPD 27
55 PON
–
SP 26
10kΩ
56 LF2
SPG 25
LV1605M
57 AGND
+
REF
0.01µF
AVCC
0.33µF
REF
REF
0.1µF
58 FSC
FH 23
59 BH1
FE– 22
0.33µF
AVCC
1kΩ
3300pF
SP 24
4.7µF
AGND
REF
56kΩ
33kΩ
0.01µF
REF
P-OP
180kΩ
54 FSS
47pF
+
47µF
0.01µF
53 FAJON
REF
8.2kΩ
JP
TO
FD
10
11
12
13
14
15
16
3.9kΩ
68kΩ
P-OP
REF
0.047µF 4.7kΩ
39kΩ
27kΩ
REF
220kΩ 0.1µF
REF
150kΩ
0.1µF
PICK UP
2.2kΩ
15kΩ
1500pF
TD
9
18000pF 1.5kΩ
3300pF
33kΩ
TD–
8
20kΩ
22kΩ 0.1µF
TA
7
P-OP
TH
6
3300pF
SCI
5
0.1µF
TESI
4
0.033µF
TE
3
4.7kΩ
2
180kΩ
1
180kΩ
100kΩ
AGND
TE–
FD– 17
TB
64 TC
F
FA 18
E
63 LDS
FIN1
–
FA 19
100kΩ
MONI
0.01µF
62 LDD
100kΩ
0.001µF
+
0.47µF
FHO 20
FIN2
10Ω
FE 21
61 VR
100kΩ
+
0.01µF
60 REFI
LASER
+
10µF
+
10µF
+
A13972
No. 7809-22/24
LV1605M
Product
LA9230M
LA9240M
LA9241M
LA9242M
LV1605M
Package
QIP-64E
QIP-64E
QIP-64E
QIP-64E
QIP-64E
Allowable operating supply voltage
3.6V
5.5V
5.5V
VCCop max
5.5V
VCCop min1
3.6V: t=–25 to +75°C 3.6V: t=–25 to +75°C 3.2V: t=–25 to +75°C 3.2V: t=–25 to +75°C 3.0V: t=–10 to +75°C
5.5V
3.4V: t=–5 to +75°C
3.0V: t=–10 to +75°C 3.0V: t=–10 to +75°C
Recommended supply voltage
5.0V
5.0V
5.0V
5.0V
3.3V
Current drain
32mA
32mA
32mA
34mA
16mA
VCCop min2
Automatic adjustment function
Adjustment
position: FE
Focus offset adjustment
Maximum adjustment time
Adjustment
position: FD
Adjustment
position: FE
Adjustment
position: FE
Adjustment
position: FE
270ms
30ms
30ms
30ms
(The adjustment
range is four times
that of the
LA9242M)
130ms
Adjustment
position: TE
Tracking offset adjustment
Maximum adjustment time
Adjustment
position: TO
Adjustment
position: TE
Adjustment
position: TE
Adjustment
position: TE
30ms
30ms
30ms
30ms
(The adjustment
range is four times
that of the
LA9242M)
60ms
●
E/F balance automatic adjustment
●
●
●
●
RF level AGC function
RF amplitude at the recommended supply
voltage
1.8Vp-p
RF amplitude at VCCmin
1.3Vp-p
1.8Vp-p
1.5Vp-p
1.4Vp-p
1.5Vp-p
1.2Vp-p: VCC=3.4V
0.9Vp-p: VCC=3.0V
0.9Vp-p: VCC=3.0V
1.3Vp-p: VCC=3.0V
RF hold on disc defect detection
×
×
×
×
●
Tracking servo gain RF level following
function
●
●
●
●
●
Focus servo gain RF level following
function
×
×
×
×
●
Focus search time
About 280ms
About 560ms
About 560ms
About 560ms
About 560ms
Playback speed
2×
4×
4×
4 × (normal mode)
4×
Built in
No output provided
No output provided
No output provided
No output provided
●
Tracking signal output
(Track kick during E/F balance adjustment)
Focus search smoothing capacitor pin: FSC
×
●
●
●
E/F balance setting range adjustment pin:
TBC
×
●
●
●
×
Focus search mode switching pin: FSS
×
●
●
●
●
HFL detection Vth
2.3V
2.1V
2.1V
2.1V
1.47V
DRF current capacity
About 100µA
About 250µA
About 250µA
About 250µA
About 100µA
180mV: typ
180mV: typ
190mV: typ
190mV: typ
(The LDS voltage
such that
LDD=1.65V)
Pins 23 and 48
Pins 23 and 48
Pin 52
170mV: typ
APC reference voltage
The LCD voltage such that LDD=3V
No connect pins
Pins 46, 47, 48, and
Pin 48
55
RW disc playback support
×
×
×
●
●
Hold function for focus, spindle, and sled
servos during disc defect detection
×
×
×
×
●
Tracking hold function during disc defect
detection
●
●
●
●
●
No. 7809-23/24
LV1605M
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products(including technical data,services) described or
contained herein are controlled under any of applicable local export control laws and regulations,
such products must not be expor ted without obtaining the expor t license from the authorities
concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of February, 2004. Specifications and information herein are subject
to change without notice.
PS No. 7809-24/24