74FCT534 Octal D Flip-Flop with TRI-STATEÉ Outputs General Description Features The ’FCT534 is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all flip-flops. FACTTM FCT utilizes NSC quiet series technology to provide improved quiet output switching and dynamic threshold performance. FACT FCT features GTOTM output control and undershoot corrector in addition to a split ground bus for superior performance. The ’FCT534 is the same as the ’FCT374 except that the outputs are inverted. Y Y Y Y Y Y Y Y Y ICC and IOZ reduced to 40.0 mA and g 2.5 mA respectively NSC 54/74FCT534 is pin and functionally equivalent to IDT 54/74FCT534 Edge-triggered D-type inputs Buffered positive edge-triggered clock Input clamp diodes to limit bus reflections TTL/CMOS input and output level compatible IOL e 48 mA CMOS power levels ESD immunity t 4 kV typ Logic Symbols Connection Diagram Pin Assignment for DIP and SOIC IEEE/IEC TL/F/10665–1 TL/F/10665 – 2 Pin Names D0 – D7 CP OE O0 – O7 TL/F/10665 – 3 Description Data Inputs Clock Pulse Input TRI-STATE Output Enable Input Complementary TRI-STATE Outputs TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. FACTTM and GTOTM are trademarks of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/10665 RRD-B30M105/Printed in U. S. A. 74FCT534 Octal D Flip-Flop with TRI-STATE Outputs April 1993 Functional Description transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. The ’FCT534 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE complementary outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) Logic Diagram TL/F/10665 – 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Function Table Inputs Output CP OE D O L L L X L L L H H L X X L H O0 Z H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Clock Transition Z e High Impedance O0 e Value stored from previous clock cycle 2 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Terminal Voltage with Respect to GND (VTERM) 74FCT Temperature Under Bias (TBIAS) 74FCT Storage Temperature (TSTG) 74FCT Supply Voltage (VCC) 74FCT Input Voltage Output Voltage Operating Temperature (TA) 74FCT b 0.5V to a 7.0V b 55§ C to a 125§ C 0V to VCC b 0§ C to a 70§ C Junction Temperature (TJ) PDIP b 55§ C to a 125§ C DC Output Current (IOUT) 4.75V to 5.25V 0V to VCC 140§ C Note: All commercial packaging is not recommended for applications requiring greater than 2000 temperature cycles from b 40§ C to a 125§ C. 120 mA Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. Exposure to absolute maximum rating conditions for extended periods may affect reliability. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. DC Characteristics for ’FCTA Family Devices Typical values are at VCC e 5.0V, 25§ C ambient and maximum loading. For test conditions shown as Max, use the value specified for the appropriate device type: Com: VCC e 5.0V g 5%, TA e 0§ C to a 70§ C; VHC e VCC b 0.2V. Symbol 74FCTA Parameter Min VIH Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage IIH Typ Units Conditions Max 2.0 V 0.8 V Input High Current 5.0 5.0 mA VCC e Max VI e VCC VI e 2.7V (Note 2) IIL Input Low Current b 5.0 b 5.0 mA VCC e Max VI e 0.5V (Note 2) VI e GND IOZ Maximum TRI-STATE Current 2.5 2.5 b 2.5 b 2.5 VCC e Max mA VO VO VO VO b 1.2 V VIK Clamp Diode Voltage IOS Short Circuit Current b 60 b 120 VOH Minimum High Level Output Voltage 2.8 3.0 VHC 2.4 VCC 4.3 VOL Maximum Low Level Output Voltage b 0.7 mA e e e e VCC 2.7V (Note 2) 0.5V (Note 2) GND VCC e Min; IN e b18 mA VCC e Max (Note 1); VO e GND VCC e 3V; VIN e 0.2V or VHC; IOH e b32 mA V GND 0.2 GND 0.3 0.2 0.5 3 VCC e Min VIN e VIH or VIL IOH e b300 mA IOH e b15 mA VCC e 3V; VIN e 0.2V or VHC; IOL e 300 mA V VCC e Min VIN e VIH or VIL IOL e 300 mA IOL e 48 mA DC Characteristics for ’FCT Family Devices (Continued) Typical values are at VCC e 5.0V, 25§ C ambient and maximum loading. For test conditions shown as Max, use the value specified for the appropriate device type: Com: VCC e 5.0V g 5%, TA e 0§ C to a 70§ C; VHC e VCC b 0.2V. Symbol 74FCT Parameter Min ICC Maximum Quiescent Supply Current DICC Quiescent Supply Current; TTL Inputs HIGH ICCD Dynamic Power Supply Current (Note 4) IC Total Power Supply Current (Note 6) Units Conditions Typ Max 1.0 40.0 mA VCC e Max VIN t VHC, VIN s 0.2V fI e 0 0.5 2.0 mA VCC e Max VIN e 3.4V (Note 3) 0.15 0.25 mA/MHz 1.5 4.0 1.8 6.0 VCC e Max Outputs Open OE e GND One Input Toggling 50% Duty Cycle VIN t VHC VIN s 0.2V VCC e Max Outputs Open fCP e 10 MHz OE e GND fI e 5 MHz One Bit Toggling 50% Duty Cycle VIN t VHC VIN s 0.2V (Note 5) VCC e Max Outputs Open OE e GND fCP e 10 MHz fI e 2.5 MHz Eight Bits Toggling 50% Duty Cycle VIN t VHC VIN s 0.2V VIN e 3.4V VIN e GND mA VH Input Hysteresis on Clock Only 3.0 7.8 5.0 16.8 200 mV Note 1: Maximum test duration not to exceed one second, not more than one output shorted at one time. Note 2: This parameter guaranteed but not tested. Note 3: Per TTL driven input (VIN e 3.4V); all other inputs at VCC or GND. Note 4: This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Note 5: Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. Note 6: IC e IQUIESCENT a IINPUTS a IDYNAMIC IC e ICC a DICC DHNT a ICCD (fCP/2 a fI NI) ICC e Quiescent Current DICC e Power Supply Current for a TTL High Input (VIN e 3.4V) DH e Duty Cycle for TTL inputs High NT e Number of Inputs at DH ICCD e Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP e Clock Frequency for Register Devices (Zero for Non-Register Devices) fI e Input Frequency NI e Numbers of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 4 VIN e 3.4V VIN e GND AC Electrical Characteristics Symbol Parameter 74FCT 74FCT TA e a 25§ C VCC e 5.0V TA, VCC e Com CL e 50 pF Units Typ Min (Note 1) Max tPLH tPHL Propagation Delay CP to On 6.5 1.5 10.0 ns tPZH tPZL Output Enable Time 9.0 1.5 12.5 ns tPHZ tPLZ Output Disable Time 6.0 1.5 8.0 ns ts Set Up Time High or Low Dn to CP 1.0 2.0 ns th Hold Time High or Low Dn to CP 0.5 1.5 ns tw CP Pulse Width High or Low 4.0 7.0 ns Note 1: Minimum limits guaranteed but not tested on propagation delays. Capacitance TA e a 25§ C, fI e 1.0 MHz Typ Max Units CIN Symbol Input Capacitance Parameter 6 10 pF VIN e 0V Conditions COUT Output Capacitance 8 12 pF VOUT e 0V Note: This parameter is measured at characterization but not tested. COUT for 74FCT only. Ordering Information The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 74FCT 534 P Temperature Range Family 74FCT e Commercial TTL-Compatible C QR Special Variations X e Devices shipped in 13× reels QR e Commercial grade device with burn-in Device Type Package Code P e Plastic DIP S e Small Outline (SOIC) Temperature Range C e Commercial (0§ C to a 70§ C) 5 6 Physical Dimensions inches (millimeters) 20-Lead Small Outline Integrated Circuit (S) NS Package Number M20B 7 74FCT534 Octal D Flip-Flop with TRI-STATE Outputs Physical Dimensions inches (millimeters) (Continued) 20-Lead Plastic Dual-In-Line Package (P) NS Package Number N20B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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