54AC574 • 54ACT574 Octal D-Type Flip-Flop with TRI-STATE ® Outputs General Description Features The ’AC/’ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. n ICC and IOZ reduced by 50% n Inputs and outputs on opposite sides of package allowing easy interface with microprocessors n Useful as input or output port for microprocessors n Functionally identical to ’AC/’ACT374 n TRI-STATE outputs for bus-oriented applications n Outputs source/sink 24 mA n ’ACT574 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD) — ’ACT574: 5962-89601 The ’AC/’ACT574 is functionally identical to the ’AC/’ACT374 except for the pinouts. Logic Symbols IEEE/IEC DS100256-1 DS100256-4 Pin Names Description D0–D7 Data Inputs CP Clock Pulse Input OE TRI-STATE Output Enable Input O0–O7 TRI-STATE Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100256 www.national.com 54AC574 • 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs September 1998 Connection Diagrams Pin Assignment for DIP, and Flatpak Pin Assignment for LCC DS100256-3 DS100256-2 Functional Description The ’AC/’ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. Function Table Inputs Internal Outputs CP H H L NC Z Hold H H H NC Z Hold H N L L Z Load H N H H Z Load L N L L L Data Available L N H H H Data Available L H L NC NC No Change in Data L H H NC NC No Change in Data D Q H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition NC = No Change www.national.com 2 Function OE ON Logic Diagram DS100256-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.national.com Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC +0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC +0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current Per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP Supply Voltage (VCC) (Unless Otherwise Specified) (AC) (ACT) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (∆V/∆t) ’AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ’ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC +0.5V −20 mA +20 mA −0.5V to VCC +0.5V ± 50 mA ± 50 mA −65˚C to +150˚C 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications. 175˚C DC Characteristics for ’AC Family Devices Symbol Parameter VCC 54AC TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VIH VIL VOH Minimum High 3.0 2.1 Level Input 4.5 3.15 Voltage 5.5 3.85 Maximum Low 3.0 0.9 Level Input 4.5 1.35 Voltage 5.5 1.65 Minimum High 3.0 2.9 Level Output 4.5 4.4 Voltage 5.5 5.4 VOUT = 0.1V V or VCC − 0.1V V or VCC − 0.1V VOUT = 0.1V IOUT = −50 µA V (Note 2) VIN = VIL or VIH VOL 3.0 2.4 4.5 3.7 5.5 4.7 Maximum Low 3.0 0.1 Level Output 4.5 0.1 Voltage 5.5 0.1 −12 mA V IOH −24 mA −24 mA IOUT = 50 µA V (Note 2) VIN = VIL or VIH IIN Maximum Input 3.0 0.50 4.5 0.50 12 mA V 5.5 0.50 5.5 ± 1.0 µA 5.5 ± 5.0 µA IOL 24 mA 24 mA VI = VCC, GND Leakage Current IOZ Maximum TRI-STATE Leakage Current www.national.com 4 VI (OE) = VIL, VIH VI = VCC, VGND VO = VCC, GND DC Characteristics for ’AC Family Devices Symbol Parameter (Continued) VCC 54AC TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits IOLD IOHD (Note 3) Minimum Dynamic Output Current ICC Maximum Quiescent 5.5 50 mA VOLD = 1.65V 5.5 −50 mA VOHD = 3.85V 5.5 80.0 µA VIN = VCC Supply Current or GND Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. DC Characteristics for ’ACT Family Devices Symbol Parameter VCC 54ACT TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VIH Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage VOH Minimum High Level 4.5 2.0 5.5 2.0 4.5 0.8 5.5 0.8 4.5 4.4 5.5 5.4 V VOUT = 0.1V or VCC − 0.1V V VOUT = 0.1V or VCC − 0.1V V IOUT = −50 µA (Note 4) VIN = VIL or VIH VOL Maximum Low Level Output Voltage 4.5 3.70 5.5 4.70 4.5 0.1 5.5 0.1 V IOH −24 mA −24 mA V IOUT = 50 µA (Note 4) VIN = VIL or VIH 4.5 0.50 5.5 0.50 5.5 ± 1.0 µA VI = VCC, GND Maximum TRI-STATE Leakage Current 5.5 ± 5.0 µA VI = VIL, VIH ICCT Maximum ICC/Input 5.5 1.6 mA IOLD 5.5 50 mA IOHD (Note 5) Minimum Dynamic Output Current 5.5 −50 mA VOHD = 3.85V ICC Maximum Quiescent 5.5 80.0 µA VIN = VCC IIN Maximum Input V IOL 24 mA 24 mA Leakage Current IOZ VO = VCC, GND Supply Current VI = VCC − 2.1V VOLD = 1.65V or GND Note 4: All outputs loaded; thresholds on input associated with output under test. Note 5: Maximum test duration 2.0 ms, one output loaded at a time. 5 www.national.com AC Electrical Characteristics for ’AC Family Devices 54AC TA = −55˚C VCC Symbol Parameter (V) to +125˚C CL = 50 pF (Note 6) Min fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock 3.3 55 Frequency 5.0 85 Units Max MHz Propagation Delay 3.3 1.0 16.5 CP to On 5.0 1.5 11.5 Propagation Delay 3.3 1.0 15.0 CP to On 5.0 1.5 10.5 Output Enable Time 3.3 1.0 13.0 5.0 1.5 9.5 3.3 1.0 12.5 5.0 1.5 9.5 3.3 1.0 14.0 5.0 1.5 11.5 3.3 1.0 10.5 5.0 1.5 9.0 Output Enable Time Output Disable Time Output Disable Time ns ns ns ns ns ns Note 6: Voltage Range 3.3 is 3.3V ± 0.3V Voltage Range 5.0 is 5.0V ± 0.5V AC Operating Requirements for ’AC Family Devices VCC Symbol Parameter (V) (Note 7) 54AC TA = −55˚C to +125˚C CL = 50 pF Units Guaranteed Minimum ts th tw Set-Up Time, HIGH or LOW 3.3 4.5 Dn to CP 5.0 3.5 Hold Time, HIGH or LOW 3.3 2.5 Dn to CP 5.0 2.5 CP Pulse Width 3.3 7.5 HIGH or LOW 5.0 5.0 Note 7: Voltage Range 3.3 is 3.3V ± 0.3V Voltage Range 5.0 is 5.0V ± 0.5V www.national.com 6 ns ns ns AC Electrical Characteristics for ’ACT Family Devices 54ACT TA = −55˚C VCC Symbol Parameter (V) to +125˚C CL = 50 pF (Note 8) Min Units Max fMAX Maximum Clock Frequency 5.0 70 tPLH Propagation Delay 5.0 1.5 13.5 ns 5.0 1.5 12.5 ns ns CP to On tPHL Propagation Delay CP to On tPZH Output Enable Time 5.0 1.5 11.0 ns tPZL Output Enable Time 5.0 1.5 11.0 ns tPHZ Output Disable Time 5.0 1.5 12.0 ns tPLZ Output Disable Time 5.0 1.5 10.0 ns Note 8: Voltage Range 5.0 is 5.0V ± 0.5V AC Operating Requirements for ’ACT Family Devices VCC Symbol Parameter (V) (Note 9) 54ACT TA = −55˚C to +125˚C CL = 50 pF Units Guaranteed Minimum ts Set-Up Time, HIGH or LOW 5.0 3.5 ns 5.0 2.0 ns 5.0 5.0 ns Dn to CP th Hold Time, HIGH or LOW Dn to CP tw CP Pulse Width HIGH or LOW Note 9: Voltage Range 5.0 is 5.0V ± 0.5V Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF CPD Power Dissipation Capacitance 40.0 pF 7 Conditions VCC = OPEN VCC = 5.0V www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20 Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A 20 Lead Ceramic Flatpak (F) NS Package Number W20A 9 www.national.com 54AC574 • 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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