PTC PT4316-SL

Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
DESCRIPTION
The PT4316 is a very low power consumption single chip OOK/ASK superheterodyne receiver for the
315MHz and 434MHz frequency bands and which offers a high level of integration and requires few
external components. The PT4316 consists of a low-noise amplifier (LNA), mixer, SAW-based local
oscillator, on-chip Sallen-Key low-pass filter, intermediate frequency (IF) limiting amplifier stage with
received-signal-strength indicator (RSSI), and analog baseband data recovery circuitry (data filter,
peak detector, and data slicer). The PT4316 also implements a discrete one-step automatic gain
control (AGC) that reduces the LNA gain by 20dB when the RF input signal is greater than -60dBm.
The PT4316 is available in a 16-pin SOP or SSOP package. Both versions are specified over the
extended temperature range (-40℃ to +85℃).
FEATURES
•
•
•
•
•
•
•
•
Low current consumption (4.2mA at VDD = 3.0V)
2.4V to 3.6V supply voltage operation range
Optimized for 315MHz or 434MHz ISM Band
Saw-based oscillator with low frequency drift
High dynamic range with on-chip AGC
Power down mode with very low supply current (<1µA)
Low external parts count
Available in 16 pins, SOP or SSOP package
APPLICATIONS
•
•
•
•
•
•
Keyless entry systems
Remote control systems
Garage door openers
Alarm systems
Security systems
Wireless sensors
PT4316 V1.6
-1-
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
BLOCK DIAGRAM
OSCOUT
OSCIN
VSS
DATA
DSN
PDOUT
OPP
VDD
16
15
14
13
12
11
10
9
Data Slicer
SAW Oscillator
Peak Detector
Buffer
Data Filter
AGC
RSSI
Limiter with RSSI
BIAS
Mixer IF Low-pass Filter
LNA
PT4316 V1.6
1
2
3
4
5
6
7
8
CE
CAGC
RFIN
VSSLNA
LNAOUT
LIMIN
DFFB
DSP
-2-
August, 2007
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URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
PIN CONFIGURATION
PT4316 V1.6
-3-
August, 2007
Tel: 886-2-66296288
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URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
PIN DESCRIPTION
Pin Name
CE
CAGC
RFIN
VSSLNA
LNAOUT
LIMIN
DFFB
DSP
VDD
OPP
PDOUT
DSN
DATA
VSS
OSCIN
OSCOUT
PT4316 V1.6
I/O
I
O
I
G
O
I
I
I
P
I
O
I
O
G
I
O
Description
Chip enable
AGC capacitor
RF input
Ground for LNA
LNAOUT
Limiting amplifier de-coupling input
Data filter feedback point
Positive input of data slicer (data filter output)
Power supply
Non-inverting op-amp input
Peak detector output
Negative input of data slicer
Data output
Ground
Oscillator input
Oscillator output
-4-
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
August, 2007
Tel: 886-2-66296288
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URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
FUNCTION DESCRIPTION
The PT4316 CMOS superheterodyne receiver provides the functionality of a complete receive chain
from an antenna input to digital data output. Depending upon signal power and component selection,
data rates as high as 50 Kb/s may be achieved.
LOW NOISE AMPLIFIER (LNA)
The LNA is an on-chip cascode amplifier with a power gain of 16dB and a noise figure of 3dB. The gain
is determined by external matching networks situated ahead of the LNA and between the LNA output
and the mixer input.
An example of the input matching network and the input impedance of PT4316 for 315/434MHz bands
are shown in the following figure. The component values given in the table following the application
circuit are nominal values only. For a particular PCB layout, the user may be required to make
component adjustments in order to achieve highest sensitivity.
C3
C2
Frequency
(MHz)
315
433.92
3
RFIN
C4
LNA Input Impedance (Pin 3)
Normalized to 50Ω
4.18—j251.63
3.60—j180.20
The LNA output of PT4316 internally connects to the mixer stage so that its output impedance cannot
be measured directly. The LNA output requires a DC supply through a choke inductor. For obtaining
better LNA gain, a capacitor is recommended to be added in parallel with this inductor to implement a
resonant tank at the desired frequency as shown in the following figure. Note that the LNA might
self-oscillate and degrade the receiver sensitivity, particularly if a large inductor value is chosen. An
alternate matching method is to replace the parallel capacitor with a 330 to 1KΩ resistor, which would
reduce the resonant tank Q (quality factor) and avoid the self-oscillation.
VDD
R1
L2
5
LNAOUT
C5
PT4316 V1.6
-5-
C8
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
The LNA incorporates gain control circuitry. When the RSSI voltage exceeds a threshold reference
value corresponding to an RF input level of approximately -60dBm, the AGC switches on the LNA gain
reduction resistor. The loading resistor reduces the LNA gain by 20dB, thereby reducing the RSSI
output by approximately 280mV. The threshold reference voltage which is compared with the RSSI
voltage to determine the gain state of the LNA is also reduced. The LNA resumes high-gain mode
when the RSSI voltage drops below this lower threshold voltage corresponding to approximately
-66dBm RF input. The AGC has a hysteresis of around 6dB and the time constant of the AGC response
is determined by the value of the capacitor connected to pin 2 (CAGC). The capacitor value should be
chosen with consideration of the data rate.
MIXER
The doubly-balanced mixer down-converts the input frequency (RF) in the range of 250MHz to
500MHz to the intermediate frequency (IF) at 1.2MHz with a voltage gain of approximately 20dB by
utilizing either high- or low-side injection of the local oscillator signal. In the case that the RF input to
the mixer is single-ended, the unused mixer input must be tied to ground via a capacitor. The mixer is
followed by a low pass filter with a corner frequency of 5MHz in order to suppress RF signals at the IF
output.
Both the desired signal band and image signal band are converted to the IF band. If the environment,
especially the image channel, is noisy, it is recommended that an external SAW filter be added to
remove the unwanted signals. The channel selectivity indicates the ability of the noise rejection. The
measurement of channel selectivity of PT4316 without the external SAW filter is shown in the figure as
the following.
-50
Sensitivity and Selectivity @434 MHz Band
Selectivity
RF Input Power (dBm)
-60
Sensitivity
-70
-80
-90
-100
-110
430.92
432.42
433.92
435.42
436.92
438.42
439.92
RF Input Frequency (MHz)
PT4316 V1.6
-6-
August, 2007
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URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
IF LOW-PASS FILTER
The built-in IF filter is composed of three Sallen-Key low-pass filter stages and it has a -3dB bandwidth
of 3.1MHz. One stage Sallen-Key filter and frequency response of three cascaded filters as following
figure.
SAW OSCILLATOR
The SAW oscillator is configured as a Colpitts oscillator but consists of 3 cascaded amplifiers instead
of a single amplifier. Although the circuit configuration is quite similar to the conventional Colpitts
oscillator, this configuration is capable of generating a much higher value of negative resistance. The
one-port SAW resonator is connected between pin 15 (OSCIN) and pin 16 (OSCOUT).
The capacitor connected from pin 15 (OSCIN) to ground is used for adjusting the oscillation frequency.
In general, this capacitor is unnecessary if the frequency drift can be ignored. The figures at below, an
equivalent circuit of a SAW resonator and its component valuesare, are shown for reference.
L1
C1
R1
C0
16
OSCIN 15
OSCOUT
SAW resonator equivalent circuit
SAW Resonator
*C11
*Optional
Part Number
MFSRA316.2
MFSRA435.2
PT4316 V1.6
Center Frequency(MHz)
316.2
435.2
-7-
R1 (Ω)
19
20
L1 (µH)
119.06
86.47
C1 (pF)
0.00213
0.00155
C0 (pF)
2.4
2.0
August, 2007
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
For down-converting the RF signal to the IF frequency, a suitable SAW oscillation frequency must be
chosen. For the PT4316, the -3dB bandwidth of the IF chain is located from 250KHz to 3.1MHz and its
optimum value is around 1.2MHz. The following equation may be utilized to calculate an appropriate
SAW oscillator frequency.
SAW Oscillator (Freq.) = TX (Freq.) +/– (250KHz ~ 3.1MHz)
In addition to a SAW resonator, the resonant circuit may also be achieved by an “L-C tank”. The
recommended circuit for an “L-C tank” is as the following figure.
OSCOUT 16
Frequency
(MHz)
315
433.92
C14
OSCIN 15
C15
C14
(pF)
100
100
C15
(pF)
10
5.6
Trimmer L3
(H)
2.5 T
1.5 T
LIMITER/RSSI
The limiter is an AC coupled multi-stage amplifier with a cumulative gain of approximately 70dB that
has a band-pass characteristic centered around 2MHz. The -3dB bandwidth of the limiter is around
5MHz (from 250KHz to 5.2MHz). The limiter circuit also produces an RSSI voltage that is directly
proportional to the input signal level with a slope of approximately 14mV/dB. This signal is used to
demodulate ASK-modulated receive signals in the subsequent baseband circuitry.
PT4316 V1.6
-8-
August, 2007
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URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
AUTO GAIN CONTROL (AGC)
The AGC circuitry monitors the RSSI voltage level. As described above, when the RSSI voltage
reaches a first value corresponding to an RF input level of approximately -60dBm, the AGC reduces
the LNA gain by 20dB, thereby reducing the RSSI output by approximately 280mV. When the RSSI
voltage drops below a level corresponding to an RF input of approximately -66dBm, the AGC sets the
LNA back to high-gain mode.
The change of RSSI voltage versus RF input power is shown as the following figure. When the RSSI
level increases and then exceeds 1.68 V (RF input power rising), the AGC switches the LNA from
high-gain mode to low-gain mode. As RSSI level decreases back to 1.25V (RF input power falling), the
AGC switches the LNA from low-gain mode back to high-gain mode.
RSSI Curve w/wo AGC Function
1.90
RF Power from Low to High
RF Power from High to Low
RSSI Voltage (V)
1.75
RSSI Curve without AGC
1.60
1.45
1.30
1.15
1.00
-120
-100
-80
-60
-40
-20
RF Input Power (dBm)
RSSI vs. RF input power
PT4316 V1.6
-9-
August, 2007
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
DATA FILTER
The data filter is also implemented as a 2nd-order low-pass Sallen-Key filter as shown in the following
figure. The pole locations are set by the combination of two on-chip resistors and two external
capacitors. Adjusting the value of the external capacitors changes the corner frequency to optimize for
different data rates. The corner frequency should be set to approximately 1.5 times the highest
expected data rate from the transmitter. Ideal Sallen-Key filter is as the following figure.
C6
VIN
R
VOUT
R
C7
Utilizing the on-board voltage follower and the two 100KΩ on-chip resistors, a 2nd-order Sallen-Key low
pass data filter can be constructed by adding 2 external capacitors between pins 7 (DFFB) and 8 (DSP)
and to pin 10 (OPP) as depicted in the Application Circuit (see p.18). The following table shows the
recommended values of the capacitors for the different data rate.
Data Rate
< 2Kb/s
2Kb/s — 10Kb/s
10Kb/s — 20Kb/s
20Kb/s — 40Kb/s
> 40Kb/s (see Note)
C6 (pF)
1000
470
150
56
15
C7 (pF)
270
150
56
15
4.7
Note: the maximum data rate of PT4316 is 50Kb/s
PT4316 V1.6
- 10 -
August, 2007
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
PEAK DETECTOR
The peak detector generates a DC voltage which is proportional to the peak value of the received data
signal. An external R-C network is necessary. The peak detector input is connected to the RSSI output
of the limiter and the output is connected to pin 8 (DSP). This output can be used as an indicator for the
received signal strength for use in wake-up circuits and as a reference for the data slicer in ASK mode.
The time constant is calculated with the driving current of the data filter op-amp, 100µA. Circuit for
using peak detector for faster start-up as the following figure.
Data Output
Data Filter
Data Slicer
12
11
R4
C12
R5
DATA SLICER
The data slicer consists chiefly of a fast comparator, which allows for a maximum receive data rate of
up to 50Kb/s. The maximum achievable data rate also depends upon the IF filter bandwidth. Both data
slicer inputs are accessible off-chip to allow for easy adjustment of the slicing threshold. The output
delivers a digital data signal (CMOS level) for subsequent circuits. The self-adjusting threshold on pin
12(DSN) is generated by an R-C network or peak detector depending upon the baseband coding
scheme.
The suggested data slicer configuration uses an internal 100KΩ resistor connected between DSN and
DSP with a capacitor from DSN to ground as shown in the following figure. The cut-off frequency of the
R-C integrator must be set lower than the lowest frequency appearing in the data signal to minimize
distortion in the output signal. Circuit for generating data slicer threshold as following figure.
Data Output
Data Filter
Data Slicer
12
11
C12
PT4316 V1.6
- 11 -
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
DEMODULATION
By the different circuit combination, the PT4316 can achieve two demodulation modes, which are
called “Peak Mode” and “Average Mode.”
PEAK MODE
By adjusting the ratio of R4/R9, the threshold voltage can be set at the peak detector output for
comparison (see the figure of Circuit for using peak detector for faster start-up at p.11). The
demodulated data would go into a quasi-mute state as the RF input signal becomes very small, which
means when there is no RF signal received or the RF signal is too small, the DATA output will remain
mostly at a logic “HIGH” level. If the environment is very noisy, the R4 value may be enlarged to
achieve better immunity against noise but at the cost of less sensitivity.
AVERAGE MODE
When the “Average Mode” has been set (see the figure of Circuit for generating data slicer threshold at
p.11), the DATA output will exhibit a toggling behaviour similar to random noise. In this mode, better
sensitivity may be achieved, but noise immunity is worse than in “Peak Mode.”
POWER-DOWN CONTROL
The chip enable (CE) pin controls the power on/off behaviour of the PT4316. Connecting CE to “HIGH”
sets the PT4316 to the normal operation mode; connecting CE to “LOW” sets the PT4316 to standby
mode. The chip consumption current will be lower than 1µA in standby mode. Once enabled, the
PT4316 requires <10ms to recover received data. Timing plot of PT4316 chip enable as following
figure.
PT4316
CE
OSC
DATA O/P
PT4316 V1.6
- 12 -
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
ANTENNA DESIGN
For a λ/4 dipole antenna and operating frequency, f (in MHz), the required antenna length, L (in cm),
may be calculated by using the formula
7132
L=
.
f
For example, if the frequency is 315MHz, then the length of a λ/4 antenna is 22.6cm. If the calculated
antenna length is too long for the application, then it may be reduced to λ/8, λ/16, etc. without
degrading the input return loss. However, the RF input matching circuit may need to be re-optimized.
Note that in general, the shorter the antenna, the worse the receiver sensitivity and the shorter the
detection distance. Usually, when designing a λ/4 dipole antenna, it is better to use a single
conductive wire (diameter about 0.8 mm to 1.6 mm) rather than a multiple core wire.
If the antenna is printed on the PCB, ensure there is neither any component nor ground plane
underneath the antenna on the backside of PCB. For an FR4 PCB (εr = 4.7) and a strip-width of 30mil,
the length of the antenna, L (in cm), is calculated by
c
L=
where “c” is the speed of light (3 x 1010 cm/s)
4× f × εr
When the PT4316 is operated in a noisy environment, it is recommended that an external SAW filter be
added between the input matching network and antenna.
PT4316 V1.6
- 13 -
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
PCB LAYOUT CONSIDERATION
Proper PCB layout is extremely critical in achieving good RF performance. At the very least, using a
two-layer PCB is strongly recommended, so that one layer may incorporate a continuous ground plane.
A large number of via holes should connect the ground plane areas between the top and bottom layers.
Note that if the PCB design incorporates a printed loop antenna, there should be no ground plane
beneath the antenna.
Within the PT4316, the power supply rails of the LNA and others blocks should be separated for
improving the isolation and minimizing the noise coupling effects. Careful consideration must also be
paid to the supply power and ground at the board level. The larger ground area plane should be placed
as close as possible to the VSS and VSSLNA pins. To reduce supply bus noise coupling, sensitive
blocks such as the LNA or mixer should be biased thru separated power supply traces, incorporating
series-R, shunt-C filtering as the following figure.
If the power source is capable of supplying a stable voltage, C’ may be ignored. In some applications,
the DC source may be supplied from a simple AC-DC transformer. In such cases, the DC voltage level
could be unstable and may adversely affect ASK/OOK receiver sensitivity. A solution may be to
increase C to an appropriately large value while continuing to make the power source as stable as
possible.
Finally, in an RF system, it is extremely important to keep the LNA or RF signal traces away from large
voltage swing signals and digital data signal traces to avoid unnecessary interference.
PT4316 V1.6
- 14 -
August, 2007
Tel: 886-2-66296288
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
ABSOLUTE MAXIMUM RATINGS
(VSS = 0 V)
Parameter
Supply voltage range
Soldering temperature
Soldering time
Operating temperature range
Storage temperature range
Symbol
VDD
TSLD
tSTG
Topr
Tstg
Rating
VSS- 0.3 to VSS + 6.0
225
10
-40 to 85
-55 to 150
Unit
V
℃
s
℃
℃
RECOMMENDED OPERATING CONDITIONS
(VSS = 0 V)
Parameter
Symbol
Supply voltage range
Operating temperature
PT4316 V1.6
VDD
TA
- 15 -
Min.
2.4
-40
Value
Typ.
3.0
27
Max.
3.6
85
Unit
V
℃
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
ELECTRICAL CHARACTERISTICS
(VDD = 3.0V, VSS = 0V, CE = “HIGH”, Temp= +27℃, fRF = 433.92MHz)
Parameter
General Characteristics
Frequency range
Maximum receiver input level
Sensitivity (see Note 1)
Data rate (see Note 3)
Power Supply
Supply voltage
Consumption DC current
Standby DC current
LNA
Power gain
Noise figure
Input third-order
intermodulation intercept point
Auto Gain Control (AGC)
AGC attack and decay ratio
(see Note 4)
AGC leakage current
AGC threshold voltage
AGC threshold referred to the
RF input power (see Note 5)
Down-Conversion Mixer
Conversion voltage gain
Noise figure (SSB)
Input third-order
intermodulation intercept point
IF Filter
Bandwidth
SAW Oscillator
Start-Up time
IF Limiting Amplifier
IF frequency
Gain
PT4316 V1.6
Symbol
Condition
fRF
250
-20
PRF, MAX
SIN
Value
Unit
Min. Typ. Max.
ASK (see Note 2),
peak power level
OOK, peak power level
DRate
VDD
IDD
2.4
500
-10
MHz
dBm
-103
-100
-97
1
-94
50
Kb/s
3.0
4.2
3.6
4.6
1.0
V
mA
µA
18
3.6
dB
dB
dBm
Istand-by
CE = “HIGH”
CE = “LOW”
GLNA
NFLNA
Matched to 50Ω
Matched to 50Ω
16
3
IIP3LNA
Matched to 50Ω
-12
dBm
RAAGC
Tattack/Tdecay
0.1
-
ILeak,AGC
at +85℃
LNA gain from low to high
LNA gain from high to low
LNA gain from low to high
LNA gain from high to low
±100
1.25
1.68
-66
-60
nA
Vthresh
Pin,thresh
GMIX
NFMIX
16
20
19
V
dBm
20
dB
dB
IIP3MIX
-16
dBm
BWIFF
3.1
MHz
TOSC,start
fIF
GLIM
1.2
70
- 16 -
200
µs
80
MHz
dB
August, 2007
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
Parameter
Symbol
Bandwidth
RSSI dynamic range
RSSI curve slope
BWLIM
DRRSSI
SLRSSI
RSSI level
VRSSI
Condition
PRF < -120dBm
PRF > -30dBm
PT4316
Min.
Value
Typ. Max.
5
70
14 10.8
1.0
1.8
Unit
MHz
dB
mV/dB
V
Data Filter
Bandwidth
BWDF
1
50
KHz
Maximum load capacitance
CLoad,DS
20
pF
Notes:
1. BER = 1e-3, data rate = 2Kb/s.
2. Use AM 99% with square wave modulation (if limited by capabilities of signal generator).
3. Data rate selection affects choice of component values for data filter, peak detector and slicer.
4. AGC attack and decay currents are around 15µA and 1.5µA.
5. AGC threshold depends on the gain setting and matching of LNA.
PT4316 V1.6
- 17 -
August, 2007
Tel: 886-2-66296288
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Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
APPLICATION CIRCUIT
ENABLE
R3
L1
C3
C1
C4
C2
ANTENNA
C8
C5
1
CE
2
CAGC
3
RFIN
4
L2
VSSLNA
5
C9
R1
LNAOUT
6
7
C6
VDD
8
16
OSCOUT
OSCIN
12
DSN
DFFB
OPP
DSP
VDD
10
9
Value for 315MHz
Peak Mode
S1
(see Note 1)
DATA
C12
R4
11
R5
C7
C10
R2
PT4316
Component
R6
13
DATA
PDOUT
C11
14
VSS
LIMB
S1
15
VDD
Value for 434MHz
Average mode
Peak Mode
313.2 — 314.5
315.5 — 316.8
Average mode
432.1 — 432.4
434.4 — 435.7
Unit
MHz
R1, R2
33
33
33
33
Ω
R3
10K
10K
10K
10K
Ω
R4
12K
—
12K
—
Ω
R5
1M
—
1M
—
Ω
R6
1K
1K
1K
1K
Ω
L1
56n
56n
33n
33n
H
L2
82n
82n
68n
68n
H
C1, C5, C10, C12
100n
100n
100n
100n
F
C2
10p
10p
10p
10p
F
C3
1.8p
1.8p
1.8p
1.8p
F
*C4
0.56p
0.56p
0.56p
0.56p
F
C6
470p
470p
470p
470p
F
C7
150p
150p
150p
150p
F
*C8
1.5p
1.5p
—
—
F
C9
100p
100p
100p
100p
*C11
—
—
—
—
Notes:
1. S1 is the SAW resonator, and ±700KHz frequency difference is acceptable for 2dB sensitivity variation.
2. The data filter and slicer are optimized for 1K ~ 5Kbps data rate in this application circuit.
3. * (C4, C8 and C11) means the optional component.
PT4316 V1.6
- 18 -
F
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
TEST BOARD LAYOUT
<Top Side>
<Bottom Side>
PT4316 V1.6
- 19 -
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
ORDER INFORMATION
Valid Part Number
PT4316-S (L)
PT4316-X (L)
Package Type
16 Pins, SOP, 150mil
16 Pins, SSOP, 150mil
Top Code
PT4316-S
PT4316-X
Notes:
1. (L) means Lead Free.
2. The Lead Free mark is placed in-front of the date code.
PT4316 V1.6
- 20 -
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
PACKAGE INFORMATION
16 PINS, SOP, 150MIL
PT4316 V1.6
- 21 -
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316 V1.6
- 22 -
PT4316
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
Symbol
A
A1
A2
b
b1
c
c1
D
E
E1
e
L
L1
L2
R
R1
h
θ
θ1
θ2
Min.
1.35
0.10
1.25
0.31
0.28
0.17
0.17
0.40
0.07
0.07
0.25
0°
5°
0°
Typ.
9.90 BSC.
6.00 BSC.
3.90 BSC.
1.27 BSC.
1.04 REF.
0.25 BSC.
-
PT4316
Max.
1.75
0.25
1.65
0.51
0.48
0.25
0.23
1.27
0.50
8°
15°
-
Notes:
1.
Dimensioning and tolerancing per ANSI Y 14.5M-1994
2.
Controlling Dimension: MILLIMETERS.
3.
Dimension D does not include mold flash protrusions or gate burrs. Mold flash, protrusions or
gate burrs shall not exceed 0.15 mm (0.006 in) per end. Dimension E1 does not include
interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. D
and E1 dimensions are determined at datum H.
4.
The package top may be smaller than the package bottom. Dimensions D and E1 are
determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs,
gate burrs and interlead flash, but including any mismatch between the top and bottom of the
plastic body.
5.
Datums A & B to be determined at datum H.
6.
N is the number of terminal positions. (N=16)
7.
The dimensions apply to the flat section of the lead between 0.10 to 0.25mm from the lead tip.
8.
Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be
0.10mm total in excess of the “b” dimension at maximum material condition. The dambar cannot
be located on the lower radius of the foot.
9.
This chamfer feature is optional. If it is not present, then a pin 1 identifier must be located within
the index area indicated.
10. Refer to JEDEC MS-012, Variation AC.
JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT4316 V1.6
- 23 -
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
16 PINS, SSOP, 150MIL
PT4316 V1.6
- 24 -
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316 V1.6
- 25 -
PT4316
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
Symbol
A
A1
A2
b
b1
c
c1
D
E
E1
e
L
L1
L2
R
R1
θ
PT4316 V1.6
PT4316
Min.
0.053
0.004
0.049
0.008
0.008
0.006
0.006
Nom. Max.
0.069
0.010
0.065
0.012
0.010 0.011
0.010
0.008 0.009
0.193 BSC
0.236 BSC
0.154 BSC
0.025 BSC
0.016
0.050
0.041 REF
0.010 BSC
0.003
0.003
0°
8°
θ1
5°
-
θ2
aaa
bbb
ccc
ddd
eee
0°
-
15°
-
0.004
0.008
0.004
0.007
0.004
- 26 -
August, 2007
Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
Low Power 315/433 MHz OOK/ASK Superheterodyne
Receiver with SAW-based Oscillator
PT4316
Notes:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Dimensions in inches (angles in degrees)
3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate
burrs shall not exceed 0.006” per end. Dimension E1 does not include interlead flash or
protrusions. Interlead flash or protrusions shall not exceed “0.006” per side. D1 and E1 dimensions
are determined at dutum H.
4. The package top may be smaller than the package bottom. Dimensions D and E1 are determined at
the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and
interlead flash, but including any mismatch between the top and bottom of the plastic.
5. Datums A and B to be determined at datum H.
6. N is the maximum number of terminal position. (N=16)
7. The dimensions apply to the flat section of the lead between 0.004 to 0.010 inches from the lead tip.
8. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.004” total
in excess of b dimension at maximum material condition. The dambar can not be located on the
lower radius of the foot.
9. Refer to JEDEC MO-137 variation AB.
JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
PT4316 V1.6
- 27 -
August, 2007