CYPRESS CY26187SC-2

THIS SPEC IS OBSOLETE
Spec No: 38-07131
Spec Title: CY26187-2 Broadcom Reference Design Clock
Generator
Sunset Owner: RGL
Replaced by: NA
1CY2295
CY26187-2
Broadcom Reference Design
Clock Generator
Features
Benefits
• Integrated phase-locked loop
Highest Performance PLL tailored for multimedia applications
• Low skew, low jitter, high accuracy outputs
Meets critical timing requirements in complex system designs
• 3.3V Operation
Part Number
Outputs
Broadcom Reference
Design
Input Frequency
Output Frequencies
CY26187-2
1
BCM5680_5404
50 MHz
1 copy of 142.8 MHz (3.3V)
Logic Block Diagram
OUTPUT
MULTIPLEXER
AND
DIVIDERS
P Comp
50 XIN
OSC
Q
XOUT
VCO
142.8 MHz
P
PLL
OE
VDD
VDD
VSS
VSS
Pin Configuration
CY26187
8-pin SOIC
1
8
XOUT
AVDD
OE
2
7
3
6
VSS
142.8 MHz
AVSS
4
5
VDD
XIN
Cypress Semiconductor Corporation
Document #: 38-07131 Rev. OBS
•
3901 North First Street
•
San Jose
•
CA 95134 • 408-943-2600
Revised December 02, 2004
CY26187-2
Summary
Name
Pin Number
Description
XIN[1]
1
Reference Crystal Input
AVDD
2
Analog Voltage Supply
OE
3
Output enable (0-off; 1-on)
AVSS
4
Ground
VDD
5
Voltage Supply
142.8 MHz
6
142.8-MHz clock output
VSS
7
Ground
XOUT[1]
8
Reference Crystal Output
Absolute Maximum Conditions
Parameter
VDD
Description
Min.
Max.
Unit
7.0
V
Supply Voltage
Temperature[2]
TS
Storage
TJ
Junction Temperature
–65
125
°C
125
°C
Digital Inputs
VSS – 0.3
VDD + 0.3
V
Digital Outputs referred to VDD
VSS – 0.3
VDD + 0.3
V
Electro-Static Discharge
2
kV
Recommended Operating Conditions
Parameter
Description
Min.
Typ.
Max.
Unit
3.135
3.3
3.465
V
70
C
VDD
Operating Voltage
TA
Ambient Temperature
CLOAD
Max. Load Capacitance
15
pF
Pmax
Max. Output Power Dissipation,
8-pin package
150
mW
fREF
Reference Frequency
tPU
Power-up time for all VDD's to
reach minimum specified voltage
(power ramps must be monotonic)
0
50
MHz
0.05
500
ms
DC Electrical Characteristics
Parameter
Min.
Typ.
Output High Current
Name
VOH = VDD – 0.5, VDD = 3.3V
Description
12
24
Output Low Current
VOL = 0.5, VDD = 3.3V
12
24
Input Capacitance
Input Leakage Current
IVDD
Max.
mA
mA
7
pF
35
mA
µA
5
3.3V, All outputs @ 10 MHz
Unit
Notes:
1. Float XOUT pin if XIN is driven by reference clock (as opposed to crystal).
2. Rated for 10 years.
Document #: 38-07131 Rev. OBS
Page 2 of 5
CY26187-2
AC Electrical Characteristics (VDD = 3.3V) (3.)
Parameter
Name
Description
Output Duty Cycle
Min.
Duty Cycle is defined in Figure 1, 50% of VDD
Typ.
Max.
55
45
50
Rising Edge Slew Rate Output Clock Rise Time, 20%-80% of VDD
0.8
1.4
t4
Falling Edge Slew Rate Output Clock Fall Time, 80% to 20% of VDD
0.8
1.4
t9
Clock Jitter
t10
PLL Lock Time
t3
Peak to Peak period jitter
Unit
%
V/ns
V/ns
200
ps
3
ms
Note:
3. Not 100% tested.
Test Circuit
VDD
CLK out
0.1 µF
CLOAD
OUTPUTS
VDD
0.1 µF
GND
t1
t2
CLK
50%
Figure 1. Duty Cycle Definition; DC = t2/t1.
t3
t4
80%
CLK
20%
Figure 2. Rise and Fall Time Definitions.
Ordering Information
Ordering Code
Package Name
Package Type
Operating Range
Operating Voltage
CY26187SC-2
S8
8-Pin SOIC
Commercial
3.3V
Document #: 38-07131 Rev. OBS
Page 3 of 5
CY26187-2
Package Diagram
8-Lead (150-Mil) SOIC S8
51-85066-A
Document #: 38-07131 Rev. OBS
Page 4 of 5
© Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
CY26187-2
Revision History
Document Title: CY26187-2 Broadcom Reference Design Clock Generator
Document Number: 38-07131
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
110096
02/19/02
CKN
New data sheet
*A
121872
12/14/02
RBI
Power up requirements added to Operating Conditions Information
OBS
294822
See ECN
RGL
TO Obsolete the DS
Document #: 38-07131 Rev. OBS
Page 5 of 5