SM73302 SM73302 88 MHz, Precision, Low Noise, 1.8V CMOS Input, Decompensated Operational Amplifier Literature Number: SNOSB93 SM73302 88 MHz, Precision, Low Noise, 1.8V CMOS Input, Decompensated Operational Amplifier General Description Features The SM73302 low noise, CMOS input operational amplifier while offers a low input voltage noise density of 5.8 nV/ consuming only 1.15 mA of quiescent current. The SM73302 is stable at a gain of 10 and has a gain bandwidth (GBW) product of 88 MHz. The SM73302 has a supply voltage range of 1.8V to 5.5V and can operate from a single supply. The SM73302 features a rail-to-rail output stage, and is part of the precision amplifier family and is ideal for a variety of instrumentation applications. The SM73302 provides optimal performance in low voltage and low noise systems. A CMOS input stage, with typical input bias currents in the range of a few femtoamperes, and an input common mode voltage range, which includes ground, makes the SM73302 ideal for low power sensor applications where high speeds are needed. The SM73302 is manufactured using National’s advanced VIP50 process. The SM73302 is offered in a 5-Pin SOT-23 package. (Typical 5V supply, unless otherwise noted) ■ Renewable Energy Grade ±150 µV (max) ■ Input offset voltage 5.8 nV/√Hz ■ Input referred voltage noise 100 fA ■ Input bias current 88 MHz ■ Gain bandwidth product 1.8V to 5.5V ■ Supply voltage range 1.15mA ■ Supply current Rail-to-Rail output swing ■ 25 mV from rail — @ 10 kΩ load 45 mV from rail — @ 2 kΩ load ■ Guaranteed 2.5V and 5.0V performance 0.04% @1 kHz, 600Ω ■ Total harmonic distortion −40°C to 125°C ■ Temperature range Applications ■ ■ ■ ■ ■ ■ ADC interface Photodiode amplifiers Active filters and buffers Low noise signal processing Medical instrumentation Sensor interface applications Typical Application 30157769 Photodiode Transimpedance Amplifier 30157739 Input Referred Voltage Noise vs. Frequency LMH™ is a trademark of National Semiconductor Corporation. © 2011 National Semiconductor Corporation 301577 www.national.com SM73302 88 MHz, Precision, Low Noise, 1.8V CMOS Input, Decompensated Operational Amplifier August 16, 2011 SM73302 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. For soldering specifications: see product folder at www.national.com and www.national.com/ms/MS/MS-SOLDERING.pdf ESD Tolerance (Note 2) Human Body Model Machine Model Charge-Device Model VIN Differential Supply Voltage (V+ – V−) Input/Output Pin Voltage Storage Temperature Range Junction Temperature (Note 3) 2000V Operating Ratings 200V Temperature Range (Note 3) Supply Voltage (V+ – V−) −40°C ≤ TA ≤ 125°C 1000V ±0.3V 6.0V V+ +0.3V, V− −0.3V −65°C to 150°C +150°C 2.5V Electrical Characteristics (Note 1) −40°C to 125°C 2.0V to 5.5V 0°C ≤ TA ≤ 125°C 1.8V to 5.5V Package Thermal Resistance (θJA (Note 3)) 5-Pin SOT-23 180°C/W (Note 4) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.5V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at the temperature extremes. Symbol VOS Parameter Conditions Min Typ Max (Note 6) (Note 5) (Note 6) Input Offset Voltage ±20 ±180 ±480 µV −1.0 ±4 μV/°C −40°C ≤ TA ≤ 85°C 0.05 1 25 −40°C ≤ TA ≤ 125°C 0.05 1 100 .006 0.5 50 TC VOS Input Offset Voltage Temperature Drift (Note 7, Note 9) IB Input Bias Current VCM = 1.0V (Note 8, Note 9) IOS Input Offset Current VCM = 1.0V (Note 9) CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.4V 83 80 94 PSRR Power Supply Rejection Ratio 2.0V ≤ V+ ≤ 5.5V, VCM = 0V 85 80 100 1.8V ≤ V+ ≤ 5.5V, VCM = 0V 85 98 CMVR Common Mode Voltage Range CMRR ≥ 60 dB Open Loop Voltage Gain VOUT = 0.15V to 2.2V, RL = 2 kΩ to V+/2 VOUT = 0.15V to 2.2V, RL = 10 kΩ to V+/2 VOUT Output Voltage Swing High Output Voltage Swing Low IOUT Output Current www.national.com pA dB 1.5 1.5 88 82 98 92 88 110 25 70 77 RL = 10 kΩ to V+/2 20 60 66 RL = 2 kΩ to V+/2 30 70 73 RL = 10 kΩ to V+/2 15 60 62 Sourcing to V− VIN = 200 mV (Note 10) 36 30 47 Sinking to V+ VIN = –200 mV (Note 10) 7.5 5 15 V dB RL = 2 kΩ to V+/2 2 pA dB −0.3 −0.3 CMRR ≥ 55 dB AVOL Units mV from either rail mA Parameter IS Supply Current SR Slew Rate Conditions Min Typ Max (Note 6) (Note 5) (Note 6) 0.95 AV = +10, Rising (10% to 90%) 32 AV = +10, Falling (90% to 10%) 24 1.30 1.65 Units mA V/μs GBW Gain Bandwidth AV = +10, RL = 10 kΩ 88 en Input Referred Voltage Noise Density f = 1 kHz 6.2 nV/ in Input Referred Current Noise Density f = 1 kHz 0.01 pA/ f = 1 kHz, AV = 1, RL = 600Ω 0.01 THD+N Total Harmonic Distortion + Noise 5V Electrical Characteristics MHz % (Note 4) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at the temperature extremes. Symbol VOS Parameter Conditions Min Typ Max (Note 6) (Note 5) (Note 6) Input Offset Voltage ±10 ±150 ±450 µV −1.0 ±4 μV/°C −40°C ≤ TA ≤ 85°C 0.1 1 25 −40°C ≤ TA ≤ 125°C 0.1 1 100 .01 0.5 50 TC VOS Input Offset Voltage Temperature Drift (Note 7, Note 9) IB Input Bias Current VCM = 2.0V (Note 8, Note 9) IOS Input Offset Current VCM = 2.0V (Note 9) CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 3.7V 85 80 100 PSRR Power Supply Rejection Ratio 2.0V ≤ V+ ≤ 5.5V, VCM = 0V 85 80 100 1.8V ≤ V+ ≤ 5.5V, VCM = 0V 85 98 CMVR Common Mode Voltage Range CMRR ≥ 60 dB Open Loop Voltage Gain VOUT = 0.3V to 4.7V, RL = 2 kΩ to V+/2 VOUT = 0.3V to 4.7V, RL = 10 kΩ to V+/2 VOUT Output Voltage Swing High Output Voltage Swing Low 107 92 88 110 IS Output Short Circuit Current dB 35 70 77 RL = 10 kΩ to V+/2 25 60 66 42 70 73 25 60 66 RL = 10 kΩ to V+/2 IOUT V RL = 2 kΩ to V+/2 RL = 2 kΩ to Sourcing to V− VIN = 200 mV (Note 10) 46 38 60 Sinking to V+ VIN = –200 mV (Note 10) 10.5 6.5 21 Supply Current 1.15 3 pA dB 4 4 88 82 V+/2 pA dB −0.3 −0.3 CMRR ≥ 55 dB AVOL Units mV from either rail mA 1.40 1.75 mA www.national.com SM73302 Symbol SM73302 Symbol SR Parameter Slew Rate Conditions Min Typ Max (Note 6) (Note 5) (Note 6) AV = +10, Rising (10% to 90%) 35 AV = +10, Falling (90% to 10%) 28 Units V/μs GBW Gain Bandwidth AV = +10, RL = 10 kΩ 88 en Input Referred Voltage Noise Density f = 1 kHz 5.8 nV/ in Input Referred Current Noise Density f = 1 kHz 0.01 pA/ f = 1 kHz, AV = 1, RL = 600Ω 0.01 THD+N Total Harmonic Distortion + Noise MHz % Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Note 5: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the statistical quality control (SQC) method. Note 7: Offset voltage average drift is determined by dividing the change in VOS by temperature change. Note 8: Positive current corresponds to current flowing into the device. Note 9: Parameter is guaranteed by design and/or characterization and is not test in production. Note 10: The short circuit test is a momentary test, the short circuit duration is 1.5 ms. www.national.com 4 SM73302 Connection Diagram 5-Pin SOT-23 30157701 Top View Ordering Information Package Part Number 5-Pin SOT-23 SM73302MFE Package Marking Transport Media SC3B 250 Units Tape and Reel SM73302MF NSC Drawing 1k Units Tape and Reel SM73302MFX MF05A 3k Units Tape and Reel 5 www.national.com SM73302 Typical Performance Characteristics Unless otherwise specified, TA = 25°C, V– = 0, V+ = 5V, VS = V+ - V−, VCM = VS/2. TCVOS Distribution Offset Voltage Distribution 30157790 30157791 TCVOS Distribution Offset Voltage Distribution 30157793 30157792 Supply Current vs. Supply Voltage Offset Voltage vs. VCM 30157705 www.national.com 30157709 6 SM73302 Offset Voltage vs. VCM Offset Voltage vs. VCM 30157711 30157751 Offset Voltage vs. Temperature Slew Rate vs. Supply Voltage 30157752 30157712 Input Bias Current Over Temperature Input Bias Current vs. VCM 30157762 30157787 7 www.national.com SM73302 Offset Voltage vs. Supply Voltage Sourcing Current vs. Supply Voltage 30157727 30157720 Sinking Current vs. Supply Voltage Sourcing Current vs. Output Voltage 30157750 30157719 Sinking Current vs. Output Voltage Positive Output Swing vs. Supply Voltage 30157717 30157754 www.national.com 8 Positive Output Swing vs. Supply Voltage 30157715 30157716 Negative Output Swing vs. Supply Voltage Positive Output Swing vs. Supply Voltage 30157714 30157718 Negative Output Swing vs. Supply Voltage Input Referred Voltage Noise vs. Frequency 30157739 30157713 9 www.national.com SM73302 Negative Output Swing vs. Supply Voltage SM73302 Time Domain Voltage Noise Overshoot and Undershoot vs. CLOAD 30157781 30157730 THD+N vs. Frequency THD+N vs. Frequency 30157704 30157726 THD+N vs. Peak-to-Peak Output Voltage (VOUT) THD+N vs. Peak-to-Peak Output Voltage (VOUT) 30157774 www.national.com 30157775 10 Closed Loop Output Impedance vs. Frequency 30157732 30157706 Crosstalk Rejection Small Signal Transient Response, AV = +10 30157753 30157780 Large Signal Transient Response, AV = +10 Small Signal Transient Response, AV = +10 30157755 30157757 11 www.national.com SM73302 Open Loop Gain and Phase SM73302 Large Signal Transient Response, AV = +10 PSRR vs. Frequency 30157763 30157770 CMRR vs. Frequency Input Common Mode Capacitance vs. VCM 30157756 www.national.com 30157776 12 Advantages of Decompensated Op Amp A unity gain stable op amp, which is fully compensated, is designed to operate with good stability down to gains of ±1. The large amount of compensation does provide an op amp that is relatively easy to use; however, a decompensated op amp is designed to maximize the bandwidth and slew rate without any additional power consumption. This can be very advantageous. The SM73302 requires a gain of ±10 to be stable. However, with an external compensation network (a simple RC network) these parts can be stable with gains of ±1 and still maintain the higher slew rate. Looking at the Bode plots for the SM73302 and its closest equivalent unity gain stable op amp, the LMP7715, one can clearly see the increased bandwidth of the SM73302. Both plots are taken with a parallel combination of 20 pF and 10 kΩ for the output load. ADVANTAGES OF THE SM73302 Wide Bandwidth at Low Supply Current The SM73302 is a high performance op amp that provides a GBW of 88 MHz with a gain of 10 while drawing a low supply current of 1.15 mA. This makes it ideal for providing wideband amplification in data acquisition applications. With the proper external compensation, the SM73302 can be operated at gains of ±1 and still maintain much faster slew rates than comparable unity gain stable amplifiers. The increase in bandwidth and slew rate is obtained without any additional power consumption over the LMP7715. Low Input Referred Noise and Low Input Bias Current The SM73302 has a very low input referred voltage noise at 1 kHz). A CMOS input stage ensures density (5.8 nV/ a small input bias current (100 fA) and low input referred current noise (0.01 pA/ ). This is very helpful in maintaining signal integrity, and makes the SM73302 ideal for audio and sensor based applications. Low Supply Voltage The SM73302 has performance guaranteed at 2.5V and 5V supply. This part is guaranteed to be operational at all supply voltages between 2.0V and 5.5V, for ambient temperatures ranging from −40°C to 125°C, thus utilizing the entire battery lifetime. The SM73302 is also guaranteed to be operational at 1.8V supply voltage, for temperatures between 0°C and 125°C optimizing their usage in low-voltage applications. RRO and Ground Sensing Rail-to-Rail output (RRO) swing provides the maximum possible dynamic range. This is particularly important when operating at low supply voltages. An innovative positive feedback scheme is used to boost the current drive capability of the output stage. This allows the SM73302 to source more than 40 mA of current at 1.8V supply. This also limits the performance of this part as a comparator, and hence the usage of the SM73302 in an open-loop configuration is not recommended. The input common-mode range includes the negative supply rail which allows direct sensing at ground in single supply operation. 30157722 FIGURE 1. SM73302 AVOL vs. Frequency Small Size The small footprint of the SM73302 package saves space on printed circuit boards, and enables the design of smaller electronic products, such as cellular phones, pagers, or other portable systems. Long traces between the signal source and the op amp make the signal path more susceptible to noise pick up. The physically smaller SM73302 allows the op amp to be placed closer to the signal source, thus reducing noise pickup and maintaining signal integrity. 30157723 FIGURE 2. LMP7715 AVOL vs. Frequency Figure 1 shows the much larger 88 MHz bandwidth of the SM73302 as compared to the 17 MHz bandwidth of the LMP7715 shown in Figure 2. The decompensated SM73302 has five times the bandwidth of the LMP7715. 13 www.national.com SM73302 USING THE DECOMPENSATED SM73302 Application Information SM73302 unity gain op amp. Figure 4 shows the lead-lag configuration. Only RC and C are added for the necessary compensation. What is a Decompensated Op Amp? The differences between the unity gain stable op amp and the decompensated op amp are shown in Figure 3. This Bode plot assumes an ideal two pole system. The dominant pole of the decompensated op amp is at a higher frequency, f1, as compared to the unity gain stable op amp which is at fd as shown in Figure 3. This is done in order to increase the speed capability of the op amp while maintaining the same power dissipation of the unity gain stable op amp. The SM73302 has a dominant pole at 1.6 kHz. The unity gain stable LMP7715/ LMP7716 have their dominant pole at 300 Hz. 30157725 FIGURE 4. SM73302 with Lead-Lag Compensation for Inverting Configuration To cover how to calculate the compensation network values it is necessary to introduce the term called the feedback factor or F. The feedback factor F is the feedback voltage VA-VB across the op amp input terminals relative to the op amp output voltage VOUT. 30157724 From feedback theory the classic form of the feedback equation for op amps is: FIGURE 3. Open Loop Gain for Unity Gain Stable Op Amp and Decompensated Op Amp Having a higher frequency for the dominate pole will result in: 1. The DC open loop gain (AVOL) extending to a higher frequency. 2. A wider closed loop bandwidth. 3. Better slew rate due to reduced compensation capacitance within the op amp. The second open loop pole (f2) for the SM73302 occurs at 45 MHz. The unity gain (fu’) occurs after the second pole at 51 MHz. An ideal two pole system would give a phase margin of 45° at the location of the second pole. The SM73302 has parasitic poles close to the second pole, giving a phase margin closer to 0°. Therefore it is necessary to operate the SM73302 at a closed loop gain of 10 or higher, or to add external compensation in order to assure stability. For the LMP7715, the gain bandwidth product occurs at 17 MHz. The curve is constant from fd to fu which occurs before the second pole. For the SM73302 the GBW = 88 MHz and is constant between f1 and f2. The second pole at f2 occurs before AVOL =1. Therefore fu’ occurs at 51 MHz, well before the GBW frequency of 88 MHz. For decompensated op amps the unity gain frequency and the GBW are no longer equal. Gmin is the minimum gain for stability and for the SM73302 this is a gain of 18 to 20 dB. A is the open loop gain of the amplifier and AF is the loop gain. Both are highly important in analyzing op amps. Normally AF >>1 and so the above equation reduces to: Deriving the equations for the lead-lag compensation is beyond the scope of this datasheet. The derivation is based on the feedback equations that have just been covered. The inverse of feedback factor for the circuit in Figure 4 is: (1) where 1/F's pole is located at (2) 1/F's zero is located at Input Lead-Lag Compensation The recommended technique which allows the user to compensate the SM73302 for stable operation at any gain is leadlag compensation. The compensation components added to the circuit allow the user to shape the feedback function to make sure there is sufficient phase margin when the loop gain is as low as 0 dB and still maintain the advantages over the www.national.com (3) 14 SM73302 (4) The circuit gain for Figure 4 at low frequencies is −RF/RIN, but F, the feedback factor is not equal to the circuit gain. The feedback factor is derived from feedback theory and is the same for both inverting and non-inverting configurations. Yes, the feedback factor at low frequencies is equal to the gain for the non-inverting configuration. (5) From this formula, we can see that • 1/F's zero is located at a lower frequency compared with 1/F's pole. • 1/F's value at low frequency is 1 + RF/RIN. • This method creates one additional pole and one additional zero. • This pole-zero pair will serve two purposes: — To raise the 1/F value at higher frequencies prior to its intercept with A, the open loop gain curve, in order to meet the Gmin = 10 requirement. For the SM73302 some overcompensation will be necessary for good stability. — To achieve the previous purpose above with no additional loop phase delay. Please note the constraint 1/F ≥ Gmin needs to be satisfied only in the vicinity where the open loop gain A and 1/F intersect; 1/F can be shaped elsewhere as needed. The 1/F pole must occur before the intersection with the open loop gain A. In order to have adequate phase margin, it is desirable to follow these two rules: Rule 1 1/F and the open loop gain A should intersect at the frequency where there is a minimum of 45° of phase margin. When over-compensation is required the intersection point of A and 1/F is set at a frequency where the phase margin is above 45°, therefore increasing the stability of the circuit. Rule 2 1/F’s pole should be set at least one decade below the intersection with the open loop gain A in order to take advantage of the full 90° of phase lead brought by 1/F’s pole which is F’s zero. This ensures that the effect of the zero is fully neutralized when the 1/F and A plots intersect each other. 30157748 FIGURE 5. SM73302 Simplified Bode Plot To obtain stable operation with gains under 10 V/V the open loop gain margin must be reduced at high frequencies to where there is a 45° phase margin when the gain margin of the circuit with the external compensation is 0 dB. The pole and zero in F, the feedback factor, control the gain margin at the higher frequencies. The distance between F and AVOL is the gain margin; therefore, the unity gain point (0 dB) is where F crosses the AVOL curve. For the example being used RIN = RF for a gain of −1. Therefore F = 6 dB at low frequencies. At the higher frequencies the minimum value for F is 18 dB for 45° phase margin. From Equation 5 we have the following relationship: Now set RF = RIN = R. With these values and solving for RC we have RC = R/5.9. Note that the value of C does not affect the ratio between the resistors. Once the value of the resistors is set, then the position of the pole in F must be set. A 2 kΩ resistor is used for RF and RIN in this design. Therefore the value for RC is set at 330Ω, the closest standard value for 2 kΩ/5.9. Rewriting Equation 2 to solve for the minimum capacitor value gives the following equation: Calculating Lead-Lag Compensation for SM73302 Figure 5 is the same plot as Figure 1, but the AVOL and phase curves have been redrawn as smooth lines to more readily show the concepts covered, and to clearly show the key parameters used in the calculations for lead-lag compensation. C = 1/(2πfpRC) The feedback factor curve, F, intersects the AVOL curve at about 12 MHz. Therefore the pole of F should not be any larger than 1.2 MHz. Using this value and RC = 330Ω the minimum value for C is 390 pF. Figure 6 shows that there is too much overshoot, but the part is stable. Increasing C to 2.2 nF did not improve the ringing, as shown in Figure 7. 15 www.national.com SM73302 30157703 30157708 FIGURE 8. RC = 240Ω and C = 390 pF, Gain = −1 FIGURE 6. First Try at Compensation, Gain = −1 30157707 30157710 FIGURE 7. C Increased to 2.2 nF, Gain = −1 FIGURE 9. RC = 240Ω and C = 2.2 nF, Gain = −1 Some over-compensation appears to be needed for the desired overshoot characteristics. Instead of intersecting the AVOL curve at 18 dB, 2 dB of over-compensation will be used, and the AVOL curve will be intersected at 20 dB. Using Equation 5 for 20 dB, or 10 V/V, the closest standard value of RC is 240Ω. The following two waveforms show the new resistor value with C = 390 pF and 2.2 nF. Figure 9 shows the final compensation and a very good response for the 1 MHz square wave. To summarize, the following steps were taken to compensate the SM73302 for a gain of −1: 1. Values for Rc and C were calculated from the Bode plot to give an expected phase margin of 45°. The values were based on RIN = RF = 2 kΩ. These calculations gave Rc = 330Ω and C = 390 pF. 2. To reduce the ringing C was increased to 2.2 nF which moved the pole of F, the feedback factor, farther away from the AVOL curve. 3. There was still too much ringing so 2 dB of overcompensation was added to F. This was done by decreasing RC to 240Ω. The LMP7715 is the fully compensated part (without the Renewable Energy Grade), which is comparable to the SM73302 . Using the LMP7715 in the same setup, but removing the compensation network, provided the response shown in Figure 10 . www.national.com 16 30157721 FIGURE 10. LMP7715 Response For large signal response the rise and fall times are dominated by the slew rate of the op amps. Even though both parts are quite similar the SM73302 will give rise and fall times about 2.5 times faster than the LMP7715. This is possible because the SM73302 is a decompensated op amp and even though it is being used at a gain of −1, the speed is preserved by using a good technique for external compensation. 30157782 FIGURE 11. RC = 240Ω and C = 2.2 nF, Gain = +2 30157783 FIGURE 12. LMP7715 Response Gain = +2 The response shown in Figure 11 is close to the response shown in Figure 9. The part is actually slightly faster in the non-inverting configuration. Decreasing the value of RC to around 200Ω can decrease the negative overshoot but will have slightly longer rise and fall times. The other option is to add a small resistor in series with the input signal. Figure 12 shows the performance of the LMP7715 with no compensation. Again the decompensated parts are almost 2.5 times faster than the fully compensated op amp. The most difficult op amp configuration to stabilize is the gain of +1. With proper compensation the SM73302 can be used in this configuration and still maintain higher speeds than the 17 www.national.com SM73302 Non-Inverting Compensation For the non-inverting amp the same theory applies for establishing the needed compensation. When setting the inverting configuration for a gain of −1, F has a value of 2. For the noninverting configuration both F and the actual gain are the same, making the non-inverting configuration more difficult to compensate. Using the same circuit as shown in Figure 4, but setting up the circuit for non-inverting operation (gain of +2) results in similar performance as the inverting configuration with the inputs set to half the amplitude to compensate for the additional gain. Figure 11 below shows the results. SM73302 fully compensated parts. Figure 13 shows the gain = 1, or the buffer configuration, for these parts. 30157784 FIGURE 13. SM73302 with Lead-Lag Compensation for Non-Inverting Configuration 30157789 Figure 13 is the result of using Equation 5 and additional experimentation in the lab. RP is not part of Equation 5, but it is necessary to introduce another pole at the input stage for good performance at gain = +1. Equation 5 is shown below with RIN = ∞. FIGURE 15. LMP7715 Response Gain = +1 With no increase in power consumption the decompensated op amp offers faster speed than the compensated equivalent part . These examples used RF = 2 kΩ. This value is high enough to be easily driven by the SM73302, yet small enough to minimize the effects from the parasitic capacitance of both the PCB and the op amp. Note: When using the SM73302, proper high frequency PCB layout must be followed. The GBW of these parts is 88 MHz, making the PCB layout significantly more critical than when using the compensated counterparts which have a GBW of 17 MHz. Using 2 kΩ for RF and solving for RC gives RC = 2000/6.9 = 290Ω. The closest standard value for RC is 300Ω. After some fine tuning in the lab RC = 330Ω and RP = 1.5 kΩ were chosen as the optimum values. RP together with the input capacitance at the non-inverting pin inserts another pole into the compensation for the SM73302. Adding this pole and slightly reducing the compensation for 1/F (using a slightly higher resistor value for RC) gives the optimum response for a gain of +1. Figure 14 is the response of the circuit shown in Figure 13. Figure 15 shows the response of the LMP7715 in the buffer configuration with no compensation and RP = RF = 0. TRANSIMPEDANCE AMPLIFIER An excellent application for the SM73302 is as a transimpedance amplifier. With a GBW product of 88 MHz this part is ideal for high speed data transmission by light. The circuit shown on the front page of the datasheet is the circuit used to test the SM73302 as a transimpedance amplifier. The only change is that VB is tied to the VCC of the part, thus the direction of the diode is reversed from the circuit shown on the front page. Very high speed components were used in testing to check the limits of the SM73302 in a transimpedance configuration. The photodiode part number is PIN-HR040 from OSI Optoelectronics. The diode capacitance for this part is only about 7 pF for the 2.5V bias used (VCC to virtual ground). The rise time for this diode is 1 nsec. A laser diode was used for the light source. Laser diodes have on and off times under 5 nsec. The speed of the selected optical components allowed an accurate evaluation of the SM73302 as a transimpedance amplifier. Nationals evaluation board for decompensated op amps, PN 551013271-001 A, was used and only minor modifications were necessary and no traces had to be cut. 30157788 FIGURE 14. RC = 330Ω and C = 10 nF, Gain = +1 www.national.com 18 To attain maximum bandwidth and still have good stability the pole is to be located on the open loop gain curve which is A. If additional compensation is required one can always increase the value of CF, but this will also reduce the bandwidth of the circuit. Therefore A = 1/F, or AF = 1. For A the equation is: 30157761 FIGURE 16. Transimpedance Amplifier Figure 16 is the complete schematic for a transimpedance amplifier. Only the supply bypass capacitors are not shown. CD represents the photodiode capacitance which is given on its datasheet. CCM is the input common mode capacitance of the op amp and, for the SM73302 it is shown in the last graph of the Typical Performance Characteristics section of this datasheet. In Figure 16 the inverting input pin of the SM73302 is kept at virtual ground. Even though the diode is connected to the 2.5V line, a power supply line is AC ground, thus CD is connected to ground. Figure 17 shows the schematic needed to derive F, the feedback factor, for a transimpedance amplifier. In this figure CD + CCM = CIN. Therefore it is critical that the designer knows the diode capacitance and the op amp input capacitance. The photodiode is close to an ideal current source once its capacitance is included in the model. What kind of circuit is this? Without CF there is only an input capacitor and a feedback resistor. This circuit is a differentiator! Remember, differentiator circuits are inherently unstable and must be compensated. In this case CF compensates the circuit. The expression fGBW is the gain bandwidth product of the part. For a unity gain stable part this is the frequency where A = 1. For the SM73302 fGBW = 88 MHz. Multiplying A and F results in the following equation: For the above equation s = jω. To find the actual amplitude of the equation the square root of the square of the real and imaginary parts are calculated. At the intersection of F and A, we have: 30157764 FIGURE 17. Transimpedance Feedback Model Using feedback theory, F = VA/VOUT, this becomes a voltage divider giving the following equation: The noise gain is 1/F. Because this is a differentiator circuit, a zero must be inserted. The location of the zero is given by: 19 www.national.com SM73302 CF has been added for stability. The addition of this part adds a pole to the circuit. The pole is located at: SM73302 After a bit of algebraic manipulation the above equation reduces to: In the above equation the only unknown is CF. In trying to solve this equation the fourth power of CF must be dealt with. An excel spread sheet with this equation can be used and all the known values entered. Then through iteration, the value of CF when both sides are equal will be found. That is the correct value for CF and of course the closest standard value is used for CF. Before moving to the lab, the transfer function of the transimpedance amplifier must be found and the units must be in Ohms. 30157795 FIGURE 19. Rise Time In Figure 18 the ringing and the hump during the on time is from the laser. The higher drive levels for the laser gave ringing in the light source as well as light changing from the thermal characteristics. The hump is due to the thermal characteristics. Solving for CF using a 100 kΩ feedback resistor, the calculated value is 0.54 pF. One of the problems with more gain is the very small value for CF. A 0.5 pF capacitor was used, its measured value being 0.64 pF. For the 0.64 pF location the pole is at 2.5 MHz. Figure 20 shows the response for a 1V output. The SM73302 was evaluated for RF = 10 kΩ and 100 kΩ, representing a somewhat lower gain configuration and with the 100 kΩ feedback resistor a fairly high gain configuration. The RF = 10 kΩ is covered first. Looking at the Input Common Mode Capacitance vs. VCM chart for CCM for the operating point selected CCM = 15 pF. Note that for split supplies VCM = 2.5V, CIN = 22 pF and fGBW = 88 MHz. Solving for CF the calculated value is 1.75 pF, so 1.8 pF is selected for use. Checking the frequency of the pole finds that it is at 8.8 MHz, which is right at the minimum gain recommended for this part. Some over compensation was necessary for stability and the final selected value for CF is 2.7 pF. This moves the pole to 5.9 MHz. Figure 18 and Figure 19 show the rise and fall times obtained in the lab with a 1V output swing. The laser diode was difficult to drive due to thermal effects making the starting and ending point of the pulse quite different, therefore the two separate scope pictures. 30157796 FIGURE 20. High Gain Response A transimpedance amplifier is an excellent application for the SM73302. Even with the high gain using a 100 kΩ feedback resistor, the bandwidth is still well over 1 MHz. Other than a little over compensation for the 10 kΩ feedback resistor configuration using the SM73302 was quite easy. Of course a very good board layout was also used for this test. 30157794 FIGURE 18. Fall Time www.national.com 20 SM73302 Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SOT23 NS Package Number MF05A 21 www.national.com SM73302 88 MHz, Precision, Low Noise, 1.8V CMOS Input, Decompensated Operational Amplifier For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage References www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Applications & Markets www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic PLL/VCO www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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