LINER LTC1872BES6

LTC1872B
Constant Frequency
Current Mode Step-Up
DC/DC Controller in ThinSOT
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FEATURES
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DESCRIPTIO
Burst ModeTM Operation Disabled for Lower Output
Ripple at Light Loads
High Efficiency: Over 90%
High Output Currents Easily Achieved
Wide VIN Range: 2.5V to 9.8V
VOUT Limited Only by External Components
Constant Frequency 550kHz Operation
Current Mode Operation for Excellent Line and Load
Transient Response
Shutdown Mode Draws Only 8µA Supply Current
Low Profile (1mm) ThinSOTTM Package
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APPLICATIO S
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Optical Communications
Lithium-Ion-Powered Applications
Cellular Telephones
Wireless Devices
Portable Computers
Scanners
The LTC1872B provides a ±2.5% output voltage accuracy
and consumes only 270µA of quiescent current. In shutdown, the device draws a mere 8µA.
High constant operating frequency of 550kHz allows the
use of a small external inductor. The constant frequency
operation is maintained down to very light loads, resulting
in less low frequency noise generation over a wide load
current range.
The LTC1872B is available in a 6-lead low profile (1mm)
ThinSOT package. For a Burst Mode operation enabled
version of the LTC1872B, please refer to the LTC1872 data
sheet.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode and ThinSOT are trademarks of Linear Technology Corporation.
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The LTC®1872B is a constant frequency current mode
step-up DC/DC controller providing excellent AC and DC
load and line regulation. The device incorporates an accurate undervoltage lockout feature that shuts down the
LTC1872B when the input voltage falls below 2.0V.
TYPICAL APPLICATION
147k
220pF
80.6k
1
VIN
ITH/RUN
5
C1
10µF
10V
3
GND
VFB
SENSE –
90
NGATE
4
6
M1
D1
C2
4× 10µF
10V
VOUT
5V
1A
85
80
75
422k
C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT
C2: MURATA GRM42-2X5R106K010AL
D1: IR10BQ015
L1: MURATA LQN6C4R7M04
M1: Si2302DS
R1: DALE 0.25W
VIN = 3.3V
VOUT = 5V
95
L1
4.7µH
LTC1872B
2
100
EFFICIENCY (%)
R1
0.03Ω
Typical Efficiency vs Load Current*
VIN
3.3V
70
65
1
10
100
LOAD CURRENT (mA)
1000
1872B TA01
1872B TA01b
Figure 1. LTC1872B High Output Current 3.3V to 5V Boost Converter
*Output ripple waveforms for the circuit of Figure 1 appear in Figure 2.
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LTC1872B
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Input Supply Voltage (VIN).........................– 0.3V to 10V
SENSE –, NGATE Voltages ............ – 0.3V to (VIN + 0.3V)
VFB, ITH/RUN Voltages ..............................– 0.3V to 2.4V
NGATE Peak Output Current (< 10µs) ....................... 1A
Storage Ambient Temperature Range ... – 65°C to 150°C
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Junction Temperature (Note 3) ............................. 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
TOP VIEW
LTC1872BES6
6 NGATE
ITH/RUN 1
5 VIN
GND 2
4 SENSE –
VFB 3
S6 PART MARKING
S6 PACKAGE
6-LEAD PLASTIC SOT-23
LTXY
TJMAX = 150°C, θJA = 230°C/ W
Consult LTC marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise specified. (Note 2)
PARAMETER
CONDITIONS
Input DC Supply Current
Normal Operation
Sleep Mode
Shutdown
UVLO
Typicals at VIN = 4.2V (Note 4)
2.4V ≤ VIN ≤ 9.8V
2.4V ≤ VIN ≤ 9.8V
2.4V ≤ VIN ≤ 9.8V, VITH/RUN = 0V
VIN < UVLO Threshold
Undervoltage Lockout Threshold
VIN Falling
VIN Rising
Shutdown Threshold (at ITH/RUN)
Start-Up Current Source
VITH/RUN = 0V
Regulated Feedback Voltage
0°C to 70°C(Note 5)
– 40°C to 85°C(Note 5)
VFB Input Current
(Note 5)
MIN
TYP
MAX
UNITS
270
230
8
6
420
370
22
10
µA
µA
µA
µA
●
1.55
1.85
2.00
2.10
2.35
2.40
V
V
●
0.15
0.35
0.55
V
0.25
0.5
0.85
µA
●
●
0.780
0.770
0.800
0.800
0.820
0.830
V
V
10
50
nA
550
650
kHz
Oscillator Frequency
VFB = 0.8V
Gate Drive Rise Time
CLOAD = 3000pF
40
ns
Gate Drive Fall Time
CLOAD = 3000pF
40
ns
Peak Current Sense Voltage
(Note 6)
120
mV
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1872BE is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • θJA°C/W)
2
500
114
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: The LTC1872B is tested in a feedback loop that servos VFB to the
output of the error amplifier.
Note 6: Guaranteed by design at duty cycle = 30%. Peak current sense
voltage is VREF/6.67 at duty cycle <40%, and decreases as duty cycle
increases due to slope compensation as shown in Figure 3.
LTC1872B
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TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage
vs Temperature
10
VIN = 4.2V
VFB VOLTAGE (mV)
815
810
805
800
795
790
785
2.24
VIN = 4.2V
8
2.20
6
4
2
0
–2
–4
–6
780
5 25 45 65 85 105 125
TEMPERATURE (°C)
5 25 45 65 85 105 125
TEMPERATURE (°C)
2.04
2.00
1.96
1.84
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1872B G02
Maximum Current Sense Trip
Voltage vs Duty Cycle
1872B G03
Shutdown Threshold
vs Temperature
600
VIN = 4.2V
TA = 25°C
120
2.08
1.88
–10
–55 –35 –15
1872B G01
130
2.12
1.92
–8
775
–55 –35 –15
VIN FALLING
2.16
UVLO TRIP VOLTAGE (V)
820
NORMALIZED FREQUENCY (%)
825
Undervoltage Lockout Trip
Voltage vs Temperature
Normalized Oscillator Frequency
vs Temperature
560
VIN = 4.2V
ITH/RUN VOLTAGE (mV)
VIN – VSENSE – (mV)
520
110
100
90
80
70
480
440
400
360
320
280
60
240
50
20
30
40
50 60 70 80
DUTY CYCLE (%)
90
100
187B2 G04
200
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1872B G05
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PIN FUNCTIONS
ITH/RUN (Pin 1): This pin performs two functions. It
serves as the error amplifier compensation point as well as
the run control input. Nominal voltage range for this pin is
0.7V to 1.9V. Forcing this pin below 0.35V causes the
device to be shut down. In shutdown all functions are
disabled and the NGATE pin is held low.
GND (Pin 2): Ground Pin.
SENSE – (Pin 4): The Negative Input to the Current Comparator.
VIN (Pin 5): Supply Pin. Must be closely decoupled to GND
Pin 2.
NGATE (Pin 6): Gate Drive for the External N-Channel
MOSFET. This pin swings from 0V to VIN.
VFB (Pin 3): Receives the feedback voltage from an external resistive divider across the output.
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LTC1872B
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FUNCTIONAL DIAGRA
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VIN
SENSE –
5
4
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15mV
+
ICMP
–
VIN
RS
SLOPE
COMP
OSC
NGATE
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
R
Q
S
6
–
FREQ
FOLDBACK
OVP
0.3V
+
EAMP
+
–
VREF
+
60mV
+
VREF
0.8V
0.5µA
VFB
+
–
1 ITH/RUN
3
VIN
VIN
–
0.35V
VOLTAGE
REFERENCE
+
SHDN
CMP
VREF
0.8V
–
GND
SHDN
UV
2
UNDERVOLTAGE
LOCKOUT
1.2V
1872B FD
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OPERATIO
(Refer to Functional Diagram)
Main Control Loop
The LTC1872B is a constant frequency current mode
switching regulator. During normal operation, the external
N-channel power MOSFET is turned on each cycle by the
oscillator and turned off when the current comparator
(ICMP) resets the RS latch. The peak inductor current at
which ICMP resets the RS latch is controlled by the voltage
on the ITH/RUN pin, which is the output of the error
amplifier EAMP. An external resistive divider connected
between VOUT and ground allows the EAMP to receive an
output feedback voltage VFB. When the load current increases, it causes a slight decrease in VFB relative to the
0.8V reference, which in turn causes the
ITH/RUN voltage to increase until the average inductor
current matches the new load current.
The main control loop is shut down by pulling the ITH/RUN
pin low. Releasing ITH/RUN allows an internal 0.5µA
current source to charge up the external compensation
network. When the ITH/RUN pin reaches 0.35V, the main
control loop is enabled with the ITH/RUN voltage then
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pulled up to its zero current level of approximately 0.7V.
As the external compensation network continues to charge
up, the corresponding output current trip level follows,
allowing normal operation.
Comparator OVP guards against transient overshoots
> 7.5% by turning off the external N-channel power
MOSFET and keeping it off until the fault is removed.
Low Load Current Operation
Under very light load current conditions, the ITH/RUN pin
voltage will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current)
and the regulator will start to skip cycles, as it must, in
order to maintain regulation. This behavior allows the
regulator to maintain constant frequency down to very
light loads, resulting in less low frequency noise generation over a wide load current range.
LTC1872B
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OPERATIO
(Refer to Functional Diagram)
Figure 2 illustrates this result for the circuit of Figure 1
using both an LTC1872 in Burst Mode operation and an
LTC1872B (non-Burst Mode operation). At an output
current of 50mA, the Burst Mode operation part exhibits
an output ripple of approximately 80mVP-P, whereas the
non-Burst Mode operation part has an output ripple of
≈45mVP-P. At lower output current levels, the improvement is even greater. This comes at a trade off of slightly
lower efficiency for the non-Burst Mode operation part.
Also notice the constant frequency operation of the
LTC1872B, even at 5% of maximum output current.
Slope Compensation and Inductor’s Peak Current
The inductor’s peak current is determined by:
IPK =
VITH − 0.7
10(RSENSE )
when the LTC1872B is operating below 40% duty cycle.
However, once the duty cycle exceeds 40%, slope compensation begins and effectively reduces the peak inductor current. The amount of reduction is given by the curves
in Figure 3.
110
Undervoltage Lockout
100
To prevent operation of the N-channel MOSFET below safe
input voltage levels, an undervoltage lockout is incorporated into the LTC1872B. When the input supply voltage
drops below approximately 2.0V, the N-channel MOSFET
and all circuitry is turned off except the undervoltage
block, which draws only several microamperes.
SF = IOUT/IOUT(MAX) (%)
90
80
70
60
50
IRIPPLE = 0.4IPK
AT 5% DUTY CYCLE
IRIPPLE = 0.2IPK
AT 5% DUTY CYCLE
40
30
Overvoltage Protection
20
VIN = 4.2V
10
The overvoltage comparator in the LTC1872B will turn the
external MOSFET off when the feedback voltage has risen
7.5% above the reference voltage of 0.8V. This comparator has a typical hysteresis of 20mV.
20mV AC/DIV
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
1872B F03
Figure 3. Maximum Output Current vs Duty Cycle
20mV AC/DIV
VIN = 3.3V
VOUT = 5V
IOUT = 50mA
5µs/DIV
1872B F02a
(2a) VOUT Ripple for Figure 1 Circuit
Using LTC1872 Burst Mode Operation
VIN = 3.3V
VOUT = 5V
IOUT = 50mA
5µs/DIV
1872B F02b
(2b) VOUT Ripple for Figure 1 Circuit Using
LTC1872B Non-Burst Mode Operation
Figure 2. Output Ripple Waveforms for the Circuit of Figure 1
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LTC1872B
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OPERATIO
(Refer to Functional Diagram)
Short-Circuit Protection
Since the power switch in a boost converter is not in series
with the power path from input to load, turning off the
switch provides no protection from a short-circuit at the
output. External means such as a fuse in series with the
boost inductor must be employed to handle this fault
condition.
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APPLICATIONS INFORMATION
The basic LTC1872B application circuit is shown in
Figure␣ 1. External component selection is driven by the
load requirement and begins with the selection of L1 and
RSENSE (= R1). Next, the power MOSFET and the output
diode D1 is selected followed by CIN(= C1) and COUT(= C2).
RSENSE Selection for Output Current
RSENSE is chosen based on the required output current.
With the current comparator monitoring the voltage developed across RSENSE, the threshold of the comparator
determines the inductor’s peak current. The output current the LTC1872B can provide is given by:
 0.12

I
VIN
IOUT = 
− RIPPLE 
 RSENSE
2  VOUT + VD
where IRIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation section) and VD is the
forward drop of the output diode at the full rated output
current.
A reasonable starting point for setting ripple current is:
IRIPPLE = (O.4)(IOUT )
VOUT + VD
VIN
Rearranging the above equation, it becomes:
RSENSE =


1
VIN

(10)( IOUT)  VOUT + VD 
for Duty Cycle < 40%
However, for operation that is above 40% duty cycle, slope
compensation’s effect has to be taken into consideration
to select the appropriate value to provide the required
amount of current. Using the scaling factor (SF, in %) in
Figure 3, the value of RSENSE is:
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RSENSE =


VIN

(10)(IOUT )(100)  VOUT + VD 
SF
Inductor Value Calculation
The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use
of a smaller inductor for the same amount of inductor
ripple current. However, this is at the expense of efficiency
due to an increase in MOSFET gate charge losses.
The inductance value also has a direct effect on ripple
current. The ripple current, IRIPPLE, decreases with higher
inductance or frequency and increases with higher VOUT.
The inductor’s peak-to-peak ripple current is given by:
IRIPPLE =
VIN  VOUT + VD − VIN 


f (L)  VOUT + VD 
where f is the operating frequency. Accepting larger values
of IRIPPLE allows the use of low inductances, but results in
higher output voltage ripple and greater core losses. A
reasonable starting point for setting ripple current is:
(
)
V
+ VD 
IRIPPLE = 0.4 IOUT (MAX)  OUT



VIN
In Burst Mode operation, the ripple current is normally set
such that the inductor current is continuous during the
burst periods. Therefore, the peak-to-peak ripple current
must not exceed:
IRIPPLE ≤
0.03
RSENSE
LTC1872B
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APPLICATIONS INFORMATION
This implies a minimum inductance of:
 VOUT + VD − VIN 
VIN
LMIN =


 0.03   VOUT + VD 
f

 RSENSE 
A smaller value than L MIN could be used in the circuit;
however, the inductor current will not be continuous
during burst periods.
Inductor Selection
When selecting the inductor, keep in mind that inductor
saturation current has to be greater than the current limit
set by the current sense resistor. Also, keep in mind that
the DC resistance of the inductor will affect the efficiency.
Off the shelf inductors are available from Murata, Coilcraft,
Toko, Panasonic, Coiltronics and many other suppliers.
Power MOSFET Selection
The main selection criteria for the power MOSFET are the
threshold voltage VGS(TH), the “on” resistance RDS(ON),
reverse transfer capacitance CRSS and total gate charge.
Since the LTC1872B is designed for operation down to low
input voltages, a logic level threshold MOSFET (RDS(ON)
guaranteed at VGS = 2.5V) is required for applications that
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC1872B is less
than the absolute maximum VGS rating, typically 8V.
The required minimum RDS(ON) of the MOSFET is governed by its allowable power dissipation given by:
R DS(ON) ≅
PP
(DC )IIN2(1+ δp)
where PP is the allowable power dissipation and δp is the
temperature dependency of RDS(ON). (1 + δp) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but δp = 0.005/°C can be used as an
approximation for low voltage MOSFETs. DC is the maximum operating duty cycle of the LTC1872B.
Output Diode Selection
Under normal load conditions, the average current conducted by the diode in a boost converter is equal to the
output load current:
ID(avg) = IOUT
It is important to adequately specify the diode peak current
and average power dissipation so as not to exceed the
diode ratings.
Schottky diodes are recommended for low forward drop
and fast switching times. Remember to keep lead length
short and observe proper grounding (see Board Layout
Checklist) to avoid ringing and increased dissipation.
CIN and COUT Selection
To prevent large input voltage ripple, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current for a boost
converter is approximately equal to:
CIN Required IRMS ≈ (0.3)IRIPPLE
where IRIPPLE is as defined in the Inductor Value Calculation section.
Note that capacitor manufacturer’s ripple current ratings
are often based on 2000 hours of life. This makes it
advisable to further derate the capacitor, or to choose a
capacitor rated at a higher temperature than required.
Several capacitors may be paralleled to meet the size or
height requirements in the design. Due to the high operating frequency of the LTC1872B, ceramic capacitors can
also be used for CIN. Always consult the manufacturer if
there is any question.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:
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LTC1872B
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APPLICATIONS INFORMATION
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2 2



1
 ESR2 +




 2π fC OUT  


where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the inductor.
Manufacturers such as Nichicon, United Chemicon and
Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR (size)
product of any aluminum electrolytic at a somewhat
higher price. The output capacitor RMS current is approximately equal to:
IPK • DC − DC 2
where IPK is the peak inductor current and DC is the switch
duty cycle.
When using electrolytic output capacitors, if the ripple and
ESR requirements are met, there is likely to be far more
capacitance than required.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in
surface mount configurations. An excellent choice of
tantalum capacitors is the AVX TPS and KEMET T510
series of surface mount tantalum capacitors. Also,
ceramic capacitors in X5R pr X7R dielectrics offer excellent performance.
amount of change as the supply is reduced down to 2V.
Also shown in Figure 4 is the effect of VIN on VREF as VIN
goes below 2.3V.
Setting Output Voltage
The LTC1872B develops a 0.8V reference voltage between
the feedback (Pin 3) terminal and ground (see Figure 5). By
selecting resistor R1, a constant current is caused to flow
through R1 and R2 to set the overall output voltage. The
regulated output voltage is determined by:
 R2 
VOUT = 0.8V 1 + 
 R1 
For most applications, an 80k resistor is suggested for R1.
To prevent stray pickup, locate resistors R1 and R2 close
to LTC1872B.
105
NORMALIZED VOLTAGE (%)
∆VOUT

V
+ VD IRIPPLE 
≈  IO • OUT
+
•

VIN
2 
VREF
100
VITH
95
90
85
80
75
2.0
2.2
3.0
2.4
2.6
2.8
INPUT VOLTAGE (V)
1872B F04
Figure 4. Line Regulation of VREF and VITH
VOUT
LTC1872B
3
VFB
R2
R1
Low Supply Operation
Although the LTC1872B can function down to approximately 2.0V, the maximum allowable output current is
reduced when VIN decreases below 3V. Figure 4 shows the
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1872B F05
Figure 5. Setting Output Voltage
LTC1872B
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APPLICATIONS INFORMATION
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (η1 + η2 + η3 + ...)
where η1, η2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1872B circuits: 1) LTC1872B DC bias current, 2) MOSFET gate charge current, 3) I2R losses and 4)
voltage drop of the output diode.
1. The VIN current is the DC supply current, given in the
electrical characteristics, that excludes MOSFET driver
and control currents. VIN current results in a small loss
which increases with VIN.
2. MOSFET gate charge current results from switching
the gate capacitance of the power MOSFET. Each time
a MOSFET gate is switched from low to high to low
again, a packet of charge, dQ, moves from VIN to
ground. The resulting dQ/dt is a current out of VIN
which is typically much larger than the contoller’s DC
supply current. In continuous mode, IGATECHG = f(Qp).
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense resistor. The
MOSFET RDS(ON) multiplied by duty cycle times the
average output current squared can be summed with
I2R losses in the inductor ESR in series with the current
sense resistor.
4. The output diode is a major source of power loss at
high currents. The diode loss is calculated by multiplying the forward voltage by the load current.
5. Transition losses apply to the external MOSFET and
increase at higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2(VIN)2IIN(MAX)CRSS(f)
Other losses, including CIN and COUT ESR dissipative
losses, and inductor core losses, generally account for
less than 2% total additional loss.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1872B. These items are illustrated graphically in the
layout diagram in Figure 6. Check the following in your
layout:
1. The Schottky diode should be closely connected
between the output capacitor and the drain of the
external MOSFET.
2. The (+) plate of CIN should connect to the sense
resistor as closely as possible. This capacitor provides
AC current to the inductor.
3. The input decoupling capacitor (0.1µF) should be
connected closely between VIN (Pin 5) and ground
(Pin 2).
4. Connect the end of RSENSE as close to VIN (Pin 5) as
possible. The VIN pin is the SENSE + of the current
comparator.
5. The trace from SENSE – (Pin 4) to the Sense resistor
should be kept short. The trace should connect close
to RSENSE.
6. Keep the switching node NGATE away from sensitive
small signal nodes.
7. The VFB pin should connect directly to the feedback
resistors. The resistive divider R1 and R2 must be
connected between the (+) plate of COUT and signal
ground.
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LTC1872B
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APPLICATIONS INFORMATION
1
ITH/RUN NGATE
VIN
6
LTC1872B
2
RITH
VIN
VFB
4
SENSE –
0.1µF
3
CITH
+
M1
L1
RS
5
GND
CIN
D1
VOUT
+
R2
COUT
R1
BOLD LINES INDICATE HIGH CURRENT PATHS
1872B F06
Figure 6. LTC1872B Layout Diagram (See PC Board Layout Checklist)
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TYPICAL APPLICATIO S
LTC1872B 3-Cell White LED Driver
VIN = 3 AA CELLS ≈ 2.7V TO 4.8V
C1
10µF
10V
R1
0.27Ω
AA
AA
1
10k
220pF
ITH/RUN
VIN
5
LTC1872B
2
3
GND
VFB
SENSE
–
NGATE
L1
150µH
VOUT ≈ 28.8V
(WITH 8 LEDs)
4
6
M1
AA
D0
+
C2
15µF
35V
C3
0.1µF
CERAMIC
15mA
D1
D2
1 TO 8
WHITE
LEDs
•
•
•
D8
C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT
C2: AVX TPSD156M035R0300
D0: MOTOROLA MBR0540
D1-D7: CMD333UWC
10
L1: COILCRAFT DO1608C-154
M1: Si9804
R1: DALE 0.25W
53.6Ω
1872B TA04
LTC1872B
U
TYPICAL APPLICATIO S
LTC1872B 12V/500mA Boost Converter
C1
10µF
10V
R1
0.033Ω
1
ITH/RUN
5
VIN
L1
10µH
LTC1872B
10k
2
3
220pF
GND
VFB
4
SENSE –
6
NGATE
VIN
3V TO 9.8V
M1
D1
+
C2
47µF
16V
VOUT
12V
1.1M
1872B TA02
78.7k
C1: TAIYO YUDEN CERAMIC EMK325BJ106MNT
C2: AVX TPSE476M016R0150
D1: IR10BQ015
L1: COILTRONICS UP2B-100
M1: Si9804DV
R1: DALE 0.25W
U
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1634)
(Reference LTC DWG # 05-08-1636)
2.80 – 3.10
(.110 – .118)
(NOTE 3)
SOT-23
(Original)
SOT-23
(ThinSOT)
A
.90 – 1.45
(.035 – .057)
1.00 MAX
(.039 MAX)
A1
.00 – 0.15
(.00 – .006)
.01 – .10
(.0004 – .004)
A2
.90 – 1.30
(.035 – .051)
.80 – .90
(.031 – .035)
L
.35 – .55
(.014 – .021)
.30 – .50 REF
(.012 – .019 REF)
2.60 – 3.00
(.102 – .118)
1.50 – 1.75
(.059 – .069)
(NOTE 3)
PIN ONE ID
.95
(.037)
REF
.25 – .50
(.010 – .020)
(6PLCS, NOTE 2)
.20
(.008)
A
DATUM ‘A’
L
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
.09 – .20
(.004 – .008)
(NOTE 2)
A2
1.90
(.074)
REF
A1
S6 SOT-23 0401
3. DRAWING NOT TO SCALE
4. DIMENSIONS ARE INCLUSIVE OF PLATING
5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
6. MOLD FLASH SHALL NOT EXCEED .254mm
7. PACKAGE EIAJ REFERENCE IS:
SC-74A (EIAJ) FOR ORIGINAL
JEDEL MO-193 FOR THIN
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1872B
U
TYPICAL APPLICATIO S
LTC1872B – 2.5V to 3.3V/0.5A Boost Converter
R1
0.034Ω
2
3
220pF
+
L1
4.7µH
C2
2× 100µF
10V
LTC1872B
10k
0.1µF
CERAMIC
VIN
ITH/RUN
5
+
1
GND
VFB
SENSE –
NGATE
VOUT
3.3V
0.5A
4
6
M1 D1
C1
100µF
10V
332k
U1
80.6k
VIN
–2.5V
180k
1872B TA03
C1, C2: AVX TPSE107M010R0100
D1: MOTOROLA MBR2045CT
L1: COILTRONICS UP2B-4R7
M1: Si9804DV
R1: DALE 0.25W
U1: PANASONIC 2SB709A
LTC1872B 2.7V to 9.8V Input to 3.3V/1.2A Output SEPIC Converter
CC1
220pF RC1
10k 1
ITH/RUN
VIN
5
L1A
LTC1872B
2
3
VIN
2.7V TO 9.8V
CIN
10µF
10V, X5R
RCS
0.03Ω
GND
SENSE –
VFB
NGATE
D1
MBRM120
L1B
4
CO1
180µF
4V, SP
VOUT
3.3V/1.2A
CS
4.7µF
10V
6
Rf2
80.6k
Rf1
252k
+
M1
1872B TA05
CIN, CS; TOKO, MURATA OR TAIYO YUDEN
CO1: PANASONIC EEFUE0G181R
L1: BH ELECTRONICS 511-1012
M1: IRLMS2002
RCS: DALE OR IRC
FOR VOUT = 5V CHANGE
Rf1 TO 427kΩ AND
CO1 TO 150µF, 6V PANASONIC
SP TYPE CAPACITOR
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DESCRIPTION
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Load Current
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12
Linear Technology Corporation
10-Lead MSOP Package, 0.5V ≤ VIN ≤ 5V
1872bf LT/TP 0601 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 2001