MAXIM MAX5963UTL+

19-4344; Rev 0; 10/08
KIT
ATION
EVALU
E
L
B
AVAILA
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
The MAX5963 dual hot-swap and diode ORing controller provides complete protection for dual-supply high
availability systems. The device operates from 7.5V to
76V and provides hot-swap and low voltage-drop diode
ORing functionality for two 7.5V to 76V outputs.
The MAX5963 allows for the safe insertion and removal
of system line cards and FireWire® peripherals into a
live backplane by providing inrush current control and
active current limiting. The device controls external
n-channel power MOSFETs to perform low-voltage-drop
ORing, inrush current control, and current limiting functions. The current-limit function actively limits the current drawn by the load, protecting the load from a
short-circuit condition. The MAX5963 also features a
circuit-breaker function that disconnects the power to
the load if the load current exceeds the circuit-breaker
limit for a programmable circuit-breaker timeout.
The MAX5963 features an autoretry/latchoff input. In
autoretry mode, the MAX5963 automatically restarts the
turned-off channel after a programmable delay. In
latchoff mode, the MAX5963 latches the channel off.
The MAX5963 consumes less than 10µA from the PWR
supply in system power-off mode.
The MAX5963 is available in a 40-pin TQFN package
(6mm x 6mm) and operates over the 0°C to +85°C
upper commercial temperature range.
Features
o Hot Swaps Two 7.5V to 76V Supplies
o Integrates Low-Voltage-Drop ORing Controller
o ±5% Accuracy Bilevel Active Current Limit/Circuit
Breaker
o Programmable Current-Limit/Circuit-Breaker
Timeout
o 10µA Power-Off Mode Current
o Protects Up to Two FireWire Ports
o System Power-On/Off ORing
o Latchoff or Autoretry Power Management
o Independent ON/OFF Control Allows
Undervoltage Lockout Programming
o Fast Load Disconnect through FOSO Input
(FireWire Port)
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX5963UTL+
0°C to +85°C
40 TQFN-EP*
+Denotes a lead-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration
N.C.
GATE1B
OUTB
GATE2B
FAULTB
N.C.
FAULTA
GND
RETRY
TOP VIEW
N.C.
Applications
Blade Servers
Base-Station Line Cards
Network Switches/Routers
FireWire Desktops/Notebook Ports
FireWire Hubs
30 29 28 27 26 25 24 23 22 21
TCL 31
20 SENSEB
TCB 32
19 OR
ONB 33
18 CL
ONA 34
17 CB
16 N.C.
FOSO 35
MAX5963
ENZ 36
15 PS
14 N.C.
ENY 37
Typical Operating Circuit appears at end of data sheet.
ENX 38
13 BP
*EP
+
N.C. 39
12 SENSEA
11 N.C.
FireWire is a registered trademark of Apple, Inc.
6
7
8
9
10
OUTA
GATE1A
N.C.
GATEOR
5
GATE2A
N.C.
4
N.C.
3
N.C.
2
GATEPS
1
PWR
N.C. 40
THIN QFN
(6mm x 6mm)
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX5963
General Description
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
ABSOLUTE MAXIMUM RATINGS
PWR, PS to GND ....................................................-0.3V to +85V
OUTA, OUTB, BP, RETRY to GND .........................-0.3V to +85V
BP to PS .................................................................-0.3V to +85V
BP to PWR ...............................................................-85V to +85V
OUTA, OUTB to PS..................................................-40V to +85V
SENSEA, SENSEB to PS...........................................-1V to +0.3V
SENSEA, SENSEB, CL, CB, OR to GND ................-0.3V to +85V
SENSEA, SENSEB to CL, CB, OR ...............................-5V to +5V
CL, CB, OR to PS .....................................................-1V to +0.3V
GATE1A, GATE2A, GATE1B, GATE2B,
GATEPS, GATEOR to GND .................................-0.3V to +85V
GATE1A, GATE2A to OUTA .....................................-0.3V to +8V
GATE1B, GATE2B to OUTB .....................................-0.3V to +8V
GATEPS to PS ..........................................................-0.3V to +8V
GATEOR to PWR ......................................................-0.3V to +8V
FAULTA, FAULTB to GND......................................-0.3V to +85V
ONA, ONB, FOSO, TCL,
TCB to GND...........-0.3V to the lesser of +85V or (VBP + 0.3V)
TCL, TCB to GND........................................-0.3V to (VPS + 0.3V)
ENX, ENY, ENZ to GND..........................................-0.3V to +85V
Continuous Power Dissipation
40-Pin TQFN (derate 37mW/°C above +70°C) ...........2963mW
Thermal Resistance (Note 1)
θJA .................................................................................28°C/W
θJC ...................................................................................1°C/W
Operating Temperature Range...............................0°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VPS = VPWR = 12V, VFOSO = 0, VENX = VENY = VENZ = VPWR, and TA = TJ = 0°C to +85°C, unless otherwise noted. See the Typical
Operating Circuit for connections. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
PS Voltage Range
VPS
PS Supply Current
IPS
PWR Voltage Range
PWR Supply Current
PWR Shutdown Current
PWR Standby Current
PS Undervoltage Lockout
Threshold
CONDITIONS
IPWR_SHDN
IPWR_SB
VPS_UVLO
MAX
UNITS
76
V
7
mA
76
V
400
600
µA
7.5V ≤ VPWR ≤ 12V, VENX = VENY = VENZ
= 0.4V, PS is open
5
10
12V ≤ VPWR ≤ 76V, VENX = VENY = VENZ
= 0.4V, PS is open
12
24
7.5V ≤ VPWR ≤ 76V, VPS = VPWR,
VENX = VENY = VENZ = 0.4V
50
75
µA
6.5
7.0
V
7.5V ≤ VPWR ≤ 76V, VPS = VPWR,
VONA = VONB = 3V, no load
4.5
7.5
7.5V ≤ VPWR ≤ 76V, VPS = VPWR,
VONA = VONB = 3V, no load
PS rising, VENX = VENY = VENZ = 0,
VONA = VONB = VBP
µA
6.0
PS Undervoltage Lockout
Hysteresis
PWR Undervoltage Lockout
Threshold
PWR Undervoltage Lockout
Hysteresis
2
TYP
7.5
VPWR
IPWR
MIN
0.35
VPWR_UVLO
VPWR rising, PS = GND, VONA = VONB = VBP
6.0
6.5
0.35
_______________________________________________________________________________________
V
7.0
V
V
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
(VPS = VPWR = 12V, VFOSO = 0, VENX = VENY = VENZ = VPWR, and TA = TJ = 0°C to +85°C, unless otherwise noted. See the Typical
Operating Circuit for connections. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
1.150
1.240
1.350
UNITS
LOGIC INPUTS
ON_ Threshold
VONTH
ON_ Hysteresis
VONTH_HYS
ON_ Input Bias Current
ION
EN_ Input Logic-Low Voltage
Threshold
VEN_L
EN_ Input Logic-High Voltage
Threshold
VEN_H
VON_ rising
70
VON_ = 76V
IEN_
VEN_ = 76V, VFOSO = 0
RETRY Pulldown Current
IRTRY
VRETRY = 0.7V
RETRY Input Logic-Low Voltage
Threshold
VRTRYL
RETRY Input Logic-High
Voltage Threshold
VRTRYH
FOSO Threshold
VFOSO_TH
FOSO Input Leakage Current
0.7
V
V
1
µA
0.7
1.8
VONA or VONB = 3V
1.150
µA
V
V
1.240
1.350
70
V
mV
VENZ = 0, VFOSO = VPWR = 76V
1
µA
ITCL, ITCB
VENZ = 0, VPS = 76V, VTCL = VTCB = 76V
4
µA
FAULT_ Output Low Voltage
VOL
Low-impedance state, IFAULTA = IFAULTB
= 5mA
0.275
V
FAULT_ Output High Leakage
Current
IOH
High-impedance state, VFAULTA = VFAULTB
= 76V
1
µA
100
µA
4
µA
103.2
µA
+2.5
mV
103.2
µA
+2.5
mV
TCL, TCB Input Bias Current in
Shutdown
OUT_ Input Current
IFOSOL
µA
20
VONA or VONB = 3V
FOSO Hysteresis
1
1.8
EN_ Input Bias Current
V
mV
IOUT_
SENSE_ Input Current
ISENSE_
0.12
VENZ = 0, VPS = 76V, VOUTA = VOUTB
= 76.1V
15
VENZ = 0, VPS = VOR = VCL = VCB = 76V,
VSENSEA = VSENSEB = 76V
1
50
CIRCUIT-BREAKER, CURRENT-LIMIT, AND ORING THRESHOLDS
Circuit-Breaker Set Current
ICBSET
Circuit-Breaker Comparator
Offset Voltage
Current-Limit Set Current
ICLSET
Current-Limit Comparator Offset
Voltage
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
97.0
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
-2.5
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
97.0
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
-2.5
100.0
100.0
ORing Threshold Set Current
IORSET
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
96.5
100
103.5
µA
ORing Threshold Set Current
Hysteresis
IORHYS
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
47.5
50
52.5
µA
_______________________________________________________________________________________
3
MAX5963
ELECTRICAL CHARACTERISTICS (continued)
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
ELECTRICAL CHARACTERISTICS (continued)
(VPS = VPWR = 12V, VFOSO = 0, VENX = VENY = VENZ = VPWR, and TA = TJ = 0°C to +85°C, unless otherwise noted. See the Typical
Operating Circuit for connections. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
-0.4
0
+0.4
mV
ORing Threshold Comparator
Offset Voltage
7.5V ≤ VPWR ≤ 76V, VPS = VPWR (Note 3)
ORing Threshold Comparator
Total Offset Voltage Supply Drift
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
100
µV
ORing Threshold Comparator
Total Offset Temperature Drift
0°C ≤ TA ≤ +85°C, VPS = VPWR
40
µV
7.5V ≤ VPWR ≤ 76V, VPS = VPWR
VCL +
57
mV
Fast Pulldown Current-Limit
Threshold Voltage
VTHF
TIMING
Circuit-Breaker Timeout
tCB
Circuit-Breaker Default Timeout
RTCB = 4kΩ (Note 4)
0.85
1.02
1.23
ms
VTCB = VBP
2.2
3.0
3.8
ms
Circuit-Breaker Timeout CountDown/Count-Up Ratio
Current-Limit Timeout
1
tCL
Current-Limit Default Timeout
RTCL = 4kΩ (Note 4)
0.85
1.02
1.23
ms
VTCL = VBP
0.85
1.02
1.23
ms
Current-Limit Timeout CountDown/Count-Up Ratio
128
Automatic Restart Delay after
Current-Limit Timeout
tOFFCL
tCL x
128
ms
Automatic Restart Delay after
Circuit-Breaker Timeout
tOFFCB
tCB x
128
ms
Channel A/Channel B FOSO
Turn-On Delay
tFOSOF
ON_ Turn-On Response Time
(Time from ON_ Pulled High to
GATE_ Pulled High)
tON_
ON_ Turn-Off Response Time
(Time from ON_ Pulled Low to
GATE_ Pulled Low)
tON_OFF
FOSO Turn-Off Response Time
(Time from FOSO Rising Edge
to GATE_ Pulled Low)
tFOSO_OFF
Minimum Delay from ENZ Low
to Low-Current Shutdown Mode
tSHDN
4
VONA = VONB = 3V, FOSO falling
VON_ < VONTH_HYST, (VGATE_ - VOUT_)
< 1V, GATE_A and GATE_B are open
(VGATE_A - VOUTA) < 1V, (VGATE_B - VOUTB)
< 1V, GATE_A and GATE_B are open
ENZ steps from 1.3V to 0.4V
0.4
1.0
1.5
s
2
ms
10
µs
0.34
50
_______________________________________________________________________________________
0.60
µs
µs
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
(VPS = VPWR = 12V, VFOSO = 0, VENX = VENY = VENZ = VPWR, and TA = TJ = 0°C to +85°C, unless otherwise noted. See the Typical
Operating Circuit for connections. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
35
48
60
µA
4.00
4.75
6.00
GATE CONTROLS
GATE_ Pullup Current
GATE_ High Voltage
GATE_ Pulldown Current
IGU_
VGATE1A,
VGATE2A,
VGATE1B,
VGATE2B,
VGATEPS,
VGATEOR
VGATE1A - VOUTA,
VGATE2A - VOUTA,
VGATE1B - VOUTB,
VGATE2B - VOUTB,
VGATEPS - VPS,
VGATEOR - VPWR
VPWR = VPS ,
7.5V ≤ VPWR ≤ 8V,
VOUTA = VOUTB = VPS
V
VPWR = VPS ,
8V ≤ VPWR ≤ 76V,
VOUTA = VOUTB = VPS
IGDA1,
IGDA2,
VCL < (VPS - VSENSE_) < VTHF
IGDB1, IGDB2
GATE_ Fast Pulldown Current
IGDFA1,
IGDFA2,
IGDFB1,
IGDFB2
(VPS - VSENSE_) > VTHF,
VGATE_ = (VOUT_ + 4.5V)
GATE_ Peak Pulldown Current
IGDPA1,
IGDPA2,
IGDPB1,
IGDPB2
(VPS - VSENSE_) = 1V
GATE_ Pulldown Current During
Any GATE_ Turn-Off Condition
IGOFFA1,
IGOFFA2,
IGOFFB1,
IGOFFB2
GATEPS Pulldown Current
IGDPS
GATEOR Turn-Off Switch
On-Resistance
RGATEOR
4.50
5.50
6.50
350
500
650
µA
40
125
190
mA
1.0
VGATE_ = (VOUT_ + 4.5V), VPS > VPS_UVLO
40
VGATE_ = (VOUT_ + 4.5V), VPS = 6V
30
VENZ = 0, VGATEPS - VPS = 4.5V
45
125
A
200
mA
Measured between GATEOR and VPWR,
(VSENSEA + VSENSEB)/2 > VOR,
VGATEOR - VPWR = 2V
150
125
200
mA
2
3
Ω
Note 2: All min/max parameters are tested at TA = +25°C and TA = +85°C. Limits through the temperature range are guaranteed by
design.
Note 3: This is the offset value immediately after initialization. The MAX5963 minimizes offset at startup according to the temperature
at that time. After initialization the temperature offset voltage drift and supply voltage drift apply.
Note 4: Connect TCL/TCB to BP or PS for the default timeout period or connect a resistor from TCL/TCB to GND to program the current-limit timeout.
_______________________________________________________________________________________
5
MAX5963
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VPS = VPWR = 12V, VGND = VFOSO = 0. TA = +25°C, unless otherwise noted.)
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
6.0
5.5
TA = +25°C
5.0
TA = 0°C
4.5
TA = +85°C
50.02
10.5
9.0
7.5
TA = +25°C
6.0
MAX5963 toc03
50.04
CL/CB THRESHOLD (mV)
TA = +85°C
12.0
PWR SHUTDOWN CURRENT (µA)
SUPPLY CURRENT (mA)
6.5
MAX5963 toc01
7.0
CURRENT-LIMIT/CIRCUIT-BREAKER
THRESHOLD vs. TEMPERATURE
MAX5963 toc02
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
TA = 0°C
VPS = 37V
50.00
49.98
VPS = 12V
49.96
VPS = 7.5V
49.94
49.92
4.5
49.90
3.0
49.88
RCL = RCB = 500Ω
4.0
15
25
35
45
55
65
85
75
0
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80
34
51
68
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
CURRENT-LIMIT/CIRCUIT-BREAKER
TIMEOUT vs. TEMPERATURE
ORING THRESHOLD
vs. TEMPERATURE
GATE CURRENTS
vs. TEMPERATURE
1.090
1.088
1.086
1.084
1.082
4.95
52.0
4.94
4.93
4.92
4.91
68
17
34
51
85
68
GATE2B
0
17
TEMPERATURE (°C)
5.97
5.96
5.95
GATE2A
5.94
GATE1A
5.92
6.15
6.10
GATE_B DRIVE VOLTAGE (V)
5.98
51
68
GATE1B AND GATE2B DRIVE VOLTAGE
vs. TEMPERATURE
XMAX5963 toc07
5.99
34
TEMPERATURE (°C)
GATE1A AND GATE2A DRIVE VOLTAGE
vs. TEMPERATURE
GATE_A DRIVE VOLTAGE (V)
50.5
49.5
0
85
TEMPERATURE (°C)
5.93
GATE2A
XMAX5963 toc08
51
51.0
50.0
4.90
1.080
34
GATE1B
ROR = 49.6Ω
RTCB = RTCL = 4kΩ
17
GATE1A
51.5
6.05
GATE2B
6.00
5.95
5.90
GATE1B
5.91
5.85
5.90
5.89
5.80
0
17
34
51
TEMPERATURE (°C)
6
85
MAX5963 toc06
52.5
GATE CURRENT (µA)
1.092
4.96
XMAX5963 toc05
MAX5963 toc04
1.094
0
17
SUPPLY VOLTAGE (V)
ORING THRESHOLD VOLTAGE (mV)
5
CL/CB TIMEOUT (ms)
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
68
85
0
17
34
51
TEMPERATURE (°C)
_______________________________________________________________________________________
68
85
85
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
ON_ HIGH VOLTAGE
vs. TEMPERATURE
ON_ LOW VOLTAGE
vs. TEMPERATURE
1.240
1.239
1.238
1.237
MAX5963 toc10
1.174
ON_ LOW VOLTAGE (V)
ON_ HIGH VOLTAGE (V)
1.241
1.173
1.172
1.171
1.170
1.169
1.236
1.168
0
17
34
51
68
85
0
17
34
51
68
TEMPERATURE (°C)
TEMPERATURE (°C)
FAULT_ LOW VOLTAGE
vs. TEMPERATURE
ORING THRESHOLD RESPONSE TIME
85
MAX5963 toc12
MAX5963 toc11
250
225
FAULT_ LOW VOLTAGE (mV)
1.175
MAX5963 toc09
1.242
200
IOUT_
1A/div
0A
VPS
AC-COUPLED, 12V
500mV/div
175
150
VOUT_
AC-COUPLED, 12V
500mV/div
125
100
75
VGATEOR
10V/div
50
25
ISINK = 5mA
0V
0
0
17
34
51
68
85
100µs/div
TEMPERATURE (°C)
TURN-OFF RESPONSE TIME
CIRCUIT-BREAKER EVENT
MAX5963 toc13
MAX5963 toc14
VON_
2V/div
0V
IPWR
1A/div
0A
IOUT_
1A/div
0A
VGATE1_
10V/div
VOUT_
10V/div
0V
VGATE2_
10V/div
0V
VOUT_
10V/div
0V
VFAULT_
10V/div
0V
0V
4µs/div
VPWR
10V/div
0V
1ms/div
_______________________________________________________________________________________
7
MAX5963
Typical Operating Characteristics (continued)
(VPS = VPWR = 12V, VGND = VFOSO = 0. TA = +25°C, unless otherwise noted.)
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
Typical Operating Characteristics (continued)
(VPS = VPWR = 12V, VGND = VFOSO = 0. TA = +25°C, unless otherwise noted.)
SHORT-CIRCUIT EVENT
(ACTIVE CURRENT LIMIT)
MAX5963 toc15
ORING SWITCHOVER WAVEFORM
MAX5963 toc16
VPWR
10V/div
0V
IOUT_
1A/div
0A
IPWR
2A/div
VPS
AC-COUPLED, 12V
1V/div
0A
VGATE1_
10V/div
VOUT_
10V/div
VOUT_
AC-COUPLED, 12V
1V/div
0V
0V
VFAULT_
10V/div
VGATEOR
10V/div
0V
200ns
0V
200µs/div
1µs/div
HOT PLUG-IN LOAD CAPACITANCE
INTO ACTIVE PORT (NO FAULT)
HOT PLUG-IN LOAD CAPACITANCE
INTO ACTIVE PORT (CURRENT-LIMIT TIMEOUT)
MAX5963 toc17
CLOAD = 220µF
MAX5963 toc18
VFAULTA
10V/div
0V
VFAULTA
10V/div
0V
IPS
2A/div
0A
IPS
2A/div
0A
VGATE2A
10V/div
0V
VGATE2A
10V/div
0V
VOUTA
10V/div
0V
200µs/div
CLOAD = 1300µF
400µs/div
CHANNEL A FOSO TURN-OFF TIME
MAX5963 toc19
CHANNEL B FOSO TURN-OFF TIME
MAX5963 toc20
VPS
20V/div
0V
VFOSO
5V/div
0V
VGATE2A
10V/div
0V
VOUTA
10V/div
100ns/div
8
VOUTA
10V/div
0V
VPS
20V/div
0V
VFOSO
5V/div
0V
VGATE2B
10V/div
0V
0V
VOUTB
10V/div
0V
VFAULTA
10V/div
0V
VFAULTB
10V/div
0V
100ns/div
_______________________________________________________________________________________
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
PIN
NAME
FUNCTION
1
PWR
System Power Input. Connect to the system power source. The MAX5963 draws less than 10µA of
current from this input when GATEPS is off. Bypass PWR to GND with a 0.1µF ceramic capacitor.
2, 4, 6, 10, 11,
14, 16, 21, 25,
30, 39, 40
N.C.
No Connection. Not internally connected.
3
GATEOR
ORing MOSFET Gate-Drive Output. Referenced to PWR. GATEOR is a charge pump with a 50µA
pullup current to 5.5V (typ) above VPWR when active.
5
GATEPS
System Power MOSFET Gate-Drive Output. Referenced to PS. GATEPS is a charge pump with a
50µA pullup current to 5.5V (typ) above VPS when active.
7
GATE2A
Channel A Current-Limiter Switch Gate-Drive Output 2. Referenced to OUTA. Connect GATE2A to
the gate of the second n-channel MOSFET (see the Typical Operating Circuit). GATE2A is a charge
pump with a 50µA pullup current to 5.5V (typ) above OUTA when active. GATE2A is identical to, but
independent of, GATE1A.
8
OUTA
Channel A Output-Voltage Sense. Connect to the output.
9
GATE1A
Channel A Current-Limiter Switch Gate-Drive Output 1. Referenced to OUTA. Connect GATE1A to
the gate of the first n-channel MOSFET (see the Typical Operating Circuit). GATE1A is a charge
pump with a 50µA pullup current to 5.5V (typ) above OUTA when active. GATE1A is identical to, but
independent of, GATE2A.
12
SENSEA
Channel A Current-Sense Negative Input. Connect the negative voltage-sensing terminal of a
current-sense resistor, RSENSEA, to SENSEA. Connect the positive voltage-sensing terminal of
RSENSEA to PS.
13
BP
Output of Diode OR Connection between PWR and PS. Bypass BP to GND with a 1µF capacitor.
15
PS
Power Priority Input. Connect to the source of the external QPS FET. The MAX5963 draws most of its
power from PS whenever possible. Bypass PS to GND with a 0.1µF ceramic capacitor. Ensure that
the bypass capacitance on PS is less than or equal to the bypass capacitance on PWR.
17
CB
Circuit-Breaker Threshold Programming Input. Connect a resistor from PS to CB to program the
circuit-breaker threshold. A capacitor connected from CB to PS is recommended for impedance
matching.
18
CL
Current-Limit Threshold Programming Input. Connect a resistor from PS to CL to program the
current-limit threshold. A capacitor connected from CL to PS is recommended for impedance
matching.
19
OR
ORing Threshold Programming Input. Connect a resistor from PS to OR to program the ORing
current threshold. A capacitor connected from OR to PS is recommended for impedance matching.
20
SENSEB
Channel B Current-Sense Negative Input. Connect the negative voltage-sensing terminal of a
current-sense resistor, RSENSEB, to SENSEB. Connect the positive voltage-sensing terminal of
RSENSEB to PS.
22
GATE1B
Channel B Current-Limiter Switch Gate-Drive Output 1. Referenced to OUTB. Connect GATE1B to
the gate of the 1st n-channel MOSFET (see the Typical Operating Circuit). GATE1B is a charge
pump with a 50µA pullup current to 5.5V (typ) above OUTB when active. GATE1B is identical to, but
independent of, GATE2B.
23
OUTB
Channel B Output-Voltage Sense. Connect to the output.
_______________________________________________________________________________________
9
MAX5963
Pin Description
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
MAX5963
Pin Description (continued)
PIN
FUNCTION
24
GATE2B
Channel B Current-Limiter Switch Gate-Drive Output 2. Referenced to OUTB. Connect GATE2B to
the gate of the second n-channel MOSFET (see the Typical Operating Circuit). GATE2B is a charge
pump with a 50µA pullup current to 5.5V (typ) above OUTB when active. GATE2B is identical to, but
independent of, GATE1B.
26
FAULTB
Channel B Current-Fault Status Output. FAULTB is an open-drain output. FAULTB goes low after a
current-limit or circuit-breaker fault on channel B has exceeded the current-limit or circuit-breaker
timeout period (see the Current-Fault Status Output (FAULT_) section).
27
FAULTA
Channel A Current-Fault Status Output. FAULTA is an open-drain output. FAULTA goes low after a
current-limit or circuit-breaker fault on channel A has exceeded the current-limit or circuit-breaker
timeout period (see the Current-Fault Status Output (FAULT_) section).
28
GND
29
RETRY
31
TCL
Current-Limit Timer Programming Input. Connect TCL to BP or PS for the default timeout period or
connect a resistor from TCL to GND to program the current-limit timeout.
32
TCB
Circuit-Breaker Timer Programming Input. Connect TCB to BP or PS for the default timeout period or
connect a resistor from TCB to GND to program the circuit-breaker timeout.
ONB
Channel B On/Off Control Input. ONB sets the undervoltage lockout threshold for channel B and
resets the channel after a fault latch. Drive ONB high (>1.24V (typ)) to turn on channel B. Drive ONB
low to disable the channel. Connect a resistive-divider from PS to ONB and to GND to program the
desired undervoltage lockout threshold for the channel.
34
ONA
Channel A On/Off Control Input. ONA sets the undervoltage lockout threshold for channel A and
resets the channel after a fault latch. Drive ONA high (>1.24V (typ)) to turn on channel A. Drive ONA
low to disable the channel. Connect a resistive-divider from PS to ONA and to GND to program the
desired undervoltage lockout threshold for the channel.
35
FOSO
Fast-Off/Slow-On Logic Input. GATE1A, GATE2A, GATE1B, and GATE2B immediately pull low when
FOSO exceeds the 1.24V (typ) threshold. The MAX5963 waits for the 1s (typ) turn-on delay once
FOSO falls below the threshold hysteresis before allowing either channel to turn back on.
36
ENZ
Enable Z Logic Input. Pull ENZ up to PWR for logic-high. ENZ is a logic input that is ANDed with the
OR combination of ENX and ENY. The output of this logic determines whether the MAX5963 goes
into PWR shutdown mode. In PWR shutdown mode, the MAX5963 draws less than 10µA from PWR.
However, if the logic combination of ENX, ENY, and ENZ is low, the chip can still be powered
through either channel. See the Power-Supply Enables (ENX, ENY, and ENZ) section.
37
ENY
Logic-Enable Input Control GATEPS On/Off. Pull up to PWR for logic-high. See the Power-Supply
Enables (ENX, ENY, and ENZ) section.
38
ENX
Logic-Enable Input Control GATEPS On/Off. Pull up to PWR for logic-high. See the Power-Supply
Enables (ENX, ENY, and ENZ) section.
—
EP
33
10
NAME
Ground
Latch or Autoretry Fault Management Selection Input. Internally pulled to ground. Connect RETRY to
BP or PS for autorestart mode. Leave RETRY floating to select latchoff mode after a currentlimit/circuit-breaker timeout.
Exposed Pad. Connect EP to the GND plane. EP functions as a heatsink to maximize thermal
dissipation. Do not use as the main ground connection.
______________________________________________________________________________________
ENB
BP
GND
ENA
ONB
PWR_UVLO
PS_UVLO
INPUT
SECTION
GPS_ON
GATE DRIVE
ONA
FOSO
ENZ
ENY
ENX
PWR
PWR
MAX5963
GPS_ON
GATE DRIVE
PS
SENSEB
SENSEB
CL
CLB
SENSEB
TCL
CB, CL TIMERS
AND RETRY LOGIC
TCLA TCBA TCLB TCBB
CLA
SENSEA
OR
CBA
GATEPS
TIMER
CLB
GATEOR
TCB
CBB
PS
CLA
CBB
SENSEA
CBA
TCLB
PS_UVLO
TCBB
CB
GATE DRIVE
GATE DRIVE
TIMEOUT_B
SENSEB GATE1B
CLB
CBB
ENB
TIMEOUT_B
TIMEOUT_A
TCLA
PS_UVLO
TCBA
TIMEOUT_A
CBA
CLA
SENSEA
SENSEA GATE1A
FAULT
LOGIC
GATE2B
GATE DRIVE
ENA
GATE DRIVE
GATE2A
OUTB
OUTA
RETRY
FAULTB
FAULTA
Functional Diagram
______________________________________________________________________________________
11
MAX5963
PWR
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
MAX5963
Functional Diagram (Input Section)
PWR
PS
PWR UVLO
PS UVLO
PS_UVLO
PS
PS
PWR
PWR
GPS_ON
GPS_ON
ENX
ENY
GPS_ON
AUTOSWITCHOVER
COMP
QP1
ENZ
QP2
PS_UVLO
QP3
FOSO
BP
1s DELAY
ONA
ENA
2ms DELAY
MAX5963
2ms DELAY
ENB
ONB
12
______________________________________________________________________________________
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
The MAX5963 dual-channel, hot-swap controller IC performs hot-swapping, power-supply ORing, and current
limiting for high availability systems. The MAX5963 incorporates six MOSFET drivers (GATEPS, GATEOR,
GATE1_, and GATE2_) to control external n-channel
power MOSFETs to perform low-voltage-drop power-supply ORing (GATEOR), hot-swapping, and current limiting
from the input power supply to the load. A sense resistor
provides accurate current limiting for each independent
channel. GATE1_ and GATE2_ provide load disconnect
to prevent current flow from PS to OUT_. GATEOR and
GATEPS provide true load disconnect from PS to PWR.
The MAX5963 independent channels remain in lowcurrent PWR shutdown mode when ENZ is low or when
both ENX and ENY are low. Low-current shutdown
mode disables the MAX5963 channels resulting in less
than 10µA drawn from PWR. However, if the logic combination of ENX, ENY, and ENZ is low, the chip can still
be powered through either channel.
When the input supply voltage (VPS) is above the 6.5V
(typ) PS_UVLO threshold, and VON_ is above the 1.24V
(typ) VONTH threshold, the MAX5963 channel turns on,
sourcing 50µA (typ) current from GATE_, to enhance Q_
slowly. If the voltage across the current-sense resistor,
VSENSE_, is greater than the current-limit threshold, the
MAX5963 regulates the GATE_ voltage to limit the load
current at the current-limit level so that VSENSE_ is equal
to the current-limit threshold voltage, VCL. In normal
operation, VSENSE_ drops below VCL and GATE_ rises to
approximately 5.5V (typ) above OUT_.
If the channel continues to operate in current limit
beyond the current-limit timeout (tCL), the MAX5963
either latches off the channel or retries depending on
the state of RETRY. If the voltage across the currentsense resistor, VSENSE_, is greater than the circuitbreaker threshold for longer than the circuit-breaker
timeout (tCB), the MAX5963 either latches off the channel or retries depending on the state of RETRY. See the
Current-Limit Timeout and Circuit-Breaker Timeout sections for more information on setting TCL and TCB.
GATEOR controls the MAX5963 ORing function.
Initially, GATEOR is off and the load current conducts
through the body diode of QOR. GATEOR rises to 5.5V
above VPWR when (VSENSEA + VSENSEB)/2 exceeds
VOR_TH, thereby enhancing QOR and reducing the
voltage drop, power dissipation, and heat generation in
the power-supply pathway. When a voltage greater
than VPWR is connected at OUTA or OUTB the higher
voltage source provides current to the load(s). The
MAX5963 turns off GATEOR rapidly upon V SENSE_
falling below the V OR hysteresis, thus blocking the
higher voltage from backdriving VPWR. When the load
current drops, causing VSENSE_ to fall below the hysteresis, GATEOR turns off.
Current Limiting
The MAX5963 limits the load current by monitoring the
voltage across RSENSE_ and regulating the current to the
load, ensuring that the voltage across the resistor is
below the programmable current-limit threshold voltage
(VCL). Set the maximum current limit (ICL_LIMIT) by placing the appropriate sense resistor between PS and
SENSE_ and the appropriate current-limit threshold set
resistor (RCL) between CL and PS. When the load current is less than the maximum current limit, GATE_ rises
to 5.5V (typ) above VOUT_ to fully enhance MOSFET Q1_
and Q2_. See the Current-Limit Threshold section for
more information on setting the current-limit threshold.
When the load attempts to draw more current than
I CL_LIMIT , the MAX5963’s GATE_ pulldown current
(I GD_) regulates the current through Q1_ and Q2_,
causing OUT_ to act as a constant current source. The
output current is limited to ICL_LIMIT. If the current-limit
condition persists after the adjustable current-limit
timeout period (tCL) has expired, the GATE_ fast pulldown current (IGDF_) quickly turns off GATE_ to disconnect the load from the power supply. FAULT_
asserts low under these conditions (Figure 1).
CURRENT-SENSING
THRESHOLDS
HARD CURRENT LIMIT
VCL
CURRENT
MONITORING
VCB
tCL
tCB
TIMEOUT
tCL AND tCB RANGE: 1ms TO 30ms
tCL COUNTER IS INTEGRATED WITH 1/128 COUNT DOWN RATE
tCB COUNTER IS INTEGRATED WITH 1/1 COUNT DOWN RATE
tCB DEFAULT IS 3ms
tCL DEFAULT IS 1ms
Figure 1. Bilevel Current-Limit/Circuit-Breaker Functionality
______________________________________________________________________________________
13
MAX5963
Detailed Description
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
An external resistor connected to TCL and an internal
1/128 integrating counter determines the current-limit
timeout. If the current-limit threshold is exceeded for
more than roughly 100ns (comparator and logic
delays), the timer counts up. Note that multiple consecutive overcurrent occurrences may cause the currentlimit timer to trip (Figure 2).
During an output short-circuit event or a gross overload, the load current overshoots and causes VSENSE_
to exceed the fast pulldown current-limit threshold voltage (V THF ). The MAX5963 responds with much
stronger GATE_ pulldown currents (IGDP_ and/or IGDF_)
to quickly bring the load current back down to the programmed current limit.
In extreme cases where VSENSE_ is less than VPS by
more than 700mV (typ), the MAX5963 immediately pulls
GATE1_ and GATE2_ low with a 1A (typ) peak pulldown
current to disconnect the load from the power supply.
Following an overcurrent event, the gates of the external MOSFETs are held low (latched) if the device is in
latchoff mode. Toggle ON_ to restart the device under
these conditions. If RETRY is pulled high or connected
to BP or PS, the device pulls the gates high again following the automatic restart delay tOFFCL.
Current-Limit Threshold
The MAX5963 features adjustable current limits for
channel A and channel B. Set the current-limit threshold
voltage (VCL_TH) for both channels by connecting a
resistor, RCL, from CL to PS. Calculate VCL_TH using
the following equation:
VCL_TH = ICLSET x RCL
where ICLSET is the 100µA (typ) current-limit set current
shown in the Electrical Characteristics table.
Connect a sense resistor (RSENSE_) between PS and
SENSE_ to set the individual current limits for channel A
and channel B. Calculate the required sense resistor for
each channel using the following equation:
RSENSE_ =
VCL_TH
ICL_LIMIT
where ICL_LIMIT is the maximum channel current limit.
Current-Limit Timeout
The MAX5963 autoretry feature attempts to restart the
device following the adjustable current-limit timeout,
limiting the duty cycle of the MOSFETs under continuous fault conditions. The autoretry timeout is equal to
128 times the current-limit timeout:
tOFFCL (ms) = 128 x tCL (ms)
14
TIMER
tCL
CURRENT-LIMIT
TRIPS
SLOPE = -1/128
SLOPE = 1
tCL
t
IOUT_
ICL
t
Figure 2: Current-Limit Timeout Following Consecutive
Overcurrent Events
Set the current-limit timeout from 1ms to 30ms by connecting a resistor between TCL and ground. See Figure 3
for resistor values and associated timeouts. Connect TCL
to BP to select the 1ms (typ) default current-limit timeout.
Circuit Breaker
The MAX5963 features internal circuit-breaker circuitry
that functions as a current monitor. Once the output
current exceeds the circuit-breaker limit (ICB_LIMIT), the
circuit-breaker timer begins. When the circuit-breaker
timeout (tCB) is reached, GATE_ is pulled low and a
fault condition is asserted (Figure 1).
An external resistor connected to TCB and an internal
1/1 integrating counter determines the circuit-breaker
timeout. If the circuit-breaker threshold is exceeded for
more than roughly 100ns (comparator and logic
delays), the timer counts up. Note that multiple consecutive circuit-breaker overcurrent occurrences may
cause the circuit-breaker timer to trip (Figure 4).
Following a circuit-breaker event, the gates of the external MOSFETs are held low (latched) if the device is in
latchoff mode. If RETRY is pulled high or connected to
BP, the device pulls the gates high again following the
automatic restart delay tOFFCB.
______________________________________________________________________________________
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
VCB_TH = ICBSET x RCB
where ICBSET is the 100µA (typ) circuit-breaker set current shown in the Electrical Characteristics table.
A sense resistor (RSENSE_) between PS and SENSE_
sets the individual circuit-breaker limits for channels A
and B. Calculate the circuit-breaker current limit
(ICB_LIMIT) for each channel using the following equation:
ICB_LIMIT =
VCB_TH
RSENSE_
Circuit-Breaker Timeout
The MAX5963 autoretry feature attempts to restart after
an adjustable circuit-breaker timeout. The autoretry
timeout is equal to 128 times the circuit-breaker timeout:
tOFFCB (ms) = 128 x tCB (ms)
Set the circuit-breaker timeout from 1ms to 30ms by
connecting a resistor between TCB and ground. See
Figure 3 for resistor values and associated timeouts.
Connect TCB to BP to select the 3ms (typ) default circuit-breaker timeout.
Connect a resistor from OR to PS to set the ORing
threshold (V OR_TH ). Calculate the ORing threshold
using the following equation:
VOR_TH = ROR x IORSET
where IORSET is the 100µA (typ) ORing threshold set
current, and ROR is the resistance connected between
OR and PS.
The MAX5963 continuously monitors the voltage drops
across the sense resistors, V SENSEA and V SENSEB .
QOR turns off rapidly when the voltage across the
sense resistors decreases below the V OR threshold
minus its hysteresis. See Table 1.
140
RTCL OR RTCB (kΩ)
CIRCUIT-BREAKER
TRIPS
MAX5963 fig03
160
The MAX5963 controls two back-to-back n-channel
power MOSFETs, QPS and QOR (see the Typical
Operating Circuit), for system power-on/power-off control and ORing functionality. GATEPS is pulled high
once VPWR exceeds the UVLO threshold and a valid
combination of EN_ inputs is received. Initially, GATEOR is off and the load current conducts through the
body diode of QOR.
GATEOR rises to 5.5V above VPWR when the voltage
across the sense resistors (V SENSEA + V SENSEB )/2
exceeds the ORing threshold, enhancing QOR. QOR’s
low RDS(ON) provides a very low voltage drop across its
source to drain, which results in less power dissipation
and heat generation in the power-supply path than a
traditional diode.
TIMER
tCB
CURRENT-LIMIT/CIRCUIT-BREAKER
RESISTANCE vs. TIMEOUT
180
Power-Supply ORing
(GATEPS and GATEOR)
SLOPE = -1
SLOPE = 1
120
100
tCB
80
t
60
IOUT_
40
20
ICB
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
TIMEOUT (ms)
Figure 3: Current-Limit/Circuit-Breaker Timeout vs. RTCL and
RTCB Resistor Values
t
Figure 4: Circuit-Breaker Timeout Following Consecutive
Overcurrent Events
______________________________________________________________________________________
15
MAX5963
Circuit-Breaker Threshold
The MAX5963 features adjustable circuit-breaker limits
for channels A and B. Set the circuit-breaker threshold
voltage (VCB_TH) for both channels by connecting a
resistor, RCB, from CB to PS. Calculate VCB_TH using
the following equation:
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
Table 1. ORing Protection Truth Table
INPUT
OUTPUT
(VSENSEA + VSENSEB)/2 > VOR
GATEOR
Yes
On
Normal operation. ORing MOSFET (QOR) is on to minimize power
dissipation.
No
Off
ORing protection. ORing MOSFET (QOR) is off, preventing current
flowing backward into the system’s power supply, VPWR.
DESCRIPTION
Undervoltage Lockout
The MAX5963 dual-channel, independent current-limit
switches have independent ON/OFF control. Both
channels operate from 7.5V to 76V and have default
6.5V (typ) undervoltage lockout thresholds. The external MOSFETs remain off as long as VPS < 6.5V or VON_
< VONTH. The UVLO thresholds are programmable by
connecting a resistive voltage-divider between ON_
and GND. When VPS is greater than 7.5V and VON_
exceeds the 1.24V (typ) threshold, GATE1_ and
GATE2_ enhance to 5.5V, with respect to OUT_ and the
MAX5963 switch goes into normal operation.
Calculate the resistor values to program the switches’
individual turn-on threshold voltages using the following
formula:
⎛ VTURN_ON ⎞
R1 = ⎜
− 1⎟ x R2
⎝ 1.24V
⎠
ON_ to reject transient voltage dips to prevent unnecessary power-supply interruptions.
Current-Fault Status Output (FAULT_)
FAULTA and FAULTB are high-voltage, open-drain outputs that pull low when a current-limit or circuit-breaker
fault shutdown has occurred. FAULTA and FAULTB
remain low until the next startup cycle. FAULTA and
FAULTB are capable of sinking up to 5mA when asserted.
Autoretry/Latchoff Fault Management
The MAX5963 autoretry feature attempts to restart after
an adjustable current-limit or circuit-breaker timeout, limiting the duty cycle of the MOSFETs under continuous
fault conditions. Connect RETRY to BP or PS for
autorestart mode. Leave RETRY floating to select latchoff
mode after a current-limit/circuit-breaker timeout.
FAULT_ deasserts every time a restart attempt is made.
Logic Inputs
where VTURN_ON is the desired turn-on voltage of channel A and/or B. R1 and R2 create a resistive divider
from PS to ON_ (see the Typical Operating Circuit).
When operating the MAX5963, ON_ must remain above
its 1.24V (typ) threshold. If VON_ falls below the threshold and hysteresis for more than 10µs (typ), the powersupply MOSFETs turn off. This allows the power supply
to disconnect from the load in the event of a fault condition such as shorting of the output to a different powersupply voltage or to a FireWire signal pin. If possible
transient conditions exist that may exceed 10µs (typ) at
the main power-supply line (PS), place an RC filter at
Power-Supply Enables (ENX, ENY, and ENZ)
Three enable inputs, ENX, ENY, and ENZ, can be used
to control power-on/power-off.
ENZ is a logic input that is ANDed with the OR combination of ENX and ENY. Apply a voltage greater than
1.8V (min) to ENZ to ensure that GATEPS is pulled high
when VPWR rises above the 6.5V (typ) PWR undervoltage lockout threshold.
Pull ENZ low to put the MAX5963 into PWR standby or
shutdown mode. The MAX5963 draws less than 10µA
from PWR in shutdown. See Table 2.
Table 2. Logic Input Truth Table
16
INPUT
OUTPUT
(ENX OR ENY) AND ENZ
GATEPS
L
Off
System Power-Off Mode. The MAX5963 draws < 10µA from PWR after
[(ENX or ENY) and ENZ] goes low for more than tSHDN time.
H
On
Enable System Power. The system power supply, VSUPPLY, provides
power to the FireWire ports.
DESCRIPTION
______________________________________________________________________________________
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
Fast-Off/Slow-On (FOSO) Protection
GATE1A, GATE2A, GATE1B, and GATE2B immediately
pull low when FOSO exceeds the 1.24V (typ) threshold.
The MAX5963 waits for the 1s (typ) turn-on delay once
FOSO falls below the threshold hysteresis before allowing either channel to turn back on. See the FireWire
Power Management section for more information.
Applications Information
Startup Considerations
Set the appropriate current-limit threshold for successful startup. A successful startup is dependent on the
MAX5963 current-limit threshold and timeout period. A
large capacitor at the output results in a charging current equivalent to the current-limit threshold and may
cause the MAX5963 to exceed its 1ms (typ) default
timeout period if the current-limit threshold is set too
low. Use the following formula to compute the minimum
current-limit setting:
ICL_LIMIT >
COUT x VPS
+ ILOAD
tCL
where ICL_LIMIT is the programmed current limit, COUT
is the capacitor at OUT_, VPS is the supply voltage, tCL
is the adjustable current-limit timeout period, and ILOAD
is the load current during startup. With V PS = 12V,
C OUT = 220µF, t CL = 1ms, and I LOAD = 0, set the
MAX5963 current limit greater than 2.6A. This calculation does not include tolerances.
limit/circuit-breaker level above the maximum normal
operating current. Typically, set the current limit at 1.2
to 1.5 times the nominal load current.
Choose the sense resistor power rating to accommodate a current-limit condition:
PSENSE_ = (VCB_TH)2/RSENSE_
where PSENSE_ is the power dissipated across RSENSE_
during a current-limit/circuit-breaker fault.
MOSFET Selection
Select external MOSFETs according to the application
current level. The MOSFETs’ on-resistance (RDS(ON))
should be chosen low enough to have minimum voltage
drop at full load to limit the MOSFET power dissipation.
High RDS(ON) also causes large output ripple if there is a
pulsating load. Determine the device power rating to
accommodate a short-circuit condition on the board, at
startup, and when the device is in autoretry mode. During
normal operation, the external MOSFETs dissipate little
power. The power dissipated in normal operation is:
P = ILOAD2 x RDS(ON)
The most power dissipation occurs during a currentlimit event, resulting in high power dissipated in Q_ during the current-limit period for the MAX5963. Calculate
the power dissipated across Q_ during this period
using the following equation:
PQ__ = (VPS - VSENSE_) x ICL_LIMIT
where VSENSE_ is the voltage across the current-sense
resistor, RSENSE_, VPS is the input voltage and ICL_LIMIT
is the programmed current limit. Though there are two
MOSFETs in series at the outputs, the safest assumption is that all of the current-limiting power dissipation
occurs in one of the two MOSFETs; perfect sharing of
the current-limit voltage drop is unlikely.
Choosing RSENSE_
Select sense resistors, RSENSEA and RSENSEB, which
cause the circuit-breaker voltage drop at a current-
Table 3. BP Voltage in Standby Mode
PWR AND PS CONFIGURATION
ENZ
PS_UVLO
VBP (V)
VPS > VPWR - 0.1V
Low
High
VPS - 0.7V
VPS > VPWR - 0.1V
Low
Low
VPS
VPS < VPWR - 0.1V
Low
Low
VPS
VPS < VPWR - 0.1V
High*
Low
VPS
VPS < VPWR - 0.1V
High*
High
VPWR
*ENX or ENY must be high to turn on GATEPS.
______________________________________________________________________________________
17
MAX5963
The MAX5963 is capable of being powered through
PWR or through channel A or B. Pull ENZ low and apply
a voltage to either channel to power the device. In this
mode, BP is powered by VPS according to Table 3.
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
FireWire Power Management
voltage to the signal lines, damaging the host PHY.
Connect the FOSO input as shown in Figure 5 to sense
high voltage on the signal lines, and the MAX5963
immediately disconnects until VG is connected.
The MAX5963 is an excellent solution for FireWire port
control and protection. In a two-port power-sourcing
application, the MAX5963 can route system power to
both ports, or it can allow either port to pass power to
the other port, while blocking reverse current to the system power supply.
In these applications, it is important that no loads be
placed on the PS node of the application circuit
because V PS is not protected against overcurrent
faults. Loads should be placed at the port connections
OUTA and OUTB instead, as shown in Figure 5.
The fast-off, slow-on input can be used to implement
late VG protection for FireWire ports. In the event that a
FireWire device makes connection with VP prior to VG,
protection diodes in the load device can apply high
Transient Protection
If PS or OUT_ experiences a fast transient rise in voltage, the drain-to-gate overlap capacitance of GATE1_
and/or GATE2_ FETs may be sufficient to enhance both
of the transistors, allowing current to flow. If the circuit
is subjected to large transients, connect capacitors
from the gate to source across the appropriate MOSFET to prevent the overlap capacitance from turning on
the device. This causes the turn-off time of the FETs to
increase due to the additional discharge of the capacitor. Use the minimum capacitor value that prevents
reverse currents from flowing in hot-plug situations.
Table 4. FireWire Port Powering and Late VG (FOSO) Protection Truth Table
INPUT
FOSO
OUTPUT
DESCRIPTION
ONA
ONB
GATE_A
GATE_B
H
X
X
Off
Off
Late VG event, all ports are off.
L
H
X
On
—
Enable port A power.
Disable port A power.
L
L
X
Off
—
L
X
H
—
On
Enable port B power.
L
X
L
—
Off
Disable port B power.
L
H
H
On
On
Enable port A, B power and power routing between the
ports.
X = Don’t care.
18
______________________________________________________________________________________
VPHY
GND
VD
SGND
DC-DC CONVERTER TO POWER THE PHY
LX
ON
BST
MAX5080
VIN
10kΩ
QPS
49.9kΩ
Si7222DN
QOR
FB
VSUPPLY
(SYSTEM POWER
SUPPLY 8V TO 35V)
361Ω
CB
ONB
ONA
PWR
1.82Ω
GATEOR
GATEPS
CL
18.2Ω
PS
RSENSEB
20mΩ
SENSEB
GATE2B
REPLACES UL FUSE
Q2B
OUTB
BP
TCB
TCL
GND
GATE2A OUTA
FOSO
Si7222DN
GATE1B
Q1B
Q2A
Si7222DN
GATE1A
Q1A
PORT CURRENT LIMITING AND POWER ROUTING FROM
ONE PORT TO ANOTHER
OR
MAX5963
SENSEA
RSENSEA
20mΩ
REPLACES UL FUSE
220pF
TO FIREWIRE PORT B
(1.5A)
10kΩ
LATE VG PROTECTION
13.7kΩ
TO FIREWIRE PORT A
(1.5A)
MAX5963
SYSTEM POWER ENABLE AND ORING
PORT CURRENT LIMITING AND POWER ROUTING FROM
ONE PORT TO ANOTHER
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
Figure 5. MAX5963 FireWire Application
______________________________________________________________________________________
19
MAX5963
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
Typical Operating Circuit
QOR
QPS
GATEOR
GATEPS
VIN1
RSENSEA
20mΩ
Q1A
Q2A
LOAD A
GND
SENSEA GATE1A
GATE2A
PWR
RCB
+VCB-
OUTA
FOSO
BP
CB
RCL
+VCL-
ENX
CL
MANAGEMENT
µC
ENY
MAX5963
ENZ
ROR
+VOR-
RTCB
TCB
OR
RTCL
TCL
PS
ONA
R1
ONB
SENSEB GATE1B
GATE2B
GND
OUTB
RSENSEB
20mΩ
Q1B
R2
LOAD B
Q2B
GND
VIN2
Package Information
Chip Information
PROCESS: BICMOS
For the latest package outline information, go to
www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
40 TQFN-EP
T4066+5
21-0141
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.