BG5412K Dual N-Channel MOSFET Tetrode • Designed for input stages of 2 band tuners 4 5 6 • Two AGC amplifiers in one single package, with on-chip internal switch 1 2 3 • Only one switching line to control both FETs • Integrated gate protection diodes • Ultra low noise figure • Excellent cross modulation at gain reduction • Integrated ESD gate protection diodes • Pb-free (RoHS compliant) package • Qualified according AEC Q101 Detailed functional diagram on page 5 BG5412K 6 5 A 1 4 B 2 3 ESD (Electrostatic discharge) sensitive device, observe handling precaution! Type BG5412K Package SOT363 Pin Configuration 1=G1* 2=G2 3=G1** 4=D** 5=S Marking 6=D* K2s * For amp. A; ** for amp. B 180° rotated tape loading orientation available 1 2009-10-01 BG5412K Maximum Ratings Parameter Symbol Drain-source voltage VDS Continuous drain current ID Value 8 Unit V mA amp. A 25 amp. B 25 Gate 1/ gate 2-source current IG1S, IG2S ±1 mA Gate 1/ gate 2-source voltage VG1S, VG2S ±6 V Total power dissipation Ptot 200 mW Storage temperature Tstg -55 ... 150 Channel temperature Tch 150 TS ≤ 94 °C °C Thermal Resistance Parameter Symbol Value Unit Channel - soldering point 1) Rthchs ≤ 280 K/W 1For calculation of RthJA please refer to Application Note Thermal Resistance 2 2009-10-01 BG5412K Electrical Characteristics at TA = 25°C, unless otherwise specified Symbol Values Parameter Unit min. typ. max. V(BR)DS 12 - - +V(BR)G1SS 6 - 15 +V(BR)G2SS 6 - 15 +IG1SS - - 50 +IG2SS - - 50 IDSS - - 100 DC Characteristics Drain-source breakdown voltage V ID = 100 µA, VG1S = 0 , VG2S = 0 Gate1-source breakdown voltage +IG1S = 10 mA, V G2S = 0 , VDS = 0 Gate2-source breakdown voltage +IG2S = 10 mA, V G1S = 0 , VDS = 0 Gate1-source leakage current nA VG1S = 6 V, VG2S = 0 , VDS = 0 Gate2-source leakage current VG2S = 8 V, VG1S = 0 Drain current µA VDS = 5 V, VG1S = 0 , VG2S = 4 V Drain-source current mA IDSX VDS = 5 V, VG2S = 4 V, RG1 = 120 kΩ, amp. B - 14 - VDS = 5 V, VG2S= 4 V, selfbiased, - 18 - VG1S(p) - 0.7 - VG2S(p) - 0.7 - amp. A Gate1-source pinch-off voltage V VDS = 5 V, VG2S = 4 V, ID = 100 µA Gate2-source pinch-off voltage VDS = 5 V, I D = 100 µA 3 2009-10-01 BG5412K Electrical Characteristics at TA = 25°C, unless otherwise specified Parameter Symbol Values min. typ. Unit max. AC Characteristics V DS = 5 V, VG2 = 4 V, ID = 10 mA (verified by random sampling) Forward transconductance gfs mS amp. A - 33 - amp. B - 30 - Gate1 input capacitance pF Cg1ss amp. A - 2.2 - amp. B - 2 - amp. A - 0.9 - amp. B - 0.8 - Output capacitance Cdss Power gain Gp dB f= 800 MHz, amp. A - 24 - f= 800 MHz, amp. B - 24 - f= 45 MHz, amp. A - 34 - f= 45 MHz, amp. B - 31 - Noise figure dB F f= 800 MHz, amp. A - 1.1 - f= 800 MHz, amp. B - 1.2 - f= 45 MHz, amp. A - 0.8 - f= 45 MHz, amp. B - 0.9 - - 45 - ∆G p Gain control range VG2S = 4...0 V, f = 800 MHz Cross-modulation k=1%, f W=50MHz, funw=60MHz Xmod amp. A, AGC = 0 dB - 97 - amp. B, AGC = 0 dB - 96 - amp. A, AGC = 10 dB - 94 - amp. B, AGC = 10 dB - 91 - amp. A, AGC = 40 dB - 105 - amp. B, AGC = 40 dB - 103 - 4 - 2009-10-01 BG5412K Functional diagram shows pinning of BG5412K, switching pin at PIN 3 DA DB S (RFoutA) (Ground) (RFoutB) Amp. B Amp. A S VGG Amp. A G2 G1A (RFinA) Int. switch G2 (AGC) Amp. B bias network partially integrated bias network fully integrated Vgg = 5 V : Amp. A is OFF ; Amp. B is ON Vgg = 0 V : Amp. A is ON ; Amp. B is OFF Amp. A and Amp. B share G2 and S pins G2 G1B (RFinB) Rg1 VGG 5 2009-10-01 BG5412K Total power dissipation Ptot = ƒ(TS) Drain current ID = ƒ(IG1) VG2S = 4V, amp. B VDS= 5 V 30 220 mA mA 180 20 140 ID P tot 160 120 15 100 80 10 60 40 5 20 0 0 15 30 45 60 75 90 105 120 °C 0 0 150 10 20 30 40 50 µA TS Output characteristics ID = ƒ(V DS) VG2 = 4 V, amp. A Output characteristics ID = ƒ(V DS) VG2 = 4 V, amp. B VG1 = Parameter VG1 = Parameter 20 20 mA 1.5V 16 1.6V mA 16 1.4V 1.5V 14 12 ID 14 ID 70 IG1 1.3V 10 1.4V 12 10 1.2V 8 1.3V 8 1.2V 6 6 1.1V 4 4 2 2 0 0 2 4 6 8 V 0 0 12 VDS 2 4 6 8 10 V 14 VDS 6 2009-10-01 BG5412K Gate 1 current IG1 = ƒ(V G1S) Gate 1 forward transconductance VDS = 5V g fs = ƒ(ID); amp.A VDS = 5V, VG2S = Parameter VG2S = Parameter 45 150 mS 4V µA 4V 3.5V 100 G fs I G1 35 30 3V 25 3V 75 2.5V 20 50 2.5V 15 2V 10 2V 25 1.5V 5 0 0 0.4 0.8 1.2 1.6 2 2.4 V 0 0 3.2 5 10 15 20 25 30 35 40 mA VG1S 50 ID Drain current ID = ƒ(V G1S) VDS = 5V, amp. A Gate 1 forward transconductance g fs = ƒ(ID), amp. B VDS = 5V, VG2S = Parameter VG2S = Parameter 40 36 4V mS 4V mA 3V 2.5V 28 3.5V 25 24 3V 20 15 20 16 2.5V 2V 10 12 5 8 0 4 -5 0 5 10 15 2V ID Gfs 30 20 25 30 35 mA 0 0 45 ID 1.5V 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 V 2 VG1S 7 2009-10-01 BG5412K Drain current ID = ƒ(VG1S) VDS = 5V, amp. B Drain current ID = ƒ(V GG), amp. B VDS = 5V, VG2S = 4V, RG1 = 100kΩ VG2S = Parameter (connected to VGG, V GG=gate1 supply voltage) 32 mA mA 3V 2.5V 20 12 ID 24 ID 16 4V 2V 10 16 8 12 6 1.5V 8 4 4 2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 V 0 0 2 1 2 3 V VG1S 5 VGG Drain current ID = ƒ(VGG ), amp. B Drain current of FET A and FET B VDS = 5V, VG2S = 4V as function of Gate 1 FET B (connected to VGG, VGG =gate1 supply voltage) 28 mA 22 56K mA FET A 24 68K 18 82K 16 ID 20 18 ID 22 100K 16 14 12 120K 12 150K 10 180K 10 14 8 8 FET B 6 6 4 4 2 2 0 0 1 2 3 4 V 0 0 6 0.2 0.4 0.6 0.8 1 1.2 V 1.6 VG1_B VGG=VDS 8 2009-10-01 BG5412K AGC characteristic AGC = ƒ(VG2S) AGC characteristic AGC = ƒ(V G2S) f= 45 MHz, amp. B 0 dB 0 dB -10 -10 -15 -15 -20 -20 AGC AGC f= 45 MHz, amp. A -25 -30 -25 -35 -40 -40 -45 -45 -50 -50 -55 -55 -60 -60 -65 -65 0.5 1 1.5 2 2.5 3 V -70 0 4 82k -30 -35 -70 0 120k 0.5 1 1.5 2 2.5 3 V VG2S AGC characteristic AGC = ƒ(VG2S) AGC characteristic AGC = ƒ(V G2S) f= 800 MHz, amp. B f= 800MHz, amp. A 0 dB -10 -10 -15 -15 -20 -20 AGC AGC 0 dB -25 -30 -35 -35 -40 -40 -45 -45 -50 -50 -55 -55 0.5 1 1.5 2 2.5 3 V -60 0 4 VG2S 120k 82k -25 -30 -60 0 4 VG2S 0.5 1 1.5 2 2.5 3 V 4 VG2S 9 2009-10-01 BG5412K Crossmodulation Vunw = (AGC) Crossmodulation Vunw = (AGC) VDS = 5 V, Rg1 = 120 kΩ VDS = 5 V, Rg1 = 56 kΩ amp.A amp.B 115 115 dBµV V unw V unw dBµV 105 105 82k 120k 100 100 95 95 90 90 85 0 5 10 15 20 25 30 35 40 dB 85 0 50 AGC 5 10 15 20 25 30 35 40 dB 50 AGC 10 2009-10-01 BG5412K Crossmodulation test circuit VAGC VDS 4n7 R1 10kΩ 2.2 uH 4n7 4n7 RL 50Ω RGEN 50Ω 4n7 50 Ω RG1 VGG Semibiased VAGC VDS 4n7 R1 10kΩ 2.2 uH 4n7 4n7 RL 50Ω RGEN 50Ω 4n7 50 Ω fullbiased 11 2009-10-01 Package SOT363 BG5412K Package Outline 2 ±0.2 0.9 ±0.1 +0.1 6x 0.2 -0.05 0.1 0.1 MAX. M 0.1 Pin 1 marking 1 2 3 A 1.25 ±0.1 4 0.1 MIN. 5 2.1 ±0.1 6 0.15 +0.1 -0.05 0.65 0.65 0.2 M A Foot Print 1.6 0.9 0.7 0.3 0.65 0.65 Marking Layout (Example) Small variations in positioning of Date code, Type code and Manufacture are possible. Manufacturer 2005, June Date code (Year/Month) Pin 1 marking Laser marking BCR108S Type code Standard Packing Reel ø180 mm = 3.000 Pieces/Reel Reel ø330 mm = 10.000 Pieces/Reel For symmetric types no defined Pin 1 orientation in reel. 0.2 2.3 8 4 Pin 1 marking 1.1 2.15 12 2009-10-01 BG5412K Edition 2006-02-01 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2007. All Rights Reserved. Attention please! The information given in this dokument shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 13 2009-10-01