INFINEON BTF50060-1TEA

Datasheet, Rev. 1.0, June 2010
BTF50060-1TEA
Smart High-Side Power Switch, One Channel
High PWM Frequencies
Automotive
BTF50060-1TEA
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
3.3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Definition of Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.4
5.4.1
5.4.2
5.4.3
5.5
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching a Resisitve Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching an Inductive Load - Infineon® SMART CLAMPING . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching a Capacitive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inverse Load Current Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection by Over Current Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection by Over Temperature Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Infineon® INTELLIGENT LATCH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection during Loss of Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection during Loss of Load or Loss of VS Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection during ESD or Over Voltage Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnosis Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sense Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enhancing Accuracy of the Sense Output by End of Line Calibration . . . . . . . . . . . . . . . . . . . . . . .
Short-to-Battery detection / Open Load Detection in OFF state . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Shutdown & Restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
12
12
13
14
14
14
16
16
17
17
17
18
18
19
20
20
22
22
23
6
6.1
6.2
6.2.1
6.2.2
6.2.3
6.2.4
Electrical Characteristics BTF50060-1TEA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parameter dependencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnosis Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
24
28
28
29
30
31
7
7.1
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8
Package Outlines and Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Datasheet
2
5
5
5
5
Rev. 1.0, 2010-06-24
Smart High-Side Power Switch, One Channel
High PWM Frequencies
1
BTF50060-1TEA
Overview
Application
•
•
•
Driving all types of resistive, inductive and capacitive loads
Most suitable for driving loads with PWM frequency from 0Hz (DC
operation) up to 33kHz and above
Drives valves, coils, and motors, with inrush currents up to 60 A
Features
•
•
•
•
•
•
•
•
•
•
Optimized for PWM frequencies of approx. 25 kHz
PG-TO252-5-311
3.3V and 5V compatible logic inputs
Advanced analog load current sense signal
Designed for easy current sense calibration
Embedded diagnosis features (e.g. open load in ON and OFF state)
Embedded protection functions (e.g. over current shutdown, over temperature shutdown)
Infineon® INTELLIGENT LATCH
Infineon® SMART CLAMPING
Green Product (RoHS compliant)
AEC Qualified
Description
Embedded in a PG-TO252-5-311 package, the BTF50060-1TEA is a 6mΩ single channel Smart High-Side Power
Switch. It is based on Smart power chip on chip technology with a P-channel vertical power MOSFET, providing
protective and diagnostic functions. It is specially designed to drive loads in the harsh automotive environment.
Table 1
Product Summary
Parameter
Symbol
Values
Range of typical PWM frequencies
fPWM
RDS(ON)_150
VS(NOM)
IL(NOM)
IS(OFF)
IL(SC)
-VS(REV)
0 Hz ... 33 kHz
Maximum On-state Resistance at Tj = 150 °C
Nominal Supply Voltage Range for Operation
Nominal Load Current (DC operation)
Typical Stand-by Current at Tj = 25 °C
Minimum short circuit current shutdown threshold
Maximum reverse battery voltage
12 mΩ
6 V … 19 V
16.5 A
5 µA
60 A
16 V
Type
Package
Marking
BTF50060-1TEA
PG-TO252-5-311
F50060A
Datasheet
3
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Block Diagram
Embedded Protection Functions
•
•
•
•
Infineon® INTELLIGENT LATCH - resettable latch resulting from protective switch OFF
Over current protection by short-circuit shutdown
Overload protection by over-temperature shutdown
Infineon® SMART CLAMPING
Embedded Diagnosis Functions
•
•
•
•
Advanced analog load current sense signal with defined positive offset current; enabling load diagnosis like
Open Load in ON state, overload
Providing defined fault signal
Open Load detection in OFF state
Short-to-battery detection
2
Block Diagram
ESD + over voltage protection
Vs
A
Input circuit
RIN
Smart
Clamping
Diagnosis
IN
Gate
driver
&
Protection
Temp
IS
Figure 1
Sense output
OUT
BlockDiagram.emf
GND
Block Diagram of BTF50060-1TEA
For a Diagram of Diagnosis & Protection block, please see Figure 15.
Datasheet
4
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
IS
VS
4
5
IN
2
3 (OUT)
GND
1
OUT (TAB)
PinConfiguration .emf
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
Function
1
GND
Ground; Ground connection for control chip.
2
IN
Input; Digital 3.3 V and 5 V compatible logic input; activates power switch if set to
HIGH level; Includes internal pull-down resistor RIN.
Tab; 31) OUT
Output; Protected high side power output
4
IS
Sense; Provides analog sense current signal and defined fault signal.
5
Vs
Supply Voltage; Positive supply voltage for Logic and Power Stage2)
1) Tab and pin 3 are internally connected. Pin 3 is cut.
2) PCB traces have to be designed to withstand maximum current occuring in the application.
3.3
Definition of Terms
Figure 3 shows all terms used for currents and voltages in this data sheet, with associated convention for positive
values.
VS
IS
IIN
VIN
VSIS
VS
IN
OUT
IS
GND
VSD
IL
IIS
V OUT
VIS
IGND
Terms.emf
Figure 3
Datasheet
Definition of currents and voltages
5
Rev. 1.0, 2010-06-24
BTF50060-1TEA
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 2
Absolute Maximum Ratings 1)
Tj = -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
T
y
p
.
Unit
Note /
Test Condition
Number
V
–
P_4.1
P_4.2
P_4.3
Max.
Supply voltages
Supply Voltage
Reverse Polarity Voltage on
pin GND, IS
Supply voltage for short
circuit protection
VS
|-VS(REV)|
-0.3
0
16
V
2) 3)
VBAT(SC)4)
0
28
V
RECU = 20mΩ,
RCable = 6mΩ/m,
LCable = 1µH/m,
l = 0 or 5m,
28
,
see
Chapter 5.3.1
–
45
V
RI = 2 Ω 5) ,
RL = 1.0 Ω,
td = 400ms
P_4.4
nRSC1
–
1 E6
(Grade A)
–
4)
P_4.21
VIN
IIN
VIS
IIS
IGND
-0.3
6
V
–
P_4.5
Supply voltage for load dump VS(LD)
protection
Short Circuit Capability
Short circuit cycle capability
IN + IS + GND pin
Voltage at IN pin
Current through IN pin
Voltage at IS pin
Current through IS pin
Current through GND pin
-2
2
mA
t < 2min
P_4.6
-0.3
VS
V
–
P_4.7
-2
10
mA
–
P_4.8
-2
10
mA
–
P_4.9
-IL(SC)
IL(SC)
A
–
P_4.10
–
280
mJ
VS = 13.5V
IL(0) = 20A
Tj(0) = 150°C
P_4.11
Power stage
IL
Maximum energy dissipation EAS
Load current
for switching OFF an
inductive load
- single pulse
See Figure 4 and
Chapter 5.1.2
Maximum energy dissipation EAR
for switching OFF an
inductive load
- repetitive pulse
–
84
mJ
VS = 13.5V
IL(0) = 20A
Tj(0) = 105°C
P_4.13
See Figure 4 and
Chapter 5.1.2
Temperatures
Junction Temperature
Datasheet
Tj
-40
150
6
°C
–
P_4.14
Rev. 1.0, 2010-06-24
BTF50060-1TEA
General Product Characteristics
Table 2
Absolute Maximum Ratings (cont’d)1)
Tj = -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
T
y
p
.
Unit
Note /
Test Condition
Number
Max.
Dynamic temperature
increase while switching
∆Tj
–
60
K
–
P_4.15
Storage Temperature
Tstg
-55
150
°C
–
P_4.16
ESD Resistivity HBM
all Pins to GND
VESD1
-2
2
kV
HBM6)
P_4.17
ESD Resistivity HBM
VS vs. GND, VS vs. OUT,
OUT vs. GND
VESD2
-4
4
kV
HBM6)
P_4.18
ESD Resistivity CDM
all pins to GND
VESD3
-500
500
V
CDM7)
P_4.19
ESD Resistivity CDM
corner pins
VESD4
-750
750
V
CDM7)
P_4.20
ESD Susceptibility
1) Not subject to production test, specified by design.
2) In case of reverse polarity voltage on pin IN, IIN needs to be limited (see P_4.6) by external resistor RINPUT, see Figure 45.
3) In case of reverse polarity voltage, current through the OUT pin needs to be limited by external circuitry to prevent over
heating (see P_4.14). Power dissipation during reverse polarity voltage can be calculated by Equation (3). Please note,
build-in protection functions are not available during reverse polarity condition.
4) In accordance to AEC Q100-012 and AEC Q101-006. Test aborted after 1 E6 cycles.
5) VS(LD) is set up without the DUT connected to the generator per ISO 7637-1.
6) ESD susceptibility, HBM according to EIA/JESD 22-A114B
7) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101 or ESDA STM5.3.1
1000
E A [mJ]
100
10
1
I L(0) [A]
10
100
E_AR (Tj(0) = 105°C)
E_AS (Tj(0) = 150°C)
Figure 4
Datasheet
Maximum energy dissipation for switching OFF an inductive load EA vs. load current
7
Rev. 1.0, 2010-06-24
BTF50060-1TEA
General Product Characteristics
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not
designed for continuous repetitive operation.
Datasheet
8
Rev. 1.0, 2010-06-24
BTF50060-1TEA
General Product Characteristics
4.2
Functional Range
Table 3
Functional Range
Parameter
Symbol
Values
Min.
T
y
p
.
Unit
Note /
Test Condition
Number
Max.
Nominal Supply Voltage
Range for Operation
VS(NOM)
6
19
V
–
P_4.23
Extended Supply Voltage
Range for Operation
VS(EXT)
VS(UV)ON1)
28
V
2)
P_4.24
Extended Supply Voltage
Range for short dynamic
undervoltage swings
VS(DYN)
VS(UV)OFF1)
VS(UV)ON1)
V
2)3)
P_4.25
Junction Temperature
Tj
-40
150
°C
–
P_4.26
1) see Chapter 5.5, Undervoltage turn ON voltage and Undervoltage turn OFF voltage
2) In extended supply voltage range, the device is functional but electrical parameters are not specified.
3) Operation only if supply voltage was in range of VS(EXT) before undervoltage swing. Otherwise, device will stay OFF.
6V
13.5V
VS(UV)OFF
VS(UV)ON
VS(NOM)
V S(DYN)
19V
28V
VS(EXT)
VS
FunctionalRange.emf
Figure 5
Overview of functional ranges
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
Datasheet
9
Rev. 1.0, 2010-06-24
BTF50060-1TEA
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Table 4
Thermal Resistance
Parameter
Symbol
1)
thJC
Thermal Resistance Junction to Case
R
Thermal Resistance Junction to Ambient - 2s2p
RthJA_2s2p1)
Values
Unit
Note /
Test Condition
Number
Min.
Typ.
Max.
–
1
1.1
K/W
–
P_4.27
–
22
–
K/W
2)
P_4.29
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm board with 2 inner copper layers (2 × 70 mm Cu, 2 × 35 mm
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Figure 6 and Figure 7 are showing the typical thermal impedance of BTF50060-1TEA mounted according to
Jedec JESD51-2,-5,-7 at natural convection on FR4 1s and 2s2p board. The product (chip + package) was
simulated on a 76,4 x 114,3 x 1,5 mm board with 2 inner copper layers (2x 70µm Cu, 2 x 35µm Cu). Where
applicable, a thermal via array under the exposed pad contacted the first inner copper layer. The PCB layer
structure is shown in Figure 8. The PCB layout is shown in Figure 9.
Figure 6
Datasheet
Typical Transient Thermal Impedance
Zth(JA) = f(tP) for different cooling areas
Figure 7
10
Typical Transient Thermal Impedance
Zth(JA) = f(tP) for PWM operation with
duty cycles D = t / tperiod on a 2s2p PCB
Rev. 1.0, 2010-06-24
BTF50060-1TEA
General Product Characteristics
2s2p PCB
1s PCB
70µm
70µm
1.5mm
1.5mm
35µm
PCB 1s.emf
0.3mm
Figure 8
PCB 2s2p.emf
Cross section of 1s and 2s2p PCB used for ZthJA simulation
600mm²
300mm²
min
PCB front.emf
Figure 9
Datasheet
Front view of PCB layout used for ZthJA simulation
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Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
5
Functional Description
5.1
Power Stage
The power stage is built by a P-channel vertical power MOSFET (DMOS). The ON-state resistance RDS(ON)
depends on the supply voltage VS as well as the junction temperature Tj. Figure 26 shows the dependencies for
the typical ON-state resistance. The behavior in reverse polarity is described in Chapter 5.3.4. A HIGH signal at
the input pin (see Chapter 5.2) causes the power DMOS to switch ON. A LOW signal at the input pin causes the
power DMOS to switch OFF.
5.1.1
Switching a Resisitve Load
Defined slew rates for turn ON and OFF as well as edge shaping support PWM’ing of the load while achieving
lowest EMC emission at minimum switching losses. Figure 10 shows the typical timing when switching a resistive
load. Please note: if the devices logic is inactive, e.g. because the IN signal was LOW for t > tRESET, the logic of
the device needs a wake-up time of twake for turning the output ON in addition to the turn ON time tON. See also
Figure 11.
VIN
VIN(H),min
VIN(L),max
tON
VOUT
t
tOFF
tr
tf
90% VS
70% VS
(dV/dt)ON
(dV/dt)OFF
30% VS
10% VS
t
SwitchingResistiveLoad_F.emf
Figure 10
Datasheet
Switching a resistive load
12
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
t > tRESET
VIN
tRESET
VOUT
t < t RESET
t wake+tON
twake+t sIS(ON)
I IS
tON
t
t sIS(ON)
t
I IS(OFFSET)
t
wake-up.emf
Figure 11
Wake up timing
5.1.2
Switching an Inductive Load - Infineon® SMART CLAMPING
When switching OFF inductive loads with no path for load current freewheeling available, the output voltage VOUT
drops below ground potential due to the involved inductance ( -diL/dt = -vL/L ; -VOUT ≅ -VL ). To prevent the
destruction of the device due to high voltages, there is a voltage clamp mechanism implemented that keeps the
negative output voltage at a certain level (-VOUT=VS-VSD(CL)). Please refer to Figure 1 and Figure 12 for details.
V OUT
VS
ON
OFF
V SD(CL)
t
IL
t
Figure 12
SwitchingInductance.emf
Switching an inductance
Nevertheless, the energy capability of the device is limited because the energy is converted into heat. That’s why
the maximum allowed load inductance is limited as well. Please see Figure 4 for limitations of energy and load
inductance.
For calculationg the demagnization energy, Equation (1) may be used:
V S – V SD ( CL )
RL × IL 
L
EA = V SD ( CL ) × ------ × -------------------------------× ln  1 + ---------------------------------+I

RL
RL
VSD ( CL ) – VS L
(1)
The equation can be simplified under the assumption of RL = 0 Ω to:
V SD ( CL )
2
1
E A = --- × L × IL × -------------------------------2
V SD ( CL ) – V S
(2)
The BTF50060-1TEA provides Infineon® SMART CLAMPING functionality. To optimize the energy capability for
single and parallel operation, the clamp voltage VSD(CL) increases over the junction temperature Tj and load current
IL. Figure 30 shows the dependency from Tj for the typical VSD(CL). Please refer also to Figure 15.
Datasheet
13
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
5.1.3
Switching a Capacitive Load
A capacitive load’s dominant characteristic is it’s inrush current. The BTF50060-1TEA can support inrush currents
up to IL(SC). If the inrush current reaches IL(SC), the device may detect a short circuit condition and switches OFF.
For a description of the short circuit protection mechanism, please refer to Chapter 5.3.1.
5.1.4
Inverse Load Current Operation
In case of a negative load current, e.g. caused by load operating as a generator, the device can not block a current
flowing through the intrinsic body diode. See Figure 13. The power stage of the device can be switched ON or
stays ON as long as VIN = HIGH, reaching the same RDS(ON) as for positive load currents, if no fault condition is
detected. In case of fault condition, the logic of the device will switch OFF the power stage and supply a fault signal
IIS(fault). Since the device can not block a negative load current (even under fault conditions), it can not protect itself
from overload condition. In the application, overload conditions, e.g. over temperature, must not occur during
inverse load current operation.
VS
logic
-IL(inv)
GND
G
LOAD
OUT
Invers.emf
Figure 13
Inverse load current operation
5.2
Input Circuit
The input circuitry is compatible with 3.3 and 5V micro controllers. If VIN is set to VIN = VIN(H) (VIN = HIGH), the
device will turn ON. See Figure 10 for the timings. If VIN is set to VIN = VIN(L) (VIN = LOW), the power stage of the
device will be turned OFF. The input circuitry has a hysteresis ∆VIN. The input circuitry is compatible with PWM
applications. Figure 14 shows the electrical equivalent input circuitry. The logic of the BTF50060-1TEA stays
active for a delay time tRESET after the switch OFF signal.
IN
R IN
GND
Figure 14
InputCircuitry.emf
Input pin circuitry
Applying an input voltage of VIN > 20V (absolute maximum ratings exceeded!) may force the BTF50060-1TEA to
deactivate parts of the logic circuitry. This includes the undervoltage shutdown, the undervoltage restart delay, and
the analog sense function. In this case, also the short circuit shutdown threshold IL(SC) is set to typically 50A, and
Datasheet
14
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
the latch reset time tRESET is reduced to typically 200µs. To reset this behavior, set input voltage to VIN = LOW for
t>300µs.
Datasheet
15
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
5.3
Protection Functions
The BTF50060-1TEA provides embedded protective functions. Integrated protection functions are designed to
prevent the destruction of the IC from fault conditions described in the data sheet. Fault conditions are considered
as “outside” normal operating range. Protection functions are designed for neither continuous nor repetitive
operation.
In case of overload, high inrush currents, or short circuit to ground, the BTF50060-1TEA offers several protection
mechanisms. Figure 15 describes the functionality of the diagnosis and protection block.
Diagnosis & Protection
Undervoltage protection
delay = td(UV)
Vs
VS(UV)
no delay
Input
circuit
No Undervoltage
IN
&
No FAULT
Gate
driver
INTELLIGENT LATCH
timer reset
no delay
Q S
Temp
Tjt
Q R
1
delay = tRESET
Sense
output
≥1
I L(SC)
A
0
1
I IS(fault)
ENABLE
≥1
OUT
VOUT(OL)
R OUT(GND)
Open Load at OFF
DiagnosisProtection. emf
Figure 15
Diagram of Diagnosis & Protection block
5.3.1
Protection by Over Current Shutdown
The internal logic permanently monitors the load current IL. In the event of a load current exceeding the short circuit
shutdown threshold (IL>IL(SC)), the output will switch OFF with a latching behavior. During an over current
shutdown, an overshooting IL(SC)peak may occur, depending on the short circuit impedances. For the case the
device is in ON state while short circuit appears, the typical overshooting IL(SC)peak as a function of the steepness
of the short circuit current dISC/dt, see Chapter 6.2.3.
For a detailed description of the latching behavior, please see Chapter 5.3.3.
At lower supply voltages the current tripping level IL(SC) will decrease depending on the supply voltage. At VS =
4.7V, the current tripping level will be reduced to IL(SC)LV. Please refer to Figure 32 for typical current tripping level
IL(SC) as a function of the supply voltage VS.
Datasheet
16
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
5.3.2
Protection by Over Temperature Shutdown
The internal logic permanently monitors the junction temperature of the output stage. In the event of an over
temperature (Tj > Tjt) the output will immediately switch OFF with a latching behavior, see Chapter 5.3.3 for
details.
5.3.3
Infineon® INTELLIGENT LATCH
The BTF50060-1TEA provides Infineon® INTELLIGENT LATCH to avoid permanent resetting of a protective,
latched switch OFF caused by over current shutdown or over temperature shutdown) in PWM applications. To
reset a latched protective switch OFF the fault has to be acknowledged by commanding the input LOW for a
minimum duration of treset. See Figure 16 for details.
VIN
tRESET
over temperature /
short circuit
VOUT
t
tRESET
t
t
IIS
IIS(fault)
IIS(OFFSET)
latch
reset
reset t
latch
INTELLIGENTLATCH.emf
Figure 16
Infineon® INTELLIGENT LATCH - fault acknowledge and latch reset
5.3.4
Reverse Polarity Protection
Reverse polarity condition is the mix-up of the power supply connections of the entire application. This means,
application GND connector is connected to positive supply voltage, while Vs pin is connected to negative supply
voltage or ground potential. See Figure 17 and Figure 45.
VS
-VS(rev)
R INPUT
logic
-IIN
R SENSE
-IL
RIS
GND
LOAD
OUT
Revers.emf
Figure 17
Datasheet
Reverse polarity condition
17
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
Under reverse polarity condition, the output stage can not block a current flow. It will conduct a load current via
the intrinsic body diode. The current through the output stage has to be limited either by the load itself or by
external circuitry, to avoid over heating of the power stage. Power losses in the power stage during reverse polarity
condition can be calculated by Equation (3):
P rev = ( – I L ( rev ) ) × ( – V SD ( rev ) )
(3)
Additionally, the current into the logic pins has to be limited to the maximum current described in Chapter 4.1 with
an external resistors. Figure 46 shows a typical application. Resistors RINPUT and RSENSE are used to limit the
current in the logic of the device and in the ESD protection stage. The recommended value for RINPUT = RSENSE =
10kΩ. As long as |-VS(rev)| < 16V, the current through the GND pin of the device is blocked by an internal diode.
5.3.5
Protection during Loss of Ground
In case of loss of the module ground or device ground connection (GND pin) the device protects itself by
automatically turning OFF (when it was previously ON) or remains OFF (even if the load remains connected to
ground), regardless if the input is driven HIGH or LOW. In case GND recovers the device may need a reset via
the IN pin to return to normal operation.
5.3.6
Protection during Loss of Load or Loss of VS Condition
In case of loss of load with charged primary inductances the maximum supply voltage has to be limited. It is
recommended to use a Z-diode, a varistor (VZa < 40V) or VS clamping power switches with connected loads in
parallel.
In case of loss of a charged inductive load, disturbances on pin OUT may require a reset on IN pin for the device
to regain normal operation.
In case of loss of VS connection with charged inductive loads, a current path with load current capability has to be
provided, to demagnetize the charged inductances. It is recommended to use a diode, a Z-diode or a varistor
(VZb < 16V, VZL + VD < 16V).
For higher clamp voltages currents through all pins have to be limited according to the maximum ratings. Please
see Figure 18 and Figure 19 for details.
GND
OUT
LOAD
logic
LOAD
GND
OUT
Smart
Clamping
VZa
VS
Smart
Clamping
VZb
logic
VS
VD
VZL
LossOfVs.emf
Figure 18
Datasheet
Loss of VS
18
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
VS
logic
OUT
LOAD
VZa
Smart
Clamping
VZb
GND
LossOfLoad.emf
Figure 19
Loss of load
5.3.7
Protection during ESD or Over Voltage Condition
All logic pins have ESD protection. A dedicated clamp mechanism protects the logic IC against transient over
voltages. See Figure 20 for details.
VS
ESD protection
IS
V Z(IC)
OUT
Over voltage
protection
IN
GND
Figure 20
OverVoltageProtection.emf
Over voltage protection
In the case (VS > max VS(SC))&(VS < VSD(CL)), the output transistor is still operational and follows the input.
Parameters are no longer warranted and lifetime is reduced compared to normal mode. This specially impacts the
short circuit robustness, as well as the maximum energy EAS the device can handle.
The BTF50060-1TEA provides Infineon® SMART CLAMPING functionality, which suppresses non nominal over
voltages by actively clamping the over voltage across the power stage and the load. This is achieved by controlling
the clamp voltage VSD(CL) depending on the junction temperature Tj and the load current IL. See Figure 15 for
details. Please refer also to Chapter 5.1.2.
Datasheet
19
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
5.4
Diagnosis Functions
For diagnosis purpose, the BTF50060-1TEA provides an enhanced analog sense signal at the pin IS. For an
overview of the diagnosis functions, you may have a look at Figure 15 “Diagram of Diagnosis & Protection
block”.
5.4.1
Sense Output
The current sense output is a current source driving a signal IIS proportional to the load current (see Equation (5))
as long as no “hard” failure mode occurs (short circuit to GND / over temperature) and VSIS = VS - VIS > 3V. It is
activated and deactivated by the input signal. Usually, in the application a pull-down resistor RIS is connected
between the current sense pin IS and GND pin. A typical value is RIS = 1.0 kΩ. Figure 46 shows a simplified
application setup.
Table 5 is giving a quick reference for the logic / analog state of the IS pin during device operation.
In case a short circuit or an over temperature condition is detected, the sense output is supplying a fault signal
IIS(fault). The fault signal is reset by an input signal being LOW for t > tRESET. As long as an open load, short-to-VS
or inverse operation is detected while the device is in OFF state, the sense output also supplies the fault signal
IIS(fault). The timings and logic of the IS pin are described in Figure 21. During output turning ON or OFF, the sense
signal is invalid. Please note: if the devices logic is inactive, e.g. because the IN signal was LOW for t > tRESET, the
logic of the device needs a wake-up time of twake for activating the sense output in addition to the current sense
settling time for turn ON tsIS(ON). See also Figure 11.
Table 5
Truth Table for Sense Signal
Operation mode
Normal operation
Inverse operation
Input level
Output level
Sense output
LOW for t > tRESET
VOUT = VS - RDS(ON) * IL
VOUT ~ GND
(VOUT < VOUT(OLL))
HIGH
VOUT > VS
IIS = (IL / kIS) + IIS(OFFSET)
IIS = IIS(OFFSET)
Z3) (IIS = IIS(LL))
IIS ≤ IIS(OFFSET)
IIS = IIS(OFFSET)
IIS = IIS(FAULT)
IIS = IIS(FAULT)
HIGH
1)
LOW
2)
for t < tRESET
LOW for t < tRESET
LOW for t > tRESET
After short circuit to GND or HIGH or LOW for
over temperature detection t < tRESET
VOUT ~ GND
LOW for t > tRESET
Short circuit to VS
HIGH
Z (IIS = IIS(LL))
VOUT = VS
LOW for t < tRESET
LOW for t > tRESET
Open load
HIGH
LOW for t < tRESET
VOUT = VS
VOUT > VOUT(OLH)4)
LOW for t > tRESET
1)
2)
3)
4)
IIS ≤ IIS(OFFSET)
IIS = IIS(OFFSET)
IIS = IIS(FAULT)
IIS ≤ IIS(OFFSET)
IIS = IIS(OFFSET)
IIS = IIS(FAULT)
HIGH: VIN = VIN(H)
LOW: VIN = VIN(L)
Z: High impedance
Can be achieved e.g. with external pull up resistor ROL, see Figure 46.
Datasheet
20
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
VIN
IIS
t
tRESET
IL
tsIS(ON)
tsIS(OFF)
t
90% (IIS static
- IIS(offset))
10% (IIS static
- IIS(offset))
Figure 21
tsIS(LC)
tsIS(LC)
IIS(OFFSET)
t
CurrentSenseTiming.emf
Sense output timing
Figure 22 shows the current sense as a function of the load current in the power DMOS. The curves represent
the minimum and maximum values for the sense current, as well as the ideal sense current, assuming an ideal kIS
factor value as well as an ideal IIS(OFFSET).
10
2
max I IS(fault)
8
typ I IS(fault)
1.5
I IS [mA]
I IS [mA]
min I IS(fault)
6
max I IS
typ I IS
4
max I IS
1
typ I IS
min I IS
min I IS
max I L(SC)
2
0.5
max I IS(OFFSET)
typ I L(SC)
typ I IS(OFFSET)
min I IS(OFFSET)
min I L(SC)
0
0
0
Figure 22
20
40
60
I L [A]
80
100
0
5
10
15
I L [A]
Sense current as a function of the load current (VSIS > 3V)
The sense current can be calculated out of the load current by the following Equation (4):
IIS = --1- × I L + IIS ( OFFSE
k IS
(4)
Or, vice versa, the load current can be calculated out of the sense current by following Equation (5):
I L = k IS × ( I IS – I IS ( OFFSET ) )
Datasheet
21
(5)
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
For definition of kIS, the following Equation (6) is used:
I L1 – IL2
k IS = -------------------------------------------I IS ( IL1 ) – IIS ( I L2 )
(6)
IL1 and IL2 are two different load currents, IIS(IL1) and IIS(IL2) are the corresponding sense currents.
5.4.2
Enhancing Accuracy of the Sense Output by End of Line Calibration
For some applications it may be necessary to measure the load current with very high accuracy. To increase the
device accuracy, different methods can be used, e.g. single point calibration or dual point calibration.
The variance of the sense current at a certain load current depends on the variance of the factor kIS as well as on
the variance of the offset current IIS(OFFSET). The temperature variance of the factor kIS over the temperature range
is described with the parameter ∆kIS,Temp.
∆k IS, Temp = max [ k IS ( – 40°C ) – k IS ( 25°C ) ; k IS ( – 40°C ) – k IS ( 25°C ) ]
(7)
The variance of the sense current offset over the temperature range is defined as shown in Equation (8):
∆ I IS ( OFFSET ) = max [
5.4.3
I IS ( OFFSET ) ( – 40°C ) – I IS ( OFFSET ) ( 25°C ) ; I IS ( OFFSET ) ( –40°C ) – IIS ( OFFSET ) ( 25°C ) ]
(8)
Short-to-Battery detection / Open Load Detection in OFF state
The BTF50060-1TEA provides open load diagnosis in OFF state. This is achieved by monitoring the OUT voltage.
The open load at OFF diagnosis is activated if VIN = LOW for t > tRESET. An open load or short-to-battery is detected
if VOUT > VOUT(OLH). To provoke this condition during Open Load, it may be necessary to use an external pull up
resistor ROL (see Figure 46). In case of detecting a shorted load to battery, open load, or inverse operation in OFF
state, the pin IS provides a defined fault current IIS(fault). If VOUT drops below VOUT(OLL), or VIN is set to HIGH, the
fault signal is removed. Figure 23 shows the behavior of the open load at OFF diagnosis. Figure 43 and
Figure 44 provide the typical behavior of VOUT(OLH) and VOUT(OLL) as a function of the supply voltage and junction
temperature. The device internally connects OUT with GND pin with an effective resistor ROUT(GND). In case the
application provides high leakage current outside of the BTF50060-1TEA between Vs and OUT, it may be
necessary to use an external resistor RL_OL to disable open load detection. Figure 46 gives an example of external
circuitry for enabling / disabling open load detection in OFF state.
Datasheet
22
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Functional Description
VOUT
VOUT(OLH)
VOUT(OLL)
∆VOUT(OL)
t
IIS
IIS(FAULT)
IIS(LL)
t
OpenLoad_at_OFF.emf
Figure 23
Open load detection in OFF state
5.5
Undervoltage Shutdown & Restart
The BTF50060-1TEA switches OFF whenever VS drops below VS(UV)OFF. The device restarts automatically after
the supply voltage increases to a sufficient level (VS > VS(UV)ON) and a delay time of tdelay(UV), if the input pin IN is
HIGH. Please see Figure 24 for details. The fault signal is reset if VS is below VS(UV) for more than typ. 70µs.
VIN
HIGH
t
VS
VS(UV)ON
VS(UV)OFF
∆V S(UV)
t
VOUT
ON
tdelay(UV)
Z
t
Undervoltage.emf
Figure 24
Datasheet
Undervoltage shutdown and restart
23
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
6
Electrical Characteristics BTF50060-1TEA
6.1
Electrical Characteristics Table
Table 6
Electrical Characteristics: BTF50060-1TEA
VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note /
Test Condition
Number
VIN = LOW for
t > tRESET,
VS = 13.5V,
Tj = 25°C
VOUT < VOUT(OLL)
VIN = LOW for
t > tRESET,
VS = 13.5V,
Tj = 85°C
VOUT < VOUT(OLL)
VIN = LOW for
t > tRESET,
Tj = 150°C
VOUT < VOUT(OLL)
VIN = HIGH,
t > tON
VIN = LOW for
t > tRESET,
VOUT > VOUT(OLH)
P_6.1
VIN = HIGH,
Tj = 25 °C,
VS = 13.5V,
IL = +/-13.5A
VIN = HIGH,
Tj = 150 °C,
VS = 13.5V,
IL = +/-13.5A
VIN = HIGH,
Tj = 25 °C,
VS = 8V,
IL = +/-13.5A
VIN = HIGH,
Tj = 150 °C,
VS = 8V,
IL = +/-13.5A
P_6.6
Operating currents
Standby current for whole
device with load
Tj = 25°C
IS(OFF)_251)
–
5
8
µA
Standby current for whole
device with load
Tj = 85°C
IS(OFF)_851)
–
5
8
µA
Standby current for whole
device with load
Tj = 150°C
IS(OFF)_150
–
20
60
µA
Ground current during ON
IGND(ON)
–
3
5
mA
Supply current during open
load detection in OFF state
IS(OL)1)
–
12
15
mA
On-State Resistance
RDS(ON)_251)
–
6.8
–
mΩ
On-State Resistance
RDS(ON)_150
–
10
12
mΩ
On-State Resistance
RDS(8V)_251)
–
8
–
mΩ
On-State Resistance
RDS(8V)_1501)
–
11.5
15
mΩ
P_6.2
P_6.3
P_6.4
P_6.5
Power stage
Datasheet
24
P_6.7
P_6.8
P_6.9
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
Table 6
Electrical Characteristics: BTF50060-1TEA (cont’d)
VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
1)
Unit
Note /
Test Condition
Number
VIN = HIGH,
Tj = 25 °C,
VS = 4.7V,
IL = +/-13.5A
VIN = HIGH,
Tj = 150°C,
VS = 4.7V,
IL = +/-13.5A
VIN = 0V,
IL = -13.5A
P_6.10
Min.
Typ.
Max.
–
10.5
–
mΩ
On-State Resistance at low
supply voltage
RDS(UV)_25
On-State Resistance at low
supply voltage
RDS(UV)_150
–
19
25
mΩ
Body diode forward voltage
drop2)
-VSD(rev)1)
300
700
1000
mV
P_6.11
P_6.12
(see Figure 13
and Figure 17)
Output leakage current3)
IL(OFF)_251)
–
0.1
1
µA
Output leakage current
IL(OFF)_851)
–
0.1
1
µA
Output leakage current
IL(OFF)_150
–
1
60
µA
Slew rate 30% to 70% VS
(dV/dt)ON
15
35
55
V/µs
Slew rate 70% to 30% VS
-(dV/dt)OFF
12.5
25
37.5
V/µs
Slew rate matching
(dV/dt)ON - |(dV/dt)OFF|
∆dV/dt
-7
10
27
V/µs
Turn ON time to 90% VS
tON
tOFF
tON-tOFF
twake1)
tr
–
0.35
1.0
µs
P_6.17
(see Figure 10
P_6.18
and Figure 11 for
definitions)
P_6.19
–
0.85
1.5
µs
P_6.20
-1.15
-0.5
-0.25
µs
P_6.21
Tj = 25°C,
VIN = LOW,
VOUT = 0V
Tj = 85°C,
VIN = LOW,
VOUT = 0V
Tj = 150°C,
VIN = LOW,
VOUT = 0V
P_6.13
RL = 1Ω,
VS = 13.5V
P_6.16
P_6.14
P_6.15
Switching a resistive load
Turn OFF time to 10% VS
Turn ON/OFF matching
Wake up delay time
Turn ON rise time 10% to
90% VS
Turn OFF fall time 90% to
10% VS
–
2
–
µs
P_6.62
–
0.25
0.6
µs
P_6.22
tf
–
0.35
0.6
µs
P_6.23
VSD(CL)_251)
32
40
–
V
40
48
–
V
-0.3
–
0.8
V
Switching an inductive load
Output voltage drop
limitation4)
Output voltage drop limitation VSD(CL)_1501)
Tj = 25°C,
IL = 40mA,
Tj = 150°C,
IL = 13.5A,
P_6.26
–
P_6.28
P_6.27
Input circuitry
LOW level input voltage
Datasheet
VIN(L)
25
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
Table 6
Electrical Characteristics: BTF50060-1TEA (cont’d)
VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit
Note /
Test Condition
Number
Min.
Typ.
Max.
VIN(H)
VIN(HYS)1)
RIN
2.0
–
6
V
–
P_6.29
–
200
–
mV
–
P_6.30
50
100
200
kΩ
–
P_6.31
Short circuit shutdown
threshold
IL(SC)
60
75
95
A
8V < VS < 19V
P_6.32
Short circuit shutdown
threshold at low supply
voltage
IL(SC)LV1)
10
–
IL(SC)
A
4.7V < VS < 8V
P_6.33
Thermal shutdown
temperature
Tjt
150
1751)
2001)
°C
–
P_6.34
Latch reset time
tRESET1)
40
55
80
ms
P_6.35
0
0.5
1.0
mA
VIN = LOW
6V < VS < 28V
VS = VS(EXT),
HIGH level input voltage
Input voltage hysteresis
Input pull down resistor
Protection
Output leakage current while IOUT(GND)1)
GND disconnected5)
Over voltage protection of
logic IC
VZ(IC)
P_6.40
GND pin
disconnected
45
50
–
V
10.5
13
15
k
IGND = 5mA
P_6.41
Sense Output
Sense current steepness
(reciprocal)
kIS
kIS temperature variance
∆kIS,Temp1)
Sense current
IL = IL1
IIS(L1)
see Equation (6) P_6.42
50
200
350
µA
IL1 = 13.5A,
IL2 = 0A,
VS - VIS > 3V
IL = 13.5A,
VS - VIS > 3V
VS - VIS > 3V
-100
0
100
µA
see Equation (8) P_6.47
IIS(LL)
0
0.1
1
µA
VIN = LOW for
t > tRESET,
VOUT < VOUT(OLL)
P_6.48
Fault signal current at sense
output
IIS(fault)
6.5
7.5
9
mA
6)
P_6.49
Current sense settling time
for turn ON to 90% IIS
tsIS(ON)1)
0
1
3
µs
Current sense settling time
for turn OFF to 10% IIS
tsIS(OFF)1)
0
1
3
µs
Current sense settling time
matching
tsIS(ON)tsIS(OFF)1)
-0.5
0
0.5
µs
Sense current offset
IIS(OFFSET)
Sense current offset
temperature variance
∆IIS(OFFSET)
Leakage Current at sense
output
Datasheet
-2
0
+2
0.95
1.24
1.63
%
mA
P_6.43
P_6.44
P_6.46
1)
26
VS - VIS > 3V
VS = 13.5V,
RL = 1.0Ω,
RIS = 1.0kΩ,
CSENSE < 100pF,
See Figure 21
P_6.50
P_6.51
P_6.52
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
Table 6
Electrical Characteristics: BTF50060-1TEA (cont’d)
VS = 6V to 19V, Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Current sense settling time
after changes of the load
current IL
Symbol
t
Values
1)
sIS(LC)
Min.
Typ.
Max.
0
1
2
Unit
Note /
Test Condition
Number
µs
VIN = HIGH,
IL = 1A ↔ 50A
RIS = 1.0kΩ,
CSENSE < 100pF,
P_6.53
See Figure 21
Turn ON current sense
tsIS(FAULT)
settling time to IIS(fault) in case
of short circuit
1)
0
1
3
µs
RIS = 1.0kΩ,
CSENSE < 100pF,
P_6.54
See Figure 16
Open load at OFF
Output voltage threshold for
open load detection in OFF
state
VOUT(OLH)
P_6.55
see Figure 23,
Figure 43 and
Figure 44
P_6.56
5.5
6
4.5
5
5.5
Output voltage hysteresis for ∆VOUT(OL)1)
open load detection in OFF
state
–
500
–
mV
ROUT(GND)1)
–
450
–
kΩ
VOUT = 4.5V,
VIN = LOW,
for t > tRESET
P_6.63
–
4.4
4.7
V
VS increasing,
VIN = HIGH
VS decreasing,
VIN = HIGH
VS(UV)ON VS(UV)OFF,
VIN = HIGH
VIN = HIGH
P_6.58
Output voltage threshold for VOUT(OLL)
resetting open load detection
in OFF state
Intrinsic output pull-down
resistance
V
VIN = LOW,
t > tRESET,
VS = 13.5V,
5
P_6.57
Undervoltage shutdown and restart
Undervoltage turn ON voltage VS(UV)ON
Undervoltage turn OFF
voltage
VS(UV)OFF
–
4.1
4.4
V
Undervoltage turn ON/OFF
hysteresis
∆VS(UV)1)
–
0.25
–
V
Undervoltage restart delay
time
tdelay(UV)
4
6
8
ms
1)
2)
3)
4)
5)
6)
P_6.59
P_6.60
P_6.61
Not subject to production test, specified by design
Please note - during ON state, the output voltage drop in inverse current operation is defined by VSD(inv) = RDS(ON) x IL
See Figure 28 for typical temperature dependency.
See Figure 30 for typical temperature dependency.
All pins disconnected except for VS and OUT
Valid after over temperature or short ciruit to ground until reset (t > tRESET, VIN = LOW, or undervoltage detection) or during
detection of open load in OFF state.
Datasheet
27
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
Parameter dependencies
6.2.1
Power Stage
7
%&'9+'
%&'**+,
6.2
3
!
"#$
--
-/-
Typical standby current IS(OFF) as a
Figure 26
function of the junction temperature Tj
VS = 13.5V, VIN = LOW for t > tRESET
12
10
8
7
;&'**+,
R DS(ON) [mOhm]
Figure 25
!
6
Typical ON state resistance RDS(ON) as a
function of the junction temperature Tj
VS = 13.5V, IL = 13.5A, VIN = HIGH
4
3
2
0
"#$
0
Figure 27
Datasheet
5
10
15
20
V S [V]
25
30
!
Typical ON state resistance RDS(ON) as a Figure 28
function of the supply voltage VS
Tj = 25°C, IL = 13.5A, VIN = HIGH
28
"#$
Typ. output leakage current IL(OFF) as a
function of the junction temperature Tj
VS = 13.5V, VIN = LOW
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
7
%&$;+-
%&<+-
3
3
!
Figure 29
6.2.2
"#$
!
Figure 30
Typical body diode forward voltage
drop -VSD(rev) as a function of the
junction temperature Tj
IL = -4A, VIN = LOW
"#$
Typical output voltage drop limitation
VSD(CL) as a function of the junction
temperature Tj
IL = 40mA, VIN = LOW
Input Circuit
3
>9?'
7
3
!
Figure 31
Datasheet
"#$
Typ. input pull down resistor RIN as a
function of the junction temperature Tj
29
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
Protection Functions
7
7
;&%$+
;&%$+
6.2.3
3
3
%&@-+'**
!
Figure 32
%-
"#$
--
Typical short circuit shutdown
threshold as a function of the supply
voltage VS; Tj = 25°C
Figure 33
--
Typical short circuit shutdown
threshold as a function of the junction
temperature Tj; VS = 13.5V
120
100
I peak,SC [A]
80
60
40
20
0
0.1
Figure 34
Datasheet
1
10
dI L/dt [A/µs]
100
Typical short circuit overshooting as a
function of the dISC/dt (device is in ON
state when short circuit appears)
Tj = 25°C
30
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
6.2.4
Diagnosis Functions
3
3
>%
>%
7
7
3
3
!
Figure 35
"#$
Typical sense current slope kIS as a
Figure 36
function of the junction temperature Tj
VS = 13.5V, IL1=13.5A, IL2=0A, VIN=HIGH
%-
Typical sense current slope kIS as a
function of the supply voltage VS
Tj = 25°C, IL1=13.5A, IL2=0A, VIN=HIGH
300
3
250
I IS(OFFSET) [µA]
>%
7
200
150
100
3
50
0
Figure 37
Datasheet
;
3
-50
Typical sense current slope kIS as a
Figure 38
function of the load current IL1
VS = 13.5V, Tj = 25°C, IL2=0A, VIN = HIGH
31
0
50
T j [°C]
100
150
Typical sense current offset IIS(OFFSET)
as a function of the junction
temperature Tj
VS = 13.5V, VIN = HIGH
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Electrical Characteristics BTF50060-1TEA
0.25
0.2
I IS(LL) [µA]
>%&'**%KM+,
0.15
0.1
0.05
0
%-
Typical sense current offset IIS(OFFSET)
as a function of the supply voltage VS
Tj = 25°C, VIN = HIGH
Figure 39
-50
Figure 40
7
>%
>%&;;+,
100
150
Typical leakage current IIS(LL) at the
sense output as a function of the
junction temperature Tj
VS = 13.5V, VIN = LOW for t > tRESET
3
%-
Datasheet
50
T j [°C]
Figure 41
0
Typical leakage current IIS(LL) at the
sense output as a function of the
supply voltage VS
Tj = 25°C, VIN = LOW for t > tRESET
Figure 42
32
3
%>%-
7
Typical fault current IIS(fault) at the sense
output as a function of the voltage
VSIS = VS - VIS
VS = 13.5V, VIN = HIGH
Rev. 1.0, 2010-06-24
BTF50060-1TEA
10
10
8
8
V OUT(OLL), V OUT(OLH) [V]
V OUT(OLL), V OUT(OLH) [V]
Electrical Characteristics BTF50060-1TEA
6
4
6
4
2
2
0
0
0
10
Vout(OLH)
Figure 43
Datasheet
V S [V]
20
30
-50
Vout(OLL)
0
Vout(OLH)
Typcical output voltage thresholds for Figure 44
open load detection during OFF
VOUT(OLH) and VOUT(OLL) as a function of
the supply voltage VS
Tj = 25°C
33
50
T j [V]
100
150
Vout(OLL)
Typical output voltage thresholds for
open load detection during OFF
VOUT(OLH) and VOUT(OLL) as a function of
the junction temperature Tj
VS = 13.5V
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Application Information
7
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
V bat
+5V
C VS
R INPUT
µC
e.g.
XC866
470 µF
10k
R SENSE
10 k
VS
IN
OUT
IS
D1
GND
R IS
1k
Load
GND
Figure 45
appl_example_L.emf
Application Diagram for switching an inductive load without external circuitry supporting
open load detection in OFF state
Vbat
T1
+5V
C VS
470µF
R INPUT
µC
e.g.
XC866
10k
VS
IN
10k
R SENSE
R OL
3k3
OUT
IS
GND
R IS
1k
D1
R L_OL
33k
GND
Figure 46
Load
appl_ example_OL.emf
Application Diagram with external circuitry supporting open load detection in OFF state
Note: This are very simplified examples of an application circuit. The function must be verified in the real
application.
Table 7
Typical Application Parameter1)
Parameter
Symbol
Typical Values
Note / Condition
Range of typical PWM
frequencies
fPWM
0 Hz ... 33 kHz
duty cycle = 0%, 10% ... 90%
Nominal Load Current
IL(NOM)
16.5 A
Typical load current at 10 kHz IL(10kHz)
11 A
Typical load current at 25 kHz IL(25kHz)
7A
TA = 85°C, Tj < 150°C, RthJA = 22K/W
DC operation or fPWM < 1kHz; VS = 19V
TA = 85°C, Tj < 150°C, RthJA = 22K/W
fPWM = 10kHz, duty cycle = 95%,
VS = 19V
TA = 85°C, Tj < 150°C, RthJA = 22K/W
fPWM = 25kHz, duty cycle = 95%,
VS = 19V,
1) Values are calculated and not subject to production test.
Datasheet
34
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Application Information
Table 8
Bill of Material
Reference
Value
Purpose
RINPUT
10 kΩ
Protection of the µC during overvoltage and reverse battery condition
RSENSE
10 kΩ
Protection of the µC during overvoltage and reverse battery condition
RIS
CVS
1 kΩ
Sense resistor. Shunt resistor for measuring IIS by the µC’s AD converter.
470µF
Capacitor buffering the supply voltage
Switching an inductive load
D1
Freewheeling diode for commutation of load current. Depending on load current
and thermal boundary conditions, it may be necessary to use active freewheeling
by a MOSFET, instead of the diode.
External circuitry supporting open load at OFF detection
T1
BC807
Switches the supply voltage for activation / deactivation of Open Load at OFF
detection
ROL
RL_OL
3.3kΩ
Pull up resistor for Open Load detection in OFF state
33kΩ
Pull down resistor for deactivating Open Load detection in OFF state
7.1
•
•
Further Application Information
Please contact us for information regarding the pin FMEA
For further information you may visit http://www.infineon.com/
Datasheet
35
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Package Outlines and Parameters
8
Package Outlines and Parameters
Dimensions in mm
Figure 47
PG-TO252-5-311
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pbfree finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Table 9
Parameter
Value
Jedec humidity category acc. J-STD-020-D
MSL3
Jedec classification temperature acc. J-STD-020-D
260°C
Datasheet
36
Rev. 1.0, 2010-06-24
BTF50060-1TEA
Revision History
9
Revision History
Revision
Date
Changes
DS V1.0
2010-06-24
Initial datasheet version.
Datasheet
37
Rev. 1.0, 2010-06-24
Edition 2010-06-24
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2010 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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For further information on technology, delivery terms and conditions and prices, please contact the nearest
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