FDG1024NZ Dual N-Channel PowerTrench® MOSFET 20 V, 1.2 A, 175 mΩ Features General Description Max rDS(on) = 175 mΩ at VGS = 4.5 V, ID = 1.2 A This dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs. Since bias resistors are not required, this dual digital FET can replace several different digital transistors, with different bias resistor values. Max rDS(on) = 215 mΩ at VGS = 2.5 V, ID = 1.0 A Max rDS(on) = 270 mΩ at VGS = 1.8 V, ID = 0.9 A Max rDS(on) = 389 mΩ at VGS = 1.5 V, ID = 0.8 A HBM ESD protection level >2 kV (Note 3) Very low level gate drive requirements allowing operation in 3 V circuits (VGS(th) < 1.5 V) Very small package outline SC70-6 RoHS Compliant S2 G2 D1 S1 1 6 D1 G1 2 5 G2 D2 3 4 S2 D2 S1 G1 SC70-6 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage -Continuous ID TA = 25°C (Note 1a) -Pulsed PD TJ, TSTG Ratings 20 Units V ±8 V 1.2 6 Power Dissipation TA = 25°C (Note 1a) 0.36 Power Dissipation TA = 25°C (Note 1b) 0.30 Operating and Storage Junction Temperature Range -55 to +150 A W °C Thermal Characteristics RθJA Thermal Resistance, Junction to Ambient (Note 1a) 350 RθJA Thermal Resistance, Junction to Ambient (Note 1b) 415 °C/W Package Marking and Ordering Information Device Marking .24 Device FDG1024NZ ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B Package SC70-6 1 Reel Size 7” Tape Width 8 mm Quantity 3000 units www.fairchildsemi.com FDG1024NZ Dual N-Channel Power Trench® MOSFET August 2009 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1 µA IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V ±10 µA 1.0 V 20 V 14 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 µA ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 0.4 0.8 -3 mV/°C VGS = 4.5 V, ID = 1.2 A 160 175 VGS = 2.5 V, ID = 1.0 A 185 215 VGS = 1.8 V, ID = 0.9 A 232 270 VGS = 1.5 V, ID = 0.8 A 321 389 VGS = 4.5 V, ID = 1.2 A, TJ =125 °C 220 259 VDD = 5 V, ID = 1.2 A 4 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 10 V, VGS = 0 V, f = 1 MHz 115 150 pF 25 35 pF 20 25 pF Ω 4.6 Switching Characteristics td(on) Turn-On Delay Time 3.7 10 ns tr Rise Time 1.7 10 ns td(off) Turn-Off Delay Time 11 19 ns tf Fall Time 1.5 10 ns Qg Total Gate Charge 1.8 2.6 nC Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = 10 V, ID = 1.2 A, VGS = 4.5 V, RGEN = 6 Ω VGS = 4.5 V, VDD = 10 V, ID = 1.2 A 0.3 nC 0.4 nC Drain-Source Diode Characteristics IS Maximum Continuous Drain-Source Diode Forward Current VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 0.3 A 0.3 (Note 2) IF = 1.2 A, di/dt = 100 A/µs A 0.7 1.2 V 10 20 ns 1.9 10 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. a. 350 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 415 °C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%. 3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B 2 www.fairchildsemi.com FDG1024NZ Dual N-Channel Power Trench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 2.5 6 VGS = 3.5 V ID, DRAIN CURRENT (A) 5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4.5 V VGS = 2.5 V 4 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 3 VGS = 1.8 V 2 1 VGS = 1.5 V 0 0 0.4 0.8 1.2 1.6 VGS = 1.5 V VGS = 3.5 V 1.5 1.0 VGS = 4.5 V PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 0.5 2.0 0 1 2 3 4 5 6 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 600 ID = 1.2 A VGS = 4.5 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.6 -75 -50 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 2.5 V 2.0 VDS, DRAIN TO SOURCE VOLTAGE (V) PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 500 ID = 1.2 A 400 300 TJ = 125 oC 200 100 0 1.0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) TJ = 25 oC 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage 10 6 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 5 ID, DRAIN CURRENT (A) VGS = 1.8 V VDS = 5 V 4 3 TJ = 25 oC 2 TJ = 125 oC 1 VGS = 0 V 1 TJ = 125 oC TJ = 25 oC 0.1 TJ = -55 oC TJ = -55 oC 0.01 0.2 0 0 1 2 3 4 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B 3 1.4 www.fairchildsemi.com FDG1024NZ Dual N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 300 VGS, GATE TO SOURCE VOLTAGE (V) 5 ID = 1.2 A Ciss CAPACITANCE (pF) 4 VDD = 5 V 3 VDD = 10 V 2 VDD = 15 V 1 100 Coss 10 5 0.1 0 0 0.5 1.0 1.5 2.0 2.5 1 10 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 10 5 10 Ig, GATE LEAKAGE CURRENT (µA) THIS AREA IS LIMITED BY rDS(on) ID, DRAIN CURRENT (A) Crss f = 1 MHz VGS = 0 V 0.1 ms 1 1 ms 10 ms 0.1 SINGLE PULSE TJ = MAX RATED 100 ms RθJA = 415 oC/W 1s DC o TA = 25 C 0.01 0.01 0.1 1 10 VGS = 0 V 3 10 TJ = 125 oC 10 -1 10 TJ = 25 oC -3 10 100 0 VDS, DRAIN to SOURCE VOLTAGE (V) 2 4 6 8 10 12 14 VGS, GATE TO SOURCE VOLTAGE (V) Figure 9. Forward Bias Safe Operating Area Figure 10. Gate Leakage Current vs Gate to Source Voltage P(PK), PEAK TRANSIENT POWER (W) 100 VGS = 4.5 V SINGLE PULSE RθJA = 415 oC/W 10 TA = 25 oC 1 0.1 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B 4 www.fairchildsemi.com FDG1024NZ Dual N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 415 C/W 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B 5 www.fairchildsemi.com FDG1024NZ Dual N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted FDG1024NZ Dual N-Channel Power Trench® MOSFET Dimensional Outline and Pad Layout ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B 6 www.fairchildsemi.com tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I41 ©2009 Fairchild Semiconductor Corporation FDG1024NZ Rev.B 7 www.fairchildsemi.com FDG1024NZ Dual N-Channel Power Trench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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