FAIRCHILD FDS89161LZ

FDS89161LZ
Dual N-Channel PowerTrench® MOSFET
100 V, 2.7 A, 105 mΩ
Features
General Description
„ Max rDS(on) = 105 mΩ at VGS = 10 V, ID = 2.7 A
This
N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced Power Trench® process
that has been special tailored to minimize the on-state
resisitance and yet maintain superior switching performance.
G-S zener has been added to enhance ESD voltage level.
„ Max rDS(on) = 160 mΩ at VGS = 4.5 V, ID = 2.1 A
„ High performance trench technology for extremely low rDS(on)
„ High power and current handling capability in a widely used
surface mount package
Application
„ CDM ESD protection level > 2KV typical (Note 4)
„ DC-DC conversion
„ 100% UIL Tested
„ RoHS Compliant
D2
D2
D1
D1
G2
S2
G1
5
D2
6
D1
7
D1
S1
Pin 1
D2
8
Q2
Q1
4
G2
3
S2
2
G1
1 S1
SO-8
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Ratings
100
Units
V
VGS
Gate to Source Voltage
±20
V
Drain Current -Continuous
2.7
ID
Parameter
-Pulsed
15
Single Pulse Avalanche Energy
EAS
PD
TJ, TSTG
(Note 3)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
13
31
(Note1a)
Operating and Storage Junction Temperature Range
1.6
-55 to +150
A
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
(Note 1)
4.0
(Note 1a)
78
°C/W
Package Marking and Ordering Information
Device Marking
FDS89161LZ
Device
FDS89161LZ
©2011 Fairchild Semiconductor Corporation
FDS89161LZ Rev. C4
Package
SO-8
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
2500 units
www.fairchildsemi.com
FDS89161LZ Dual N-Channel PowerTrench® MOSFET
June 2011
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 80 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±10
μA
2.2
V
100
V
68
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 2.7 A
81
105
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 2.1 A
110
160
VGS = 10 V, ID = 2.7 A, TJ = 125 °C
140
182
VDS = 10 V, ID = 2.7 A
7.8
gFS
Forward Transconductance
1
1.7
-6
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 50 V, VGS = 0 V,
f = 1MHz
227
302
pF
44
58
pF
3
4
pF
Ω
0.9
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
Total Gate Charge
VGS = 0 V to 10 V
VGS = 0 V to 5 V
VDD = 50 V, ID = 2.7 A,
VGS = 10 V, RGEN = 6 Ω
Qg(TOT)
Total Gate Charge
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 50 V,
ID = 2.7 A
3.8
10
1.2
10
ns
ns
9.5
17
ns
1.6
10
ns
3.8
5.3
nC
2.1
2.9
nC
0.7
nC
0.7
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 2.7 A
(Note 2)
0.8
1.3
VGS = 0 V, IS = 2 A
(Note 2)
0.8
1.2
31
56
ns
20
36
nC
IF = 2.7 A, di/dt = 100 A/μs
V
NOTES:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a) 78°C/W when
mounted on a 1 in2
pad of 2 oz copper
b) 135°C/W when
mounted on a
minimun pad
2. Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C, L = 0.3 mH, IAS =25 A, VDD = 27 V, VGS = 10V.
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2011 Fairchild Semiconductor Corporation
FDS89161LZ Rev. C4
2
www.fairchildsemi.com
FDS89161LZ Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
4
VGS = 10 V
VGS = 8 V
VGS = 6 V
12
VGS =5 V
VGS = 4 V
9
6
VGS = 3.5 V
3
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
VGS = 3.5 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
15
3
VGS = 5 V
2
VGS = 6 V
1
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
5
0
3
VDS, DRAIN TO SOURCE VOLTAGE (V)
12
15
500
ID = 2.7 A
VGS = 10 V
1.8
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
9
VGS = 10 V
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
2.0
-50
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
400
300
TJ = 125 oC
200
100
TJ = 25 oC
IS, REVERSE DRAIN CURRENT (A)
VDS = 50 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
6
TJ = 150 oC
3
TJ
= 25 oC
2
TJ
= -55 oC
4
6
8
20
10
4
6
8
10
VGS = 0 V
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
0.001
0.0
10
TJ = -55 oC
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2011 Fairchild Semiconductor Corporation
FDS89161LZ Rev. C4
2
Figure 4. On-Resistance vs Gate to
Source Voltage
12
9
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS, GATE TO SOURCE VOLTAGE (V)
15
0
ID = 2.7 A
0
0.6
-75
Figure 3. Normalized On-Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
6
VGS = 8 V
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
0
VGS = 4 V
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDS89161LZ Dual N-Channel PowerTrench® MOSFET
Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted
400
VDD = 25 V
ID = 2.7 A
Ciss
8
100
VDD = 50 V
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = 75 V
4
Coss
10
2
0
f = 1 MHz
VGS = 0 V
0
1
2
3
4
5
1
Figure 7. Gate Charge Characteristics
4
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
100
Figure 8. Capacitance vs Drain
to Source Voltage
3.0
2.5
TJ
= 25 oC
2.0
TJ = 100 oC
1.5
3
VGS = 10 V
2
VGS = 6 V
1
o
RθJA = 78 C/W
TJ = 125 oC
1.0
0.01
0.1
1
0
25
2
50
-1
ID, DRAIN CURRENT (A)
VDS = 0 V
10
-4
10
TJ = 125 oC
-5
10
-6
10
TJ = 25 oC
-7
10
100 us
1
0.1
1 ms
THIS AREA IS
LIMITED BY rDS(on)
-8
10
0.01
0.005
0.1
-9
5
150
20
10
-3
0
125
Figure 10. Maximum Continuous Drain
Current vs Ambient Temperature
10
10
100
o
Figure 9. Unclamped Inductive
Switching Capability
-2
75
TA, Ambient TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
Ig, GATE LEAKAGE CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
10
Crss
1
0.1
10
15
20
25
30
35
100 ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 135 oC/W
1s
10 s
TA = 25 oC
DC
1
10
100
400
VDS, DRAIN to SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. Gate Leakage Current vs
Gate to Source Voltage
©2011 Fairchild Semiconductor Corporation
FDS89161LZ Rev. C4
10 ms
Figure 12. Forward Bias Safe
Operating Area
4
www.fairchildsemi.com
FDS89161LZ Dual N-Channel PowerTrench® MOSFET
Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted
P(PK), PEAK TRANSIENT POWER (W)
1000
100
10
SINGLE PULSE
o
RθJA = 135 C/W
1
o
TA = 25 C
0.5 -4
10
-3
-2
10
-1
10
10
1
2
10
3
10
10
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 135 C/W
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDS89161LZ Rev. C4
5
www.fairchildsemi.com
FDS89161LZ Dual N-Channel PowerTrench® MOSFET
Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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As used here in:
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2.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I54
©2011 Fairchild Semiconductor Corporation
FDS89161LZ Rev. C4
6
www.fairchildsemi.com
FDS89161LZ Dual N-Channel PowerTrench® MOSFET
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