SEMICONDUCTOR KML0D6NP20EA TECHNICAL DATA N and P-Ch Trench MOSFET General Description It’s Mainly Suitable for Load Switching Cell Phones, Battery Powered Systems and Level-Shifter. B C A 1 6 2 5 3 4 A1 FEATURES C B1 D ・N-Channel : VDSS=20V, ID=600mA (RDS(ON)=0.70Ω @ VGS=4.5V). : VDSS=20V, ID=500mA (RDS(ON)=0.85Ω @ VGS=2.5V). : VDSS=20V, ID=350mA (RDS(ON)=1.25Ω @ VGS=1.8V). P ・P-Channel P MILLIMETERS _ 0.05 1.6 + _ 0.05 1.0 + _ 0.05 1.6 + _ 0.05 1.2 + 0.50 _ 0.05 0.2 + _ 0.05 0.5 + _ 0.05 0.12 + 5 H : VDSS=-20V, ID=-400mA (RDS(ON)=1.2Ω @ VGS=-4.5V). P DIM A A1 B B1 C D H J J : VDSS=-20V, ID=-300mA (RDS(ON)=1.6Ω @ VGS=-2.5V). : VDSS=-20V, ID=-150mA (RDS(ON)=2.7Ω @ VGS=-1.8V). 1. Source 1 2. Gate 1 3. Drain 2 4. Source 2 5. Gate 2 6. Drain 1 TES6 MAXIMUM RATING (Ta=25℃) CHARACTERISTIC SYMBOL N-Ch P-Ch UNIT Drain-Source Voltage VDSS 20 -20 V Gate-Source Voltage VGSS ±6 ±6 V 515 -390 370 -280 DC @TA=25℃ Drain Current ID* DC @TA=85℃ Pulsed Source-Drain Diode Current Drain Power Dissipation Maximum Junction Temperature Storage Temperature Range Thermal Resistance, Junction to Ambient 650 -650 IS 450 -450 P D* 280 280 Lot No. Type Name mA IDP Marking A1 mW Tj 150 ℃ Tstg -55～150 ℃ RthJA* 446 ℃/W Note 1) *Surface Mounted on FR4 Board, t≤5sec PIN CONNECTION (TOP VIEW) S1 1 6 D1 1 6 G1 2 5 G2 2 5 D2 3 4 S2 3 4 2008. 9. 10 Revision No : 3 1/6 KML0D6NP20EA ELECTRICAL CHARACTERISTICS (Ta=25℃) CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage Drain Cut-off Current Gate Leakage Current Gate Threshold Voltage Drain-Source ON Resistance ON State Drain Current Forward Transconductance Source-Drain Diode Forward Voltage BVDSS ID=250μA, VGS=0V N-Ch 20 - - ID=-250μA, VGS=0V P-Ch -20 - - VGS=0V, VDS=16V N-Ch - 0.3 100 VGS=0V, VDS=-16V P-Ch - -0.3 -100 N-Ch - ±0.5 ±1.0 P-Ch - ±1.0 ±2.0 VDS=VGS, ID=250μA N-Ch 0.45 - 1.0 VDS=VGS, ID=-250μA P-Ch -0.45 - -1.0 VGS=4.5V, ID=600mA N-Ch - 0.41 0.70 VGS=-4.5V, ID=-350mA P-Ch - 0.80 1.20 VGS=2.5V, ID=500mA N-Ch - 0.53 0.85 VGS=-2.5V, ID=-300mA P-Ch - 1.20 1.60 VGS=1.8V, ID=350mA N-Ch - 0.70 1.25 VGS=-1.8V, ID=-150mA P-Ch - 1.80 2.70 VGS=4.5V, VDS=5V N-Ch 700 - - VGS=-4.5V, VDS=-5V P-Ch -700 - - VDS=10V, ID=400mA N-Ch - 1.0 - VDS=-10V, ID=-250mA P-Ch - 0.4 - IS=150mA, VGS=0V N-Ch - 0.8 1.2 IS=-150mA, VGS=0V P-Ch - -0.8 -1.2 N-Ch - 750 - P-Ch - 1500 - N-Ch - 75 - P-Ch - 150 - N-Ch - 225 - P-Ch - 450 - N-Ch - 5 - P-Ch - 5 - N-Ch - 25 - P-Ch - 35 - V IDSS IGSS Vth RDS(ON)* nA μA VGS=±4.5V, VDS=0V V ID(ON)* Ω mA gfs* S VSD* V Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-on Delay time Turn-off Delay time Qg* Qgs* N-Ch : VDS=10V, ID=250mA, VGS=4.5V P-Ch : VDS=-10V, ID=-250mA, VGS=-4.5V pC Qgd* td(on)* td(off)* N-Ch : VDD=10V, ID=200mA, VGS=4.5V, RG=10Ω P-Ch : VDD=-10V, VGS=-4.5V, ID=-200mA, RG=10Ω ns Note 2) *Pulse test : Pulse width≤300㎲, Duty Cycle≤2%. 2008. 9. 10 Revision No : 3 2/6 KML0D6NP20EA N-Channel Fig 2. RDS(on) - ID Drain Current ID (A) 1.0 VGS=2.5V VGS=1.8V 0.8 VGS=2.0V 0.6 VGS=5,4,3V 0.4 0.2 VGS=1.0V 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Drain-Source On Resistance RDS(on) (Ω) Fig 1. ID - VDS 4.0 3.2 2.4 1.6 0.0 VGS=4.5V 0 0.2 0.4 Drain - Source Voltage VDS (V) Drain Current ID (A) -55 C TC=125 C 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 Gate - Source Voltage VGS (V) Normalized Drain-Source On Resistance RDS(on) (Ω) 1.0 25 C Reverse Drain Current IDR (mA) Gate Threshold Voltage Vth (V) ID = 250µA 0.2 0.1 -0.0 -0.1 -0.2 0 25 50 75 Junction Temperature Tj ( C) 2008. 9. 10 1.0 1.6 VGS = 4.5V ID = 350mA 1.4 1.2 1.0 0.8 0.6 -50 -25 0 25 50 75 100 125 1.2 1.4 Junction Temperature Tj ( C) Fig 6. IDR - VSDF 0.3 -25 0.8 Fig 4. RDS(ON) - Tj Fig 5. Vth - Tj -0.3 -50 0.6 Drain - Current ID (A) Fig 3. ID - VGS 0.8 VGS=1.8V VGS=2.5V 0.8 Revision No : 3 100 125 1000 Tj=125 C 100 25 C 50 C 10 1 0.0 0.2 0.4 0.6 0.8 1.0 Source - Drain Forward Voltage VSDF (V) 3/6 KML0D6NP20EA Fig 7. VGS - Qg 100 VDS = 10V ID = 250mA VGS = 0V f = 1MHz 4 Capacitance C (pF) Gate - Source Voltage VGS (V) 5 Fig 8. C - VDS 3 2 1 80 Ciss 60 40 Coss 20 Crss 0 0 0.2 0.0 0.4 0 0.8 0.6 Normalized Effective Transient Thermal Resistance 8 12 16 20 Drain - Source Voltage VDS (V) Total Gate - Charge Qg (nC) 2008. 9. 10 4 Fig 9. Transient Thermal Response Curve 100 Duty=0.5 0.2 PDM 0.1 10-1 t1 0.05 t2 0.02 10-2 10-4 - Duty cycle D = t1/t2 - Per Unit Base = RthJA = 500 C /W SINGLE 10-3 10-2 10-1 100 101 102 103 Square Wave Pulse Duration (sec) Revision No : 3 4/6 KML0D6NP20EA P-Channel Fig 2. RDS(on) - ID 1.0 VGS=4V VGS=3V VGS=2.5V 0.8 0.6 VGS=2V 0.4 VGS=1.8V 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 2.4 VGS=1.8V 1.6 VGS=2.5V 0.8 0.0 VGS=4.5V 0 0.2 25 C 0.6 TC=125 C 0.4 0.2 0.5 1.0 1.5 2.0 2.5 3.0 Gate - Source Voltage VGS (V) 1.6 Reverse Drain Current IDR (mA) Gate Threshold Voltage Vth (V) ID = 250µA 0.2 0.1 -0.0 -0.1 -0.2 0 25 50 1.0 1.4 1.2 1.0 0.8 0.6 -50 -25 0 25 50 75 100 125 1.2 1.4 Junction Temperature Tj ( C) Fig 6. IDR - VSDF 0.3 75 Junction Temperature Tj ( C) 2008. 9. 10 0.8 VGS = 4.5V ID = 350mA Fig 5. Vth - Tj -25 0.6 Fig 4. RDS(ON) - Tj 0.8 -0.3 -50 0.4 Fig 3. ID - VGS -55 C Drain Current ID (A) 3.2 Drain - Current ID (A) 1.0 0.0 0.0 4.0 Drain - Source Voltage VDS (V) Normalized Drain-Source On Resistance RDS(on) (Ω) Drain Current ID (A) VGS=5V Drain-Source On Resistance RDS(on) (Ω) Fig 1. ID - VDS Revision No : 3 100 125 1000 Tj=125 C 25 C 100 -55 C 10 1 0.0 0.2 0.4 0.6 0.8 1.0 Source - Drain Forward Voltage VSDF (V) 5/6 KML0D6NP20EA Fig 7. VGS - Qg 120 5 VDS = 10V ID = 250mA VGS = 0V f = 1MHz 100 4 Capacitance C (pF) Gate - Source Voltage VGS (V) Fig 8. C - VDS 3 2 1 Ciss 80 60 40 Coss 20 Crss 0 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 1.6 Normalized Effective Transient Thermal Resistance 8 12 16 20 Drain - Source Voltage VDS (V) Total Gate - Charge Qg (nC) 2008. 9. 10 4 Fig 9. Transient Thermal Response Curve 100 Duty=0.5 0.2 PDM 0.1 10-1 t1 0.05 t2 0.02 10-2 10-4 - Duty cycle D = t1/t2 - Per Unit Base = RthJA = 500 C /W SINGLE 10-3 10-2 10-1 100 101 102 103 Square Wave Pulse Duration (sec) Revision No : 3 6/6