TQP3M9038 High Linearity LNA Gain Block Applications Repeaters Mobile Infrastructure Defense/Aerospace LTE / WCDMA / EDGE / CDMA General Purpose Wireless IF amplifier, RF driver amplifier 3x3 mm 16 Pin QFN Package Product Features Functional Block Diagram 50−4000 MHz Operating Range Flat gain (14.7 ± 0.3 dB) from 50 to 3500 MHz +39.5 dBm Output IP3 2 dB Noise Figure at 1900 MHz 50 Ω gain block; No RF matching required Unconditionally stable +5V Single Supply, 85 mA Current 3x3mm 16 pin QFN plastic package General Description Pin Configuration The TQP3M9038 is a cascadable, high linearity gain block amplifier in a low-cost surface-mount package. At a frequency of 1900 MHz, the amplifier typically provides 15 dB gain, +40 dBm OIP3, and 2 dB Noise Figure while only drawing 85 mA current. The device is housed in a lead-free/green /RoHS-compliant QFN Package. Pin No. Symbol 2 11 All other pins Backside paddle RF IN RF OUT/BIAS N/C RF/DC GND The TQP3M9038 has the benefit of having excellent gain flatness across a broad range of frequencies. The low noise figure and high linearity performance allows the device to be used in both receiver and transmitter chains for high performance systems. The amplifier is internally matched using a high performance E-pHEMT process and only requires an external RF choke and blocking/bypass capacitors for operation from a single +5V supply. The internal active bias circuit also enables stable operation over bias and temperature variations. The TQP3M9038 covers the 50−4000 MHz frequency band and is targeted for wireless infrastructure or other applications requiring high linearity and/or low noise figure. Ordering Information Part No. Description TQP3M9038 TQP3M9038-PCB_IF TQP3M9038-PCB_RF High Linearity LNA Gain Block 50−500 MHz Eval. Board 500−4000 MHz Eval. Board Standard T/R size = 2500 pieces on a 7” reel. Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. - 1 of 8 - Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block Absolute Maximum Ratings Recommended Operating Conditions Parameter Rating Parameter Storage Temperature Supply Voltage (VDD) RF Input Power, CW, 50Ω,T = 25°C Reverse Device Voltage -65 to +150°C +7 V +23 dBm -0.3 V Supply Voltage (VDD) +4.75 TCASE -40 6 TJ (for >10 hours MTTF) Operation of this device outside the parameter ranges given above may cause permanent damage. Min Typ Max Units +5 +5.25 +85 190 V °C °C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: VDD =+5V, Temp=+25°C, 50 Ω system Parameter Conditions Operational Frequency Range Test Frequency Gain Input Return Loss Output Return Loss Noise Figure Output P1dB Output IP3 Current, IDD Thermal Resistance, θjc Min Typ 50 13 Pout=+4 dBm/tone, ∆f=1 MHz +35.5 1900 14.9 21 23 2 +21.6 +39.5 85 Channel to case Max Units 4000 MHz MHz dB dB dB dB dBm dBm µA °C/W 16 100 36.6 Device Characterization Data S-Parameters Test conditions unless otherwise noted: VDD=+5 V, IDD=85 mA (typ.), Temp=+25°C, 50 Ohm system Freq (MHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang) 10 20 50 100 200 500 900 1000 1500 1900 2000 2500 3000 3500 4000 -12.2 -13.5 -15.9 -20.7 -25.5 -28.6 -27.0 -26.3 -23.4 -21.9 -21.4 -21.0 -20.6 -18.8 -17.9 -61.9 -39.4 -50.9 -73.2 -85.5 -91.1 -99.7 -101.9 -117.6 -130.7 -136.1 -141.8 -147.7 -174.7 170.3 17.7 17.2 16.4 15.9 15.5 15.4 15.3 15.3 15.2 15.1 15.1 15.1 15.0 15.0 15.0 167.0 169.7 168.8 167.6 163.8 146.9 122.7 116.5 85.5 66.6 60.2 53.9 47.5 21.3 7.9 -20.6 -20.4 -19.6 -19.1 -18.9 -18.8 -19.0 -19.0 -19.3 -19.5 -19.6 -19.7 -19.8 -20.1 -20.3 12.1 10.0 6.6 1.7 -4.6 -18.2 -34.2 -38.2 -58.3 -70.6 -74.8 -79.0 -83.2 -100.5 -109.3 -17.9 -17.5 -20.1 -22.8 -24.8 -27.2 -29.8 -30.7 -28.7 -24.6 -23.5 -22.4 -21.4 -18.1 -16.6 -94.7 -52.1 -79.8 -112.9 -144.3 -177.2 175.9 179.6 -137.4 -131.1 -131.5 -132.7 -134.4 -143.2 -149.0 Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. - 2 of 8 - Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block TQP3M9038-PCB_(RF / IF) Evaluation Board Notes: 1. See Evaluation Board PCB Information section for material and stack-up. 2. Package pins 3 through 9 and 13 through 16 are grounded for PCB mounting integrity and optimal isolation. 3. B1 (0 Ω jumper) may be replaced with copper trace in the target application layout. 4. The recommended component values are dependent upon the frequency of operation. 5. All components are 0603 size unless stated on the schematic. Bill of Material - TQP3M9038-PCB_(RF / IF) Reference Designation TQP3M9038-PCB_IF 50−500 MHz Q1 TQP3M9038-PCB_RF 500−4000 MHz TQP3M9038 C2, C6 1000 pF 100 pF C1 0.01 uF 0.01 uF L2 330 nH 68 nH L1, D1, C3, C4 Do Not Place B1 0Ω Performance may be further optimized at frequency of interest by using recommended component values given below. Reference Designation 500 MHz 2000 MHz 2500 MHz 3500 MHz C2, C6 100 pF 22 pF 22 pF 22 pF L2 82 nH 22 nH 18 nH 15 nH Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. - 3 of 8 - Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block Typical Performance - TQP3M9038-PCB_RF Test conditions unless otherwise noted: VDD =+5V, IDD=+85 mA (typ.), Temp=+25°C Parameter Typical Performance Frequency Gain Input Return Loss Output Return Loss Output P1dB OIP3 (1) Noise Figure (2) 500 15.2 -19.2 -17.9 +21.7 +41.1 1.7 900 15.1 -24.0 -20.0 +21.9 +41.4 1.8 1900 14.9 -20.9 -22.6 +21.6 +39.5 1.9 2700 14.5 -13.7 -12.8 +20.6 +38.0 2.2 Units 3500 14.5 -14.5 -11.3 +19.8 +35.3 2.8 4000 14.5 -16.1 -12.0 +18.5 +32.3 3.0 MHz dB dB dB dBm dBm dB Notes: 1. OIP3 measured with two tones at an output power of +4 dBm / tone separated by 1 MHz. 2. Noise figure data shown in the table above includes board losses of 0.1dB @ 2000 MHz. Performance Plots - TQP3M9038-PCB_RF Gain vs. Frequency 18 Input Return Loss vs. Frequency 0 Output Return Loss vs. Frequency 0 +85°C +85°C 14 12 +85°C +25°C -20°C 10 -40°C 8 +25°C -5 -10 -20°C -40°C -10 -15 1000 1500 2000 2500 3000 3500 -20 -25 -25 4000 -30 500 1000 1500 Frequency (MHz) 2500 3000 3500 4000 500 1000 1500 2000 2500 3000 3500 4000 Frequency (MHz) P1dB vs. Frequency 25 Freq = 1900 MHz 1 MHz tone Spacing NF vs. Frequency 5 +85°C +25°C 23 35 +85°C 4 - 20°C - 40°C +85°C 21 NF (dB) P1db (dBm) 40 OIP3 (dBm) 2000 Frequency (MHz) OIP3 vs. Pout/tone 45 -20°C -40°C -15 -20 -30 500 +25°C -5 |S22| (dB) |S11| (dB) Gain (dB) 16 19 +25°C 3 −20°C −40°C 2 +25°C 30 - 20°C - 40°C 17 25 1 15 0 1 2 3 4 5 6 7 Pout/Tone (dBm) Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. 8 0 500 1000 1500 2000 2500 Frequency (MHz) - 4 of 8 - 3000 3500 4000 500 1000 1500 2000 2500 3000 3500 4000 Frequency (MHz) Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block Typical Performance - TQP3M9038-PCB_IF Test conditions unless otherwise noted: VDD =+5V, IDD=+85 mA (typ.), Temp=+25°C Parameter Typical Performance Frequency Units 70 100 200 500 MHz Gain 15.9 15.7 15.4 15.2 dB Input Return Loss -12.3 -15.0 -20.4 -26.4 dB Output Return Loss -23.0 -24.5 -22.4 -21.4 dB Output P1dB +20.9 +21.0 +21.0 +21.3 dBm (1) +39.5 +39.7 +40.7 +40.0 dBm 1.65 1.75 1.75 1.70 dB OIP3 Noise Figure [2] Notes: 1. OIP3 measured with two tones at an output power of +6 dBm / tone separated by 1 MHz. 2. Noise figure data shown in the table above includes board losses. Performance Plots - TQP3M9038-PCB_IF Test conditions unless otherwise noted: VDD =+5V, IDD=+85 mA (typ.), |S11| (dB) Gain (dB) 16 15 +85°C +25°C 14 Input Return Loss vs. Frequency 0 40°C -5 -5 -10 -10 +85°C -15 +25°C 40°C -20 13 100 200 300 400 100 Frequency (MHz) Pout / tone=+6 dBm 1 MHz tone spacing 200 300 33 300 400 Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. 500 400 500 4 21 +85°C 3 +25°C −40°C 2 1 17 200 Frequency (MHz) 300 −40°C 19 35 200 NF vs. Frequency 5 NF (dB) P1dB (dBm) 37 100 100 Frequency (MHz) +25°C 23 39 0 0 +85°C +25°C −40°C OIP3 (dBm) 500 P1dB vs. Frequency 25 +85°C 41 400 Frequency (MHz) OIP3 vs. Frequency 43 40°C -30 0 500 +25°C -25 -30 0 +85°C -15 -20 -25 12 Output Return Loss vs. Frequency 0 |S22| (dB) Gain vs. Frequency 17 0 0 100 200 300 Frequency (MHz) - 5 of 8 - 400 500 0 100 200 300 400 500 Frequency (MHz) Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block Pin Configuration and Description N/C N/C N/C N/C Pin 1 Reference Mark 16 15 14 13 RF In 2 11 RF Out/Bias N/C 3 10 N/C N/C 4 9 N/C 5 6 7 8 N/C N/C N/C 12 N/C 1 N/C N/C Backside Paddle - RF/DC GND Pin No. 2 Symbol RF IN 11 RF OUT DC BIAS All other pins Backside paddle Description RF input, matched to 50 ohms. External DC Block is required. RF output, matched to 50 ohms. Bias voltage and external DC Block are required. No electrical connection. Provide grounded land pads for PCB mounting N/C i i RF/DC ground. Use recommended via pattern to minimize inductance and RF/DC GND thermal resistance; see PCB Mounting Pattern for suggested footprint. Evaluation Board PCB Information TriQuint PCB 1076342 Material and Stack-up 50 ohm line dimensions: width = .031”, spacing = .035 Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. - 6 of 8 - Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block Mechanical Information Package Marking and Dimensions Marking: Part number – 9038 Date Code – YYWW Assembly Code – aXXXX 1.70±0.05 Exp.DAP Pin 1 Locator PIN #1 IDENTIFICATION CHAM FER 0.300 X 45° 3.00±0.05 0.23±0.05 9038 YYWW aXXXX 3.00±0.05 1.70±0.05 Exp.DAP 0.50 Bsc 0.38±0.05 Top View GND/Therm al Pad 1.50 Ref. Bottom View 0.85±0.05 0.000-0.050 .20 Ref. Side View NOTES: 1. All dimensions are in millimeters. Angles are in degrees. 2. Except where noted, this part outline conforms to JEDEC standard MO-220, Issue E (Variation VGGC) for thermally enhanced plastic very thin fine pitch quad flat no lead package (QFN). 3. Dimension and tolerance formats conform to ASME Y14.4M-1994. 4. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012. PCB Mounting Pattern 1.50 Pin 1 Locator Package Outline 0.31 7X 3 0.32 0.09 16X 0.52 0.64 1.50 16X 0.32 0.55 0.50 Pitch 16X COMPONENT SIDE NOTES: 1. All dimensions are in millimeters. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. Vias are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25 mm (0.10”). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance. Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. - 7 of 8 - Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network TQP3M9038 High Linearity LNA Gain Block Product Compliance Information Solderability ESD Sensitivity Ratings Compatible with both lead-free (260°C max. reflow temperature) and tin/lead (245°C max. reflow temperature) soldering processes. ESD Rating: Value: Test: Standard: Class 1A Passes ≥ 250 V to < 500 V Human Body Model (HBM) JEDEC Standard JESD22-A114 ESD Rating: Value: Test: Standard: Class IV Passes 1000 V min. Charged Device Model (CDM) JEDEC Standard JESD22-C101 Package contact plating: Annealed Matte Tin RoHs Compliance This part is compliant with EU 2002/95/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). MSL Rating MSL Rating: Level 1 Test: 260°C convection reflow Standard: JEDEC Standard IPC/JEDEC J-STD-020 This product also has the following attributes: Lead Free Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (C15H12Br402) Free PFOS Free SVHC Free Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: [email protected] Tel: Fax: For technical questions and application information: +1.503.615.9000 +1.503.615.8902 Email: [email protected] Important Notice The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or lifesustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Data Sheet: Rev C 12/13/2012 © 2012 TriQuint Semiconductor, Inc. - 8 of 8 - Disclaimer: Subject to change without notice ® Connecting the Digital World to the Global Network