TRIQUINT TQP3M9008

TQP3M9008
High Linearity LNA Gain Block
Applications
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


Repeaters
Mobile Infrastructure
LTE / WCDMA / EDGE / CDMA
General Purpose Wireless
3-pin SOT-89 Package
Product Features


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Functional Block Diagram
50-4000 MHz
20.6 dB Gain @ 1.9 GHz
+36 dBm Output IP3
1.3 dB Noise Figure @ 1.9 GHz
50 Ohm Cascadable Gain Block
Unconditionally stable
High input power capability
+5V Single Supply, 85 mA Current
SOT-89 Package
GND
4
General Description
1
2
3
RF IN
GND
RF OUT
Pin Configuration
The TQP3M9008 is a cascadable, high linearity gain
block amplifier in a low-cost surface-mount package.
At 1.9 GHz, the amplifier typically provides 20.6 dB
gain, +36 dBm OIP3, and 1.3 dB Noise Figure while
only drawing 85 mA current. The device is housed in
a leadfree/green/RoHS-compliant industry-standard
SOT-89 package using a NiPdAu plating to eliminate
the possibility of tin whiskering.
Pin #
Symbol
1
3
2, 4
The TQP3M9008 has the benefit of having high gain
across a broad range of frequencies while also
providing very low noise. This allows the device to be
used in both receiver and transmitter chains for high
performance systems. The amplifier is internally
matched using a high performance E-pHEMT process
and only requires an external RF choke and
blocking/bypass capacitors for operation from a single
+5V supply. The internal active bias circuit also
enables stable operation over bias and temperature
variations.
RF Input
RF Output / Vcc
Ground
Ordering Information
Part No.
The TQP3M9008 covers the 0.05-4 GHz frequency
band and is targeted for wireless infrastructure or
other applications requiring high linearity and/or low
noise figure.
Description
TQP3M9008
High Linearity LNA Gain Block
TQP3M9008-PCB_IF
TQP3M9008 EVB 0.05-0.5 GHz
TQP3M9008-PCB_RF
TQP3M9008 EVB 0.5-4 GHz
Standard T/R size = 1000 pieces on a 7” reel.
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
- 1 of 10-
Disclaimer: Subject to change without notice
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TQP3M9008
High Linearity LNA Gain Block
Specifications
Absolute Maximum Ratings
Recommended Operating Conditions
Parameter
Rating
Parameter
Storage Temperature
-65 to +150 °C
Vdd
RF Input Power, CW,50 Ω,T = 25°C
+23 dBm
T(case)
Device Voltage,Vdd
+7 V
Reverse Device Voltage
-0.3V
Min
+3
Typ Max Units
+5
+5.25
V
85
°C
190
°C
-40
6
Tj (for>10 hours MTTF)
Operation of this device outside the parameter ranges
given above may cause permanent damage.
Electrical specifications are measured at specified test conditions.
Specifications are not guaranteed over all recommended operating
conditions.
Electrical Specifications
Test conditions unless otherwise noted: +25°C, +5V Vsupply, 50 Ω system.
Parameter
Conditions
Operational Frequency Range
Test Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3
© 2012 TriQuint Semiconductor, Inc.
Typical
50
19
Pout= 3 dbm/tone, Δf= 1 MHz
Noise Figure
Vdd
Current, Idd
Thermal Resistance
(junction to base) θjb
Data Sheet: Rev. J
Min
+32.5
1900
20.6
Units
4000
MHz
MHz
dB
22
16
17
+20
+36
1.3
+5
85
- 2 of 10-
Max
dB
dB
dBm
dBm
dB
V
100
mA
38.7
°C/W
Disclaimer: Subject to change without notice
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TQP3M9008
High Linearity LNA Gain Block
Device Characterization
Vdd = +5 V, Idd = 85 mA, T = +25 °C, calibrated to device leads
Freq (MHz)
S11 (dB)
S11 (ang)
S21 (dB)
S21 (ang)
S12 (dB)
S12 (ang)
S22 (dB)
S22 (ang)
50
-12.52
-170.01
23.61
172.94
-26.71
0.57
-9.82
177.18
100
-11.90
-175.09
23.48
167.73
-26.65
-1.85
-9.88
171.87
200
-11.41
177.96
23.07
159.45
-26.63
-5.51
-10.01
162.15
400
-11.36
166.96
22.66
144.06
-26.65
-12.85
-10.48
145.49
600
-11.58
154.05
22.31
129.39
-26.65
-19.62
-10.67
129.34
800
-11.76
147.21
21.98
114.61
-26.71
-26.09
-11.30
111.77
1000
-12.33
139.09
21.71
99.52
-26.78
-33.35
-12.37
94.27
1200
-12.65
132.05
21.41
85.59
-26.92
-39.92
-13.06
77.75
1400
-13.27
126.25
21.02
70.96
-27.11
-47.72
-14.33
58.69
1600
-13.58
116.91
20.78
56.21
-27.39
-56.48
-15.41
36.83
1800
-13.92
110.23
20.45
41.84
-27.60
-63.31
-16.28
15.29
2000
-14.30
103.50
20.30
27.87
-28.05
-71.56
-17.53
-11.21
2200
-15.07
94.63
19.92
13.81
-28.50
-80.24
-18.03
-39.05
2400
-15.75
85.16
19.71
-1.08
-28.73
-88.86
-17.43
-65.92
2600
-16.78
72.66
19.45
-15.98
-29.42
-96.81
-16.62
-94.17
2800
-18.00
55.24
19.22
-31.32
-29.90
-105.73
-14.89
-115.00
3000
-19.76
25.52
18.95
-46.86
-30.63
-117.08
-14.06
-131.67
3200
-19.90
-16.80
18.64
-63.51
-31.00
-128.03
-13.12
-148.29
3400
-17.79
-58.97
18.31
-80.47
-31.77
-139.44
-12.40
-160.20
3600
-14.26
-90.75
17.71
-98.47
-32.84
-154.36
-11.92
-173.86
3800
-11.29
-114.34
16.98
-117.12
-33.98
-168.14
-11.23
174.45
4000
-8.73
-132.65
16.09
-135.80
-34.80
173.11
-10.66
167.57
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
- 3 of 10-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9008
High Linearity LNA Gain Block
Application Circuit Configuration
J3
GND
Vdd
B1
C1
C2
L2
C1
Q1
L2
C6
J1
C2
C6
J2
Q1
RF
Input
RF
Output
Backside
Paddle
Ground
Notes:
1. See PC Board Layout, page 8 for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. B1 (0 Ω jumper) may be replaced with copper trace in the target application layout.
4. The recommended component values are dependent upon the frequency of operation.
5. All components are of 0603 size unless stated on the schematic.
Bill of Material
Frequency (MHz)
TQP3M9008-PCB_IF
TQP3M9008-PCB_RF
50 - 500
500 - 4000
Reference Designation
Q1
TQP3M9008
C2, C6
1000 pF
100 pF
C1
0.01 uF
0.01 uF
L2
330 nH
68 nH
D1
Do Not Place
B1
0Ω
Performance can be optimized at frequency of interest by using recommended component values shown in the table below.
Reference
Designation
C2, C6
L2
500
100 pF
82 nH
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
Frequency (MHz)
2000
2500
3500
22 pF
22 nH
22 pF
15 nH
- 4 of 10-
22 pF
18 nH
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TQP3M9008
High Linearity LNA Gain Block
Typical Performance TQP3M9008-PCB_RF
Test conditions unless otherwise noted: +25°C, +5V, 85 mA, 50 Ω system.
Frequency
MHz
500
900
1900
2700
3500
4000
Gain
Input Return Loss
Output Return Loss
Output P1dB
dB
dB
dB
dBm
22.8
10
9.5
+20.9
22.3
12
12
+19.7
20.6
16
17
+19.9
19.0
18
13
+19.4
17.6
10
12.4
+19.7
16.0
7.3
14
+18.5
OIP3 [1]
Noise Figure [2]
dBm
dB
+37.5
1.1
+37.6
1.1
+36
1.3
+35.3
1.6
+34.7
2
+33.7
2.5
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz.
2. Noise figure data shown in the table above is measured on evaluation board which includes board losses of around 0.1dB @ 2 GHz.
RF Performance Plots
Gain vs. Frequency over Temp
-40 C
-20 C
+25 C
+85⁰C
+85 C
+25 C
-40 C
-20⁰C
-10
18
-15
16
-20
14
1500
2000
2500
3000
3500
4000
-20
500
1000
1500
2500
3000
3500
OIP3 vs. Pout/tone over Temp
Noise Figure vs. Frequency over Temp
4
OIP3 (dBm)
2
1
0
2500
3000
3500
Frequency (MHz)
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
4000
3500
4000
1 MHz tone spacing, 3 dBm/tone
+25 C
+85 C
-40 C
+25 C
+85 C
-40 C
40
35
35
30
25
2000
2000 2500 3000
Frequency (MHz)
OIP3 vs. Frequency over Temp
30
1500
1500
45
40
+85 C
+25 C
-40 C
1000
1000
F=1900 MHz, 1 MHz tone spacing
45
500
500
4000
Frequency (MHz)
Frequency (MHz)
3
2000
OIP3 (dBm)
1000
-10
-15
-25
500
-40 C
-20 C
+25 C
+85⁰C
-5
S22 (dB)
20
0
-5
S11 (dB)
Gain (dB)
22
NF (dB)
S22 vs. Frequency over Temp
S11 vs. Frequency over Temp
0
24
25
0
3
6
Pout/tone (dBm)
- 5 of 10-
9
12
500
1000
1500
2000 2500 3000
Frequency (MHz)
3500
4000
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
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TQP3M9008
High Linearity LNA Gain Block
RF Performance Plots
Idd vs. Temperature
P1dB vs. Frequency over Temp
22
90
20
85
CW Signal
OIP2 vs. Frequency
55
Pout = 3 dBm / tone, 1 MHz spacing, +5V, +25C
18
-40 C
+25 C
+85 C
16
OIP2 (dBm)
Idd (mA)
P1dB (dBm)
50
80
35
70
1000
1500
2000
2500
3000
3500
4000
30
-40
-15
10
Frequency (MHz)
45
35
60
85
0
1000 1500 2000 2500 3000 3500 4000
Frequency (MHz)
P1dB vs. Vdd
30
Noise Figure vs. Vdd
3.0
Pout/tone = 3dBm
Tone spacing = 1MHz
2.5
25
35
30
1900 MHz
900 MHz
2.0
NF (dB)
1900MHz
900MHz
P1dB (dBm)
OIP3 (dBm)
500
Temperature (°C)
OIP3 vs. Vdd
40
40
75
14
500
45
20
1900MHz
900MHz
1.5
1.0
15
0.5
25
10
3
4
5
6
7
0.0
3
4
Vdd (Volts)
5
6
7
Vdd (Volts)
3
4
5
6
7
Vdd (Volts)
Idd vs Vdd
90
Idd (mA)
85
80
75
70
65
3
4
5
6
7
Vdd (Volts)
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
- 6 of 10-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9008
High Linearity LNA Gain Block
Typical Performance TQP3M9008-PCB_IF
Test conditions unless otherwise noted: +25ºC, +5V, 85 mA, 50 Ω system.
Frequency
MHz
70
100
200
500
Gain
Input Return Loss
Output Return Loss
Output P1dB
OIP3 [1]
dB
dB
dB
dBm
dBm
23.2
10
9
+19.8
+37
23.2
11
9
+20.2
+37
22.9
11
10
+19.9
+37
22.3
11
10
+19.9
+37
dB
1.2
1.1
0.8
1.1
Noise Figure [2]
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz.
2. Noise figure data shown in the table above is measured on evaluation board which includes board losses of around 0.1 dB @ 2 GHz.
IF Performance Plots
Gain vs. Frequency over Temp
-40 ⁰C
-20 C
+25 C
+85 C
21
-40 C
-20 C
+25 C
+85⁰C
19
-10
15
-20
-20
100
200
300
400
500
0
100
200
300
Frequency (MHz)
Frequency (MHz)
45
3
40
OIP3 (dBm)
+85 C
+25 C
-40 C
1
0
200
300
400
Frequency (MHz)
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
500
200
300
400
500
P1dB vs. Frequency over Temp
1 MHz tone spacing, 3 dBm/tone
22
-40 C
+25 C
+85 C
20
35
18
-40 C
+25 C
+85 C
16
14
25
100
100
Frequency (MHz)
30
0
0
500
OIP3 vs. Frequency over Temp
Noise Figure vs. Frequency over Temp
4
2
400
P1dB (dBm)
0
-10
-15
-15
17
-20 C
-40 C
+25 C
+85⁰C
-5
S22 (dB)
-5
S11 (dB)
Gain (dB)
0
0
23
NF (dB)
S22 vs. Frequency over Temp
S11 vs. Frequency over Temp
25
0
100
200
300
Frequency (MHz)
- 7 of 10-
400
500
0
100
200
300
400
500
Frequency (MHz)
Disclaimer: Subject to change without notice
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TQP3M9008
High Linearity LNA Gain Block
Pin Description
GND
4
1
2
3
RF IN
GND
RF OUT
Pin
Symbol
Description
1
RF IN
Input, matched to 50 ohms. External DC Block is required.
2, 4
GND
RF/DC Ground Connection
3
RFout / Vdd
Output, matched to 50 ohms, External DC Block is required and supply voltage
Evaluation Board PCB
PC Board Layout
TriQuint PCB 1075825 Material and Stack Up
1 oz. Cu top layer
0.014"
Nelco N-4000-13
1 oz. Cu inner layer
0.062 ± 0.006
Finished Board
Thickness
Nelco N-4000-13
εr=3.7 typ.
1 oz. Cu inner layer
0.014"
Nelco N-4000-13
1 oz. Cu bottom layer
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
- 8 of 10-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9008
High Linearity LNA Gain Block
Mechanical Information
Package Information and Dimensions
Markings:
Part number: 3M9008
Assembly code: ‘Y’ is last digit of part
manufacture year. ‘XXX’ is lot code.
3M9008
YXXX
PCB Mounting Pattern
All dimensions are in millimeters (inches). Angles are in degrees.
Notes:
1. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 /
.0135”) diameter drill and have a final plated thru diameter of .25 mm (.010”).
2. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance.
3. RF trace width depends upon the PC board material and construction.
4. Use 1 oz. Copper minimum.
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
- 9 of 10-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®
TQP3M9008
High Linearity LNA Gain Block
Product Compliance Information
ESD Sensitivity Ratings
Solderability
Compatible with both lead-free (260°C max. reflow
temp.) and lead (245°C max. reflow temp.)
soldering processes.
ESD Rating:
Value:
Test:
Standard:
1A
Passes  250V to < 500 V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
Package lead plating: NiPdAu
RoHs Compliance
This part is compliant with EU 2002/95/EC RoHS
directive (Restrictions on the Use of Certain
Hazardous Substances in Electrical and Electronic
Equipment).
ESD Rating: IV
Value:
Passes  1000 V
Test:
Charged Device Model (CDM)
Standard:
JEDEC Standard JESD22-C101
This product also has the following attributes:
 Lead Free
 Halogen Free (Chlorine, Bromine)
 Antimony Free
 TBBP-A (C15H12Br402) Free
 PFOS Free
 SVHC Free
MSL Classification
MSL Rating:
Floor Life:
Test:
Standard:
3
168 hours max. at ≤ 30 C / 60% RH
+260 °C convection reflow
JEDEC standard IPC/JEDEC J-STD-020
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations, and
information about TriQuint:
Web: www.triquint.com
Email: [email protected]
Tel:
Fax:
+1.503.615.9000
+1.503.615.8902
For technical questions and application information: Email:[email protected]
Important Notice
The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the
information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information
contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information
contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the
entire risk associated with such information is entirely with the user. All information contained herein is subject to
change without notice. Customers should obtain and verify the latest relevant information before placing orders for
TriQuint products. The information contained herein or any use of such information does not grant, explicitly or
implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to
such information itself or anything described by such information.
TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or lifesustaining applications, or other applications where a failure would reasonably be expected to cause severe
personal injury or death.
Data Sheet: Rev. J
© 2012 TriQuint Semiconductor, Inc.
- 10 of 10-
Disclaimer: Subject to change without notice
Connecting the Digital World to the Global Network
®