TI LM2825N-50

LM2825
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SNVS127C – MAY 1997 – REVISED APRIL 2013
LM2825 Integrated Power Supply 1A DC-DC Converter
Check for Samples: LM2825
FEATURES
DESCRIPTION
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The LM2825 is a complete 1A DC-DC Buck converter
packaged in a 24-lead molded Dual-In-Line integrated
circuit package.
1
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Minimum Design Time Required
3.3V, 5V and 12V Fixed Output Versions
Two Adjustable Versions Allow 1.23V to 15V
Outputs
Wide Input Voltage Range, up to 40V
Low-Power Standby Mode, IQ Typically 65 μA
High Efficiency, Typically 80%
±4% Output Voltage Tolerance
Excellent Line and Load Regulation
TTL Shutdown Capability/Programmable SoftStart
Thermal Shutdown and Current Limit
Protection
−40°C to +85°C Ambient Temperature Range
Contained within the package are all the active and
passive components for a high efficiency step-down
(buck) switching regulator. Available in fixed output
voltages of 3.3V, 5V and 12V, as well as two
adjustable versions, these devices can provide up to
1A of load current with fully ensured electrical
specifications.
Self-contained, this converter is also fully protected
from output fault conditions, such as excessive load
current, short circuits, or excessive temperatures.
APPLICATIONS
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•
Simple High-Efficiency Step-Down (Buck)
Regulator
On-Card Switching Regulators
Efficient Pre-Regulator for Linear Regulators
Distributed Power Systems
DC/DC Module Replacement
Standard Application
(Fixed output voltage versions)
HIGHLIGHTS
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No External Components Required (Fixed
Output Voltage Versions)
Integrated Circuit Reliability
MTBF Over 20 Million Hours
Radiated EMI Meets Class B Stipulated by
CISPR 22
High Power Density, 35 W/in3
24-pin PDIP Package Profile (1.25 x 0.54 x 0.26
Inches)
Radiated EMI
Radiated emission of electromagnetic fields is
measured at 10m distance. The emission levels are
within the Class B limits stipulated by CISPR 22.
30. . . .230 MHz
30 dB μV/m
230. . . .1000 MHz
37 dB μV/m
1. . . .10 GHz
46 dB μV/m
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2013, Texas Instruments Incorporated
LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
www.ti.com
Connection Diagram
“NC (Do not use)” pins: See Figure 25
Figure 1. PDIP Package
Top View
See Package Number NFL
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Maximum Input Supply (VIN)
+45V
SD/SS Pin Input Voltage (3)
Output Pin Voltage
6V
(3.3V, 5.0V and ADJ)
(12V and H-ADJ)
−1V ≤ V ≤ 9V
−1V ≤ V ≤ 16V
−0.3V ≤ V ≤ 25V
ADJ Pin Voltage (ADJ, H-ADJ only)
Power Dissipation
Internally Limited
Storage Temperature Range
−40°C to +125°C
ESD Susceptibility
Human Body Model (4)
Lead Temperature (Soldering 10 sec.)
(1)
(2)
(3)
(4)
2 kV
260°C
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
Voltage internally clamped. If clamp voltage is exceeded, limit current to a maximum of 5 mA.
The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin.
Operating Ratings
Ambient Temperature Range
−40°C ≤ TA ≤ +85°C
Junction Temperature Range
−40°C ≤ TJ ≤ +125°C
Input Supply Voltage (3.3V version)
4.75V to 40V
Input Supply Voltage (5V version)
7V to 40V
Input Supply Voltage (12V version)
15V to 40V
Input Supply Voltage (-ADJ, H-ADJ)
4.5V to 40V
2
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LM2825
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SNVS127C – MAY 1997 – REVISED APRIL 2013
LM2825-3.3 Electrical Characteristics (1)
Specifications with standard type face are for TA = 25°C, and those with boldface type apply over full Operating
Temperature Range. Test Circuit, see Figure 17.
Symbol
Parameter
Conditions
LM2825-3.3
Typical (2)
VOUT
Output Voltage
Line Regulation
4.75V ≤ VIN ≤ 40V, 0.1A ≤ ILOAD ≤ 1A
4.75V ≤ VIN ≤ 40V
Limit (3)
Units
(Limits)
3.3
V
3.168/3.135
V(min)
3.432/3.465
V(max)
1.5
mV
8
mV
ILOAD = 100 mA
Load Regulation
0.1A ≤ ILOAD ≤ 1A
VIN = 12V
η
(1)
(2)
(3)
Output Ripple Voltage
VIN = 12V, ILOAD = 1A
40
mV p-p
Efficiency
VIN = 12V, ILOAD = 0.5A
75
%
When the LM2825 is used as shown in Figure 17 test circuit, system performance will be as shown in Electrical Characteristics.
Typical numbers are at 25°C and represent the most likely norm.
All limits ensured at room temperature (standard type face) and at temperature extremes (bold type face) when output current is limited
to the value given in the temperature derating curves. See the Application Information section for curves. All limits at temperature
extremes are ensured using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing
Quality Level (AOQL).
LM2825-5.0 Electrical Characteristics (1)
Specifications with standard type face are for TA = 25°C, and those with boldface type apply over full Operating
Temperature Range. Test Circuit, see Figure 17.
Symbol
Parameter
Conditions
LM2825-5.0
Typical (2)
VOUT
Output Voltage
Line Regulation
7V ≤ VIN ≤ 40V, 0.1A ≤ ILOAD ≤ 1A
7V ≤ VIN ≤ 40V
Limit (3)
Units
(Limits)
5.0
V
4.800/4.750
V(min)
5.200/5.250
V(max)
2.7
mV
8
mV
ILOAD = 100 mA
Load Regulation
0.1A ≤ ILOAD ≤ 1A
VIN = 12V
η
(1)
(2)
(3)
Output Ripple Voltage
VIN = 12V, ILOAD = 1A
40
mV p-p
Efficiency
VIN = 12V, ILOAD = 0.5A
80
%
When the LM2825 is used as shown in Figure 17 test circuit, system performance will be as shown in Electrical Characteristics.
Typical numbers are at 25°C and represent the most likely norm.
All limits ensured at room temperature (standard type face) and at temperature extremes (bold type face) when output current is limited
to the value given in the temperature derating curves. See the Application Information section for curves. All limits at temperature
extremes are ensured using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing
Quality Level (AOQL).
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LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
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LM2825-12 Electrical Characteristics (1)
Specifications with standard type face are for TA = 25°C, and those with boldface type apply over full Operating
Temperature Range. Test Circuit, see Figure 17.
Symbol
Parameter
Conditions
LM2825-12
Typical (2)
VOUT
Output Voltage
Line Regulation
15V ≤ VIN ≤ 40V, 0.1A ≤ ILOAD ≤ 0.75A
Limit (3)
12.0
15V ≤ VIN ≤ 40V
Units
(Limits)
V
11.52/11.40
V(min)
12.48/12.60
V(max)
8.5
mV
12
mV
ILOAD = 100 mA
Load Regulation
0.1A ≤ ILOAD ≤ 0.75A
VIN = 24V
η
(1)
(2)
(3)
Output Ripple Voltage
VIN = 24V, ILOAD = 1A
100
mV p-p
Efficiency
VIN = 24V, ILOAD = 0.5A
87
%
When the LM2825 is used as shown in Figure 17 test circuit, system performance will be as shown in Electrical Characteristics.
Typical numbers are at 25°C and represent the most likely norm.
All limits ensured at room temperature (standard type face) and at temperature extremes (bold type face) when output current is limited
to the value given in the temperature derating curves. See the Application Information section for curves. All limits at temperature
extremes are ensured using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing
Quality Level (AOQL).
LM2825-ADJ Electrical Characteristics (1)
Specifications with standard type face are for TA = 25°C, and those with boldface type apply over full Operating
Temperature Range. Test Circuit, see Figure 18.
Symbol
Parameter
Conditions
LM2825-ADJ
Typical (2)
VADJ
Adjust Pin Voltage
4.5V ≤ VIN ≤ 40V, 0.1A ≤ ILOAD ≤ 1A
1.230
Efficiency
VIN = 12V, ILOAD = 0.5A
Units
(Limits)
V
1.23V ≤ VOUT ≤ 8V
η
Limit (3)
1.193/1.180
V(min)
1.267/1.280
V(max)
74
%
VOUT Programmed for 3V. See Circuit of Figure 18
(1)
(2)
(3)
When the LM2825 is used as shown in Figure 18 test circuit, system performance will be as shown in Electrical Characteristics.
Typical numbers are at 25°C and represent the most likely norm.
All limits ensured at room temperature (standard type face) and at temperature extremes (bold type face) when output current is limited
to the value given in the temperature derating curves. See the Application Information section for curves. All limits at temperature
extremes are ensured using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing
Quality Level (AOQL).
LM2825H-ADJ Electrical Characteristics (1)
Specifications with standard type face are for TA = 25°C, and those with boldface type apply over full Operating
Temperature Range. Test Circuit, see Figure 18.
Symbol
Parameter
Conditions
LM2825H-ADJ
Typical
VADJ
Adjust Pin Voltage
9V ≤ VIN ≤ 40V, 0.1A ≤ ILOAD ≤ 0.55A
Efficiency
Limit
(3)
1.230
7V ≤ VOUT ≤ 15V
η
(2)
VIN = 24V, ILOAD = 0.5A
87
Units
(Limits)
V
1.193/1.180
V(min)
1.267/1.280
V(max)
%
VOUT Programmed for 12V. See Circuit of Figure 18
(1)
(2)
(3)
4
When the LM2825 is used as shown in Figure 18 test circuit, system performance will be as shown in Electrical Characteristics.
Typical numbers are at 25°C and represent the most likely norm.
All limits ensured at room temperature (standard type face) and at temperature extremes (bold type face) when output current is limited
to the value given in the temperature derating curves. See the Application Information section for curves. All limits at temperature
extremes are ensured using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing
Quality Level (AOQL).
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SNVS127C – MAY 1997 – REVISED APRIL 2013
All Output Voltage Versions Electrical Characteristics
Specifications with standard type face are for TA = 25°C, and those with boldface type apply over full Operating Range.
Unless otherwise specified, VIN = 12V for 3.3V, 5.0V and ADJ versions, VIN = 24V for 12V and H-ADJ versions, ILOAD = 100
mA.
Symbol
Parameter
Conditions
LM2825-XX
Typical (1)
ICL
DC Output Current Limit
RL = 0Ω
Limit (2)
Units
(Limits)
1.4
A
1.2
A(min)
2.4
A(max)
IQ
Operating Quiescent
Current
SD/SS Pin = 3.1V (3)
5
ISTBY
Standby Quiescent
Current
SD/SS Pin = 0V (3)
65
IADJ
Adjust Pin Bias Current
Adjustable Versions Only, VFB = 1.3V
fO
Oscillator Frequency
See (4)
150
kHz
θJA
Thermal Resistance
Junction to Ambient (5)
30
°C/W
mA
10
mA(max)
200
μA(max)
μA
6
nA
50/100
nA(max)
SHUTDOWN/SOFT-START CONTROL Test Circuit, see Figure 17
VSD
Shutdown Threshold
Voltage
1.3
Low (Shutdown Mode)
High (Soft-start Mode)
VSS
Soft-start Voltage
VOUT = 20% of Nominal Output Voltage
2
VOUT = 100% of Nominal Output Voltage
3
ISD
Shutdown Current
VSHUTDOWN = 0.5V (3)
5
ISS
Soft-start Current
VSOFT-START = 2.5V (3)
1.6
(1)
(2)
(3)
(4)
(5)
V
0.6
V(max)
2.0
V(min)
V
μA
10
μA(max)
5
μA(max)
μA
Typical numbers are at 25°C and represent the most likely norm.
All limits ensured at room temperature (standard type face) and at temperature extremes (bold type face) when output current is limited
to the value given in the temperature derating curves. See the Application Information section for curves. All limits at temperature
extremes are ensured using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing
Quality Level (AOQL).
ILOAD = 0A.
The switching frequency is reduced when the second stage current limit is activated. The amount of reduction is determined by the
severity of current overload.
Junction to ambient thermal resistance (no external heat sink) for the PDIP package with the leads soldered to a printed circuit board
with (1 oz.) copper area of approximately 2 in2.
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LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
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Typical Performance Characteristics
(Circuits of Figure 17 and Figure 18) Unless otherwise specified, VIN = 12V for 3.3V, 5.0V and ADJ versions, VIN = 24V for
12V and H-ADJ versions, ILOAD = 100 mA, TA = 25°C
6
Normalized Output Voltage
Efficiency
Figure 2.
Figure 3.
Dropout Voltage
Line Regulation
Figure 4.
Figure 5.
Load Regulation
Output Ripple Voltage
Figure 6.
Figure 7.
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SNVS127C – MAY 1997 – REVISED APRIL 2013
Typical Performance Characteristics (continued)
(Circuits of Figure 17 and Figure 18) Unless otherwise specified, VIN = 12V for 3.3V, 5.0V and ADJ versions, VIN = 24V for
12V and H-ADJ versions, ILOAD = 100 mA, TA = 25°C
Operating Quiescent Current
Shutdown Quiescent Current
Figure 8.
Figure 9.
Switching Frequency
Soft-start
Figure 10.
Figure 11.
Shutdown/Soft-start Current
Soft-start Response
Figure 12.
Figure 13.
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LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
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Typical Performance Characteristics (continued)
(Circuits of Figure 17 and Figure 18) Unless otherwise specified, VIN = 12V for 3.3V, 5.0V and ADJ versions, VIN = 24V for
12V and H-ADJ versions, ILOAD = 100 mA, TA = 25°C
Switch Current Limit
Adjust Pin Bias Current
Figure 14.
Figure 15.
Load Transient Response for Continuous Mode
VIN = 20V, VOUT = 5V, IL = 250 mA to 750 mA
Load Transient Response for Discontinuous Mode
VIN = 20V, VOUT = 5V, IL = 40 mA to 140 mA
A: Output Voltage 100 mV/div (AC)
B: 250 mA to 750 mA Load Pulse
Horizontal Time Base: 200 μs/div
A: Output Voltage 100 mV/div (AC)
B: 40 mA to 140 mA Load Pulse
Horizontal Time Base: 200 μs/div
Figure 16. Typical Load Transient Response
8
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Test Circuit
*Optional—Required if package is more than 6″ away from main filter or bypass capacitor.
**Optional Soft-start Capacitor
VIN = 40V (max)
VOUT = 3.3V or 5V @ 1A or 12V @ 0.75A
Figure 17. Standard Test Circuit
(Fixed Output Voltage Versions)
*Optional—Required if package is more than 6″ away from main filter or bypass capacitor.
**Optional Soft-start Capacitor
***Optional—See Application Information.
VIN = 40V (max)
VOUT = 1.23V to 8V (LM2825-ADJ)
7V to 15V (LM2825H-ADJ)
ILOAD = IMAX (See derating curves in Application Information)
Figure 18. Standard Test Circuit
(Adjustable Output Voltage Versions)
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LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
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APPLICATION INFORMATION
PROGRAMMING OUTPUT VOLTAGE
(Selecting R1 and R2 as shown in Figure 18)
The LM2825 is available in two adjustable output versions. The LM2825-ADJ has been optimized for output
voltages between 1.23V and 8V, while the LM2825H-ADJ covers the output voltage range of 7V to 15V. Both
adjustable versions are set in the following way.
(1)
Select a value for R1 between 240Ω and 1.5 kΩ. The lower resistor values minimize noise pickup at the sensitive
adjust pin. (For lowest temperature coefficient and the best stability with time, use 1% metal film resistors.)
Select R2 with the following equation.
(2)
When programming VOUT, keep in mind that VIN must be greater than VOUT + 2V for proper operation.
OPTIONAL EXTERNAL COMPONENTS
SOFT-START CAPACITOR
CSS: A capacitor on this pin provides the regulator with a Soft-start feature (slow start-up). The current drawn
from the source starts out at a low average level with narrow pulses, and ramps up in a controlled manner as the
pulses expand to their steady-state width. This reduces the startup current considerably, and delays and slows
down the output voltage rise time.
It is especially useful in situations where the input power source is limited in the amount of current it can deliver,
since you avoid loading down this type of power supply.
Under some operating conditions, a Soft-start capacitor is required for proper operation. Figure 19 indicates the
input voltage and ambient temperature conditions for which a Soft-start capacitor may be required.
This curve is typical for full ensured output current and can be used as a guideline. As the output current
decreases, the operating area requiring a Soft-start capacitor decreases. Capacitor values between 0.1 μF and 1
μF are recommended. Tantalum or ceramic capacitors are appropriate for this application.
INPUT CAPACITOR
CIN: An optional input capacitor is required if the package is more than 6″ away from the main filter or bypass
capacitor. A low ESR aluminum or tantalum bypass capacitor is recommended between the input pin and ground
to prevent large voltage transients from appearing at the input. In addition, to be conservative, the RMS current
rating of the input capacitor should be selected to be at least ½ the DC load current. With a 1A load, a capacitor
with a RMS current rating of at least 500 mA is recommended.
The voltage rating should be approximately 1.25 times the maximum input voltage. With a nominal input voltage
of 12V, an aluminum electrolytic capacitor (Panasonic HFQ series or Nichicon PL series or equivalent) with a
voltage rating greater than 15V (1.25 × VIN) would be needed.
Solid tantalum input capacitors should only be used where the input source is impedance current limited. High
dV/dt applied at the input can cause excessive charge current through low ESR tantalum capacitors. This high
charge current can result in shorting within the capacitor. It is recommended that they be surge current tested by
the manufacturer.The TPS series available from AVX, and the 593D series from Sprague are both surge current
tested.
Use caution when using ceramic capacitors for input bypassing, because it may cause ringing at the VIN pin.
10
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LOWERING OUTPUT RIPPLE
When using the adjustable parts, one can achieve lower output ripple voltage by shorting a resistor internal to the
LM2825. However, if this resistor is shorted, a feed forward capacitor must be used to keep the regulator stable.
For this reason, this resistor must be left open on all of the fixed output voltage versions or instability will result.
See the FEED FORWARD CAPACITOR SELECTION (CFF) selection below. Shorting the internal resistor is
accomplished by shorting pins 8 and 9 on the LM2825, and will typically reduce output ripple by 25 to 33%.
FEED FORWARD CAPACITOR SELECTION (CFF)
When using an adjustable part and pins 8 and 9 are shorted to reduce output ripple, a feed forward capacitor is
required. This capacitor is typically between 680 pF and 2700 pF. Table 1 shows the value for CFF for a given
output voltage and feedback resistor R2 (R1 = 1 kΩ).
Table 1. CFF Selection Table
VOUT
R2
CFF
LM2825-ADJ
2
630
N/A
3
1.43k
N/A
4
2.26k
2700 pF
5
3.09k
2700 pF
6
3.92k
2200 pF
7
4.75k
1800 pF
8
5.49k
1500 pF
LM2825H-ADJ
7
4.75k
2700 pF
8
5.49k
2200 pF
9
6.34k
1800 pF
10
7.15k
1500 pF
11
8.06k
1000 pF
12
8.87k
820 pF
13
9.53k
680 pF
14
10.5k
680 pF
15
11.3k
680 pF
SHUTDOWN
The circuit shown in Figure 24 shows 2 circuits for the Shutdown/Soft-start feature using different logic signals for
shutdown and using a 0.1 μF Soft-start capacitor.
THERMAL CONSIDERATIONS
The LM2825 is available in a 24-pin through hole PDIP. The package is molded plastic with a copper lead frame.
When the package is soldered to the PC board, the copper and the board are the heat sink for the LM2825.
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LM2825
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Figure 19. Usage of the Soft-start Capacitor
OUTPUT CURRENT DERATING FOR TJ = −40°C to −25°C AND TJ = −25°C to 0°C
At the lower temperature extremes, the switch current limit drops off sharply. As a result, a lower output current is
available in this temperature range. See Figure 20 and Figure 21 for the typical available output current at these
temperature ranges.
Figure 20. LM2825 Output Current Derating for TJ = −40°C to −25°C
12
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Figure 21. LM2825 Output Current Derating for TJ = −25°C to 0°C
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LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
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OUTPUT CURRENT DERATING FOR TA = 0°C to 70°C
Due to the limited switch current, the LM2825 cannot supply the full one ampere output current over the entire
input and output voltage range. Figure 22 shows the typical available output current for any input and output
voltage combination. This applies for all output voltage versions.
Figure 22. LM2825 Output Current Derating for TA = 0°C to 70°C
14
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OUTPUT CURRENT DERATING FOR TA = 70°C to 85°C
At high these high ambient temperatures, the LM2825 cannot supply the full one ampere over the entire input
and output voltage range. This is due to thermal reasons and Figure 23 shows the typical available output
current for any input and output voltage combination. This applies for all output voltage versions.
Figure 23. LM2825 Output Current Derating for TA = 70°C to 85°C
Figure 24. Typical Circuits Using Shutdown/Soft-start Features
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LM2825
SNVS127C – MAY 1997 – REVISED APRIL 2013
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TYPICAL THROUGH HOLE PC BOARD LAYOUT (2X SIZE),
SINGLE SIDED, THROUGH HOLE PLATED
Note: Holes are not shown.
“No Connect Pins” are connected to copper pads for thermal reasons only and must remain electrically isolated.
Figure 25. 2X Printed Circuit Board Layout
16
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REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
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1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2825HN-ADJ
NRND
PDIP
NFL
24
12
TBD
Call TI
Call TI
-40 to 125
LM2825HN-ADJ
ADJ, 1A OUTPUT
LM2825HN-ADJ/NOPB
ACTIVE
PDIP
NFL
24
12
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 125
LM2825HN-ADJ
ADJ, 1A OUTPUT
LM2825N-12/NOPB
ACTIVE
PDIP
NFL
24
12
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 125
LM2825N-12
12V, 1A OUTPUT
LM2825N-3.3/NOPB
ACTIVE
PDIP
NFL
24
12
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 125
LM2825N-3.3
3.3V, 1A OUTPUT
LM2825N-5.0
NRND
PDIP
NFL
24
12
TBD
Call TI
Call TI
-40 to 125
LM2825N-5.0
5.0V, 1A OUTPUT
LM2825N-5.0/NOPB
ACTIVE
PDIP
NFL
24
12
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 125
LM2825N-5.0
5.0V, 1A OUTPUT
LM2825N-ADJ
NRND
PDIP
NFL
24
12
TBD
Call TI
Call TI
-40 to 125
LM2825N-ADJ
ADJ, 1A OUTPUT
LM2825N-ADJ/NOPB
ACTIVE
PDIP
NFL
24
12
Green (RoHS
& no Sb/Br)
CU SN
Level-1-NA-UNLIM
-40 to 125
LM2825N-ADJ
ADJ, 1A OUTPUT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
1-Nov-2013
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
NFL0024F
N0024F
NA24F (Rev D)
www.ti.com
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