a Low Voltage 400 MHz Quad 2:1 Mux with 3 ns Switching Time ADG774A FEATURES Bandwidth >400 MHz Low Insertion Loss and On Resistance: 2.2 Typical On-Resistance Flatness 0.3 Typical Single 3 V/5 V Supply Operation Very Low Distortion: <0.3% Low Quiescent Supply Current (1 nA Typical) Fast Switching Times tON 6 ns tOFF 3 ns TTL/CMOS Compatible FUNCTIONAL BLOCK DIAGRAM ADG774A S1A D1 S1B S2A D2 S2B S3A D3 S3B S4A D4 S4B 1 OF 2 DECODER EN IN GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG774A is a monolithic CMOS device comprising four 2:1 multiplexer/demultiplexers with high impedance outputs. The CMOS process provides low power dissipation yet gives high switching speed and low on resistance. The on-resistance variation is typically less than 0.5 Ω over the input signal range. 1. Wide bandwidth data rates >400 MHz. The bandwidth of the ADG774A is typically 400 MHz and this, coupled with low distortion (typically 0.3%), makes the part suitable for switching of high-speed data signals. The on-resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion. CMOS construction ensures ultralow power dissipation. 2. Ultralow Power Dissipation. 3. Low leakage over temperature. 4. Break-Before-Make Switching. This prevents channel shorting when the switches are configured as a multiplexer. 5. Crosstalk is typically –70 dB @ 10 MHz. 6. Off isolation is typically –65 dB @ 10 MHz. The ADG774A operates from a single 3.3 V/5 V supply and is TTL logic compatible. The control logic for each switch is shown in the Truth Table. These switches conduct equally well in both directions when ON. In the OFF condition, signal levels up to the supplies are blocked. The ADG774A switches exhibit break-before-make switching action. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001 ADG774A–SPECIFICATIONS SINGLE SUPPLY1 (V DD = 5 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.) Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (∆RON) B Version TMIN to 25C TMAX 0 to 2.5 2.2 3.5 4 0.15 0.5 On Resistance Flatness (RFLAT(ON)) 0.3 0.6 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH ± 0.001 ± 0.1 ± 0.001 ± 0.1 ± 0.001 ± 0.1 DYNAMIC CHARACTERISTICS2 tON, tON (EN) tOFF, tOFF (EN) Break-Before-Make Time Delay, tD Off Isolation Channel-to-Channel Crosstalk Bandwidth –3 dB Distortion Charge Injection CS (OFF) CD (OFF) CD, CS (ON) Test Conditions/Comments V Ω typ Ω max VD = 0 V to 1 V; IS = –10 mA Ω typ Ω max Ω typ Ω max 2.4 0.8 V min V max ± 0.1 3 µA typ µA max pF typ VIN = VINL or VINH 6 12 3 6 3 1 –65 –70 400 0.3 6 5 7.5 12 ns typ ns max ns typ ns max ns typ ns min dB typ dB typ MHz typ % typ pC typ pF typ pF typ pF typ CL = 35 pF, RL = 50 Ω; VS = 2 V; Test Circuit 4 CL = 35 pF, RL = 50 Ω; VS = 2 V; Test Circuit 4 CL = 35 pF, RL = 50 Ω; VS1 = VS2 = 2 V; Test Circuit 5 f = 10 MHz; RL = 50 Ω; Test Circuit 7 f = 10 MHz; RL = 50 Ω; Test Circuit 8 Test Circuit 6, RL = 50 Ω; RL = 100 Ω CL = 1 nF; Test Circuit 9, VS = 0 V 1 0.001 VD = 0 V to 1 V; IS = –10 mA ± 0.25 ± 0.25 POWER REQUIREMENTS IDD VD = 0 V to 1 V; IS = –10 mA nA typ nA max nA typ nA max nA typ nA max ± 0.25 0.001 CIN, Digital Input Capacitance Unit µA max µA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; Test Circuit 2 VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; Test Circuit 2 VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3 VDD = 5.5 V Digital Inputs = 0 V or VDD NOTES 1 Temperature ranges are as follows: B Version, –40°C to +85°C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. –2– REV. 0 ADG774A 1 SINGLE SUPPLY (VDD = 3 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.) B Version TMIN to 25C TMAX Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) 0 to 1.5 4 6 On Resistance Match Between Channels (∆RON) 7 ± 0.25 VD = 2 V, VS = 1 V; VD = 1 V, VS = 2 V; Test Circuit 2 VD = 2 V, VS = 1 V; VD = 1 V, VS = 2 V; Test Circuit 2 VD = VS = 2 V; VD = VS = 1 V; Test Circuit 3 2.0 0.4 V min V max ± 0.1 3 µA typ µA max pF typ VIN = VINL or VINH 7 14 4 8 3 1 –65 –70 400 1.5 4 5 7.5 12 ns typ ns max ns typ ns max ns typ ns min dB typ dB typ MHz typ % typ pC typ pF typ pF typ pF typ CL = 35 pF, RL = 50 Ω; VS = 1.5 V; Test Circuit 4 CL = 35 pF, RL = 50 Ω; VS = 1.5 V; Test Circuit 4 CL = 35 pF, RL = 50 Ω; VS1 = VS2 = 1.5 V; Test Circuit 5 f = 10 MHz; RL = 50 Ω, Test Circuit 7 f = 10 MHz; RL = 50 Ω, Test Circuit 8 Test Circuit 6; RL = 50 Ω RL = 100 Ω CL = 1 nF; Test Circuit 9, VS = 0 V 3 Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH ± 0.25 ± 0.25 0.001 CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON, tON (EN) tOFF, tOFF (EN) Break-Before-Make Time Delay, tD Off Isolation Channel-to-Channel Crosstalk Bandwidth –3 dB Distortion Charge Injection CS (OFF) CD (OFF) CD, CS (ON) VD = 0 V to 1 V; IS = –10 mA nA typ nA max nA typ nA max nA typ nA max 1.5 ± 0.001 ± 0.1 ± 0.001 ± 0.1 ± 0.001 ± 0.1 V Ω typ Ω max VD = 0 V to 1 V; IS = –10 mA 0.5 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Test Conditions/Comments Ω typ Ω max Ω typ Ω max 0.15 On Resistance Flatness (RFLAT(ON)) Unit POWER REQUIREMENTS IDD µA max µA typ 1 0.001 VD = 0 V to 1 V; IS = –10 mA VDD = 3.3 V Digital Inputs = 0 V or VDD NOTES 1 Temperature ranges are as follows: B Version, –40°C to +85°C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. Table I. Truth Table REV. 0 EN IN D1 D2 D3 D4 Function 1 0 0 X 0 1 Hi-Z S1A S1B Hi-Z S2A S2B Hi-Z S3A S3B Hi-Z S4A S4B DISABLE IN = 0 IN = 1 –3– ADG774A ABSOLUTE MAXIMUM RATINGS 1 TERMINOLOGY (TA = 25°C unless otherwise noted) VDD GND S D IN EN RON ∆RON Most Positive Power Supply Potential. Ground (0 V) Reference. Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input. Logic Control Input. Ohmic resistance between D and S. On Resistance match between any two channels i.e., RON max – RON min. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. Source Leakage Current with the switch “OFF.” IS (OFF) ID (OFF) Drain Leakage Current with the switch “OFF.” ID, IS (ON) Channel Leakage Current with the switch “ON.” VD (VS) Analog Voltage on Terminals D, S. CS (OFF) “OFF” Switch Source Capacitance. CD (OFF) “OFF” Switch Drain Capacitance. CD, CS (ON) “ON” Switch Capacitance. tON Delay between applying the digital control input and the output switching on. See Test Circuit 4. tOFF Delay between applying the digital control input and the output switching Off. tD “OFF” time or “ON” time measured between the 90% points of both switches, when switching from one address state to another. See Test Circuit 5. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an “OFF” switch. Bandwidth Frequency response of the switch in the ON state measured at 3 dB down. Distortion RFLAT(ON)/RL VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V Analog, Digital Inputs2 . . . . . . . . . . . –0.3 V to VDD + 0.3 V or . . . . . . . . . . . . . . . . . . . . . . . 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C QSOP Package, Power Dissipation . . . . . . . . . . . . . . 566 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . 149.97°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. PIN CONFIGURATION (QSOP) IN 1 16 VDD S1A 2 15 EN S1B 3 14 S4A ADG774A S4B TOP VIEW S2A 5 (Not to Scale) 12 D4 D1 4 13 S2B 6 11 S3A D2 7 10 S3B GND 8 9 D3 ORDERING GUIDE Model Temperature Range Package Descriptions Package Options ADG774ABRQ –40°C to +85°C RQ = 0.15" Quarter Size Outline Package (QSOP) RQ-16 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG774A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– WARNING! ESD SENSITIVE DEVICE REV. 0 Typical Performance Characteristics–ADG774A 20 20 20 TA = 25 C VDD = 5V TA = 25 C 16 16 15 VDD = 5.0V 8 12 RON – 12 RON – RON – VDD = 3.0V 8 VDD = 2.7V +85 C VDD = 4.5V 5 4 VDD = 3.3V 0 2 3 4 5 0 1 VS OR VD OR DRAIN SOURCE VOLTAGE – V TPC 1. On Resistance as a Function of VD (VS) for Various Single Supplies 0.025 VDD = 5.0V VSS = 0V TEMP = 25 C 0.020 0.015 +85 C 10 +25 C 0.020 0.015 0.010 0.005 CURRENT – nA CURRENT – nA ID (OFF) 0 –0.005 IS, ID (ON) IS (OFF) –0.010 5 –40 C 0 0.5 1.0 1.5 2.0 2.5 3.0 VS OR VD OR DRAIN SOURCE VOLTAGE – V ID (OFF) 0 –0.005 –0.015 –0.020 –0.025 0 VS 3 2 1 VS – V(VD = VDD – VS) 4 –0.025 0 VS TPC 5. Leakage Current as a Function of VD (VS) 0.02 0.01 0.03 ID, IS (ON) ID (OFF) 0 IS (OFF) –0.01 0.02 0.01 ID, IS (ON) –0.01 –0.02 –0.03 –0.03 –0.04 –0.04 IS (OFF) ID (OFF) 5 15 25 35 45 55 65 TEMPERATURE – C 75 85 TPC 7. Leakage Current as a Function of Temperature REV. 0 3.0 –40 –60 –80 –0.05 –0.05 2.5 –20 0 –0.02 1.0 1.5 2.0 VS – V(VD = VDD – VS) 0 VDD = 3.0V VSS = 0V TEMP = 25 C VD = 2V/1V VS = 1V/2V 0.04 CURRENT – nA 0.03 0.5 TPC 6. Leakage Current as a Function of VD (VS) 0.05 VDD = 5.0V VSS = 0V TEMP = 25 C VD = 3V/1V VS = 1V/3V 0.04 IS (OFF) –0.010 –0.020 0.05 ID, IS (ON) 0.005 –0.015 TPC 4. On Resistance as a Function of VD (VS) for Different Temperatures with 3 V Single Supplies VDD = 3.0V VSS = 0V TEMP = 25 C 0.010 ATTENUATION – dB RON – 15 0 1 2 3 4 5 VS OR VD OR DRAIN SOURCE VOLTAGE – V TPC 3. On Resistance as a Function of VD (VS) for Different Temperatures with 5 V Single Supplies 0.025 VDD = 3V CURRENT – nA –40 C 0 1.0 1.5 2.0 2.5 3.0 0 0.5 VS OR VD OR DRAIN SOURCE VOLTAGE – V TPC 2. On Resistance as a Function of VD (VS) for Various Single Supplies 20 0 +25 C 4 VDD = 5.5V 0 10 5 15 25 35 45 55 65 TEMPERATURE – C 75 TPC 8. Leakage Current as a Function of Temperature –5– 85 –100 0.3 0.1 1 10 100 FREQUENCY – MHz 1000 TPC 9. Off Isolation vs. Frequency ADG774A 0 0 0 –1 –2 ON RESPONSE – dB –40 –60 VDD = 3V –5 QINJ – pC ATTENUATION – dB –20 –3 –4 VDD = 5V –10 –5 –80 –6 –100 0.3 0.1 1 10 100 FREQUENCY – MHz –15 0.3 1000 TPC 10. Crosstalk vs. Frequency –7 0.1 1 10 100 FREQUENCY – MHz 0 1000 TPC 11. Bandwidth 0.5 1.0 1.5 VOLTAGE – V 2.0 2.5 TPC 12. Charge Injection vs. Source Voltage 10 BASE TX+ TX1 ADG774A 10 BASE TX– 100 BASE TX+ TX2 100 BASE TX– RJ45 10 BASE TX+ RX1 10 BASE TX– TRANSFORMER 100 BASE TX+ RX2 100 BASE TX– 10 BASE TX 100 BASE TX Figure 1. Full Duplex Transceiver TX1 120 100 RX1 Figure 2. Loop Back Figure 3. Line Termination –6– Figure 4. Line Clamp REV. 0 ADG774A Test Circuits IDS V1 IS (OFF) S A D ID (OFF) S D VS VS ID (ON) A S NC D VD A VD RON = V1/IDS NC = NO CONNECT Test Circuit 3. On Leakage Test Circuit 2. Off Leakage Test Circuit 1. On Resistance 5V 0.1F VIN 3V VDD S 50% 50% VOUT D 90% VS RL 100 IN CL 35pF 90% VOUT tOFF tON EN GND Test Circuit 4. Switching Times 5V 0.1F VDD 3V S1A VOUT D1 VS VIN RL 100 VS CL 35pF 50% 50% 0V S1B VOUT 50% 50% VS DECODER tD EN tD GND Test Circuit 5. Break-Before-Make Time Delay VDD VDD 0.1F 0.1F ADG774A ADG774A NETWORK ANALYZER S1A NETWORK ANALYZER S1A 50 50 VS IN VIN VS VIN VOUT D1 50 EN GND Test Circuit 6. Bandwidth REV. 0 VOUT D1 50 EN 50 IN GND Test Circuit 7. Off Isolation –7– ADG774A VDD 0.1F NETWORK ANALYZER ADG774A C02373–1.5–6/01(0) 50 S1A VS S2A VOUT RL 50 IN D2 VIN D1 EN 50 GND Test Circuit 8. Channel-to-Channel Crosstalk 5V VDD ADG774A VS S1A S1B CL S2A 1nF S2B CL S3A 1nF S3B CL S4A 1nF S4B CL D1 VOUT 3V VIN D2 VOUT VOUT D3 VOUT VOUT QINJ = CL VOUT D4 VOUT 1nF 1 OF 2 DECODER EN IN Test Circuit 9. Charge Injection OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead QSOP (RQ-16) PRINTED IN U.S.A. RS 0.197 (5.00) 0.189 (4.80) 9 16 0.244 (6.20) 0.228 (5.79) 0.157 (3.99) 0.150 (3.81) 1 8 PIN 1 0.059 (1.50) MAX 0.010 (0.25) 0.004 (0.10) 0.025 (0.64) BSC 0.069 (1.75) 0.053 (1.35) 8 0 0.012 (0.30) SEATING 0.010 (0.20) 0.008 (0.20) PLANE 0.007 (0.18) –8– 0.050 (1.27) 0.016 (0.41) REV. 0