AD ADG707BRU

a
FEATURES
1.8 V to 5.5 V Single Supply
ⴞ3 V Dual Supply
2.5 ⍀ On Resistance
0.5 ⍀ On-Resistance Flatness
100 pA Leakage Currents
40 ns Switching Times
Single 16-to-1 Multiplexer ADG706
Differential 8-to-1 Multiplexer ADG707
28-Lead TSSOP Package
Low-Power Consumption
TTL/CMOS-Compatible Inputs
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
CMOS, 2.5 ⍀ Low-Voltage,
8-/16-Channel Multiplexers
ADG706/ADG707
FUNCTIONAL BLOCK DIAGRAMS
ADG706
ADG707
S1
S1A
DA
S8A
D
S1B
DB
S16
S8B
1-OF-16
DECODER
1-OF-8
DECODER
A0 A1 A2 A3 EN
A0 A1 A2 EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG706 and ADG707 are low-voltage, CMOS analog
multiplexers comprising 16 single channels and eight differential
channels respectively. The ADG706 switches one of 16 inputs
(S1–S16) to a common output, D, as determined by the 4-bit
binary address lines A0, A1, A2, and A3. The ADG707 switches
one of eight differential inputs to a common differential output as
determined by the 3-bit binary address lines A0, A1, and A2.
An EN input on both devices is used to enable or disable the
device. When disabled, all channels are switched OFF.
1. Single/Dual Supply Operation. The ADG706 and ADG707
are fully specified and guaranteed with 3 V and 5 V single
supply and ± 3 V dual supply rails.
2. Low On Resistance (2.5 Ω typical).
3. Low-Power Consumption (<0.01 µW).
4. Guaranteed Break-Before-Make Switching Action.
5. Small 28-Lead TSSOP Package.
Low-power consumption and operating supply range of 1.8 V to
5.5 V make the ADG706 and ADG707 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switching channels. These devices are also designed to operate from a
dual supply of ± 3 V.
These multiplexers are designed on an enhanced submicron
process that provides low-power dissipation yet gives highswitching speed, very low on resistance and leakage currents.
On resistance is in the region of a few ohms and is closely
matched between switches and very flat over the full signal
range. These parts can operate equally well as either multiplexers
or demultiplexers and have an input signal range which extends
to the supplies.
The ADG706 and ADG707 are available in small 28-lead TSSOP
packages.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
ADG706/ADG707–SPECIFICATIONS1 (V
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (∆RON)
On-Resistance Flatness (RFLAT(ON))
B Version
–40ⴗC
25ⴗC
to +85ⴗC
0 V to VDD
2.5
4.5
5
0.3
0.8
0.5
1.2
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG706
ADG707
Channel ON Leakage ID, IS (ON)
ADG706
ADG707
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
± 0.01
± 0.1
± 0.01
± 0.4
± 0.1
± 0.01
± 0.4
± 0.1
CIN, Digital Input Capacitance
5
40
= 5 V ⴞ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.)
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IDS = 10 mA
VDD = 5.5 V
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 2
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
Test Circuit 3
2.4
0.8
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF, Test Circuit 5;
VS1 = 3 V/0 V, VS16 = 0 V/3 V
RL = 300 Ω, CL = 35 pF;
VS = 3 V, Test Circuit 6
RL = 300 Ω, CL = 35 pF;
VS = 3 V, Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = 3 V, Test Circuit 7
VS = 1 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 10
± 1.5
±1
Break-Before-Make Time Delay, tD
30
tON (EN)
32
tOFF (EN)
10
Charge Injection
±5
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
Off Isolation
–60
–80
dB typ
dB typ
Channel-to-Channel Crosstalk
–60
–80
dB typ
dB typ
25
36
13
MHz typ
MHz typ
pF typ
180
90
pF typ
pF typ
200
100
pF typ
pF typ
0.001
µA typ
µA max
1
50
14
POWER REQUIREMENTS
IDD
VS = 0 V to VDD, IDS = 10 mA;
Test Circuit 1
VS = 0 V to VDD, IDS = 10 mA
± 1.5
±1
± 0.3
60
–3 dB Bandwidth
ADG706
ADG707
CS (OFF)
CD (OFF)
ADG706
ADG707
CD, CS (ON)
ADG706
ADG707
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
0.005
DYNAMIC CHARACTERISTICS2
tTRANSITION
DD
1.0
VD = VS = 1 V, or 4.5 V;
Test Circuit 4
RL = 50 Ω, CL = 5 pF, Test Circuit 9
RL = 50 Ω, CL = 5 pF, Test Circuit 9
VDD = 5.5 V
Digital Inputs = 0 V or 5.5 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. 0
1
SPECIFICATIONS
ADG706/ADG707
(VDD = 3 V ⴞ 10%, VSS = 0 V, GND = 0 V, unless otherwise noted)
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
B Version
–40ⴗC
25ⴗC
to +85ⴗC
0 V to VDD
6
11
On-Resistance Match Between
Channels (∆RON)
On-Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG706
ADG707
Channel ON Leakage ID, IS (ON)
ADG706
ADG707
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
± 0.01
± 0.1
± 0.01
± 0.4
± 0.1
± 0.01
± 0.4
± 0.1
12
0.4
1.2
3
CIN, Digital Input Capacitance
5
45
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
VDD = 3.3 V
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 3
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF, Test Circuit 5
VS1 = 2 V/0 V, VS16 = 0 V/2 V
RL = 300 Ω, CL = 35 pF;
VS = 2 V, Test Circuit 6
RL = 300 Ω, CL = 35 pF;
VS = 2 V, Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = 2 V, Test Circuit 7
VS = 1 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 10
Break-Before-Make Time Delay, tD
30
tON (EN)
40
tOFF (EN)
20
Charge Injection
±5
Off Isolation
–60
–80
dB typ
dB typ
Channel-to-Channel Crosstalk
–60
–80
dB typ
dB typ
25
36
13
MHz typ
MHz typ
pF typ
180
90
pF typ
pF typ
200
100
pF typ
pF typ
0.001
µA typ
µA max
1
70
28
1.0
NOTES
1
Temperature ranges are as follows: B Versions: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
VS = 0 V to VDD, IDS = 10 mA
2.0
0.4
± 1.5
±1
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
POWER REQUIREMENTS
IDD
VS = 0 V to VDD, IDS = 10 mA;
Test Circuit 1
VS = 0 V to VDD, IDS = 10 mA
± 1.5
±1
± 0.3
75
–3 dB Bandwidth
ADG706
ADG707
CS (OFF)
CD (OFF)
ADG706
ADG707
CD, CS (ON)
ADG706
ADG707
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
0.005
DYNAMIC CHARACTERISTICS2
tTRANSITION
Unit
–3–
VS = VD = 1 V or 3 V;
Test Circuit 4
RL = 50 Ω, CL = 5 pF, Test Circuit 9
RL = 50 Ω, CL = 5 pF, Test Circuit 9
VDD = 3.3 V
Digital Inputs = 0 V or 3.3 V
ADG706/ADG707
Dual Supply1 (V
DD
= +3 V ⴞ 10%, VSS = –3 V ⴞ 10%, GND = 0 V, unless otherwise noted.)
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On-Resistance Match Between
Channels (∆RON)
On-Resistance Flatness (RFLAT(ON))
B Version
–40ⴗC
25ⴗC
to +85ⴗC
VSS to VDD
2.5
4.5
5
0.3
0.8
0.5
1.2
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
Drain OFF Leakage ID (OFF)
ADG706
ADG707
Channel ON Leakage ID, IS (ON)
ADG706
ADG707
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tTRANSITION
± 0.01
± 0.1
± 0.01
± 0.4
± 0.1
± 0.01
± 0.4
± 0.1
0.005
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
VS = VSS to VDD, IDS = 10 mA
VDD = +3.3 V, VSS = –3.3 V
VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;
Test Circuit 2
VS = +2.25 V/–1.25 V, VD = –1.25 V/+2.25 V;
Test Circuit 3
± 1.5
±1
2.0
0.4
V min
V max
± 0.1
µA typ
µA max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
RL = 300 Ω, CL = 35 pF, Test Circuit 5
VS1 = 1.5 V/0 V, VS16 = 0 V/1.5 V
RL = 300 Ω, CL = 35 pF;
VS = 1.5 V, Test Circuit 6
RL = 300 Ω, CL = 35 pF;
VS = 1.5 V, Test Circuit 7
RL = 300 Ω, CL = 35 pF;
VS = 1.5 V, Test Circuit 7
VS = 0 V, RS = 0 Ω, CL = 1 nF;
Test Circuit 8
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 9
RL = 50 Ω, CL = 5 pF, f = 10 MHz;
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Test Circuit 10
± 0.3
± 1.5
±1
5
40
Break-Before-Make Time Delay, tD
15
tON (EN)
32
tOFF (EN)
16
Charge Injection
±8
Off Isolation
–60
–80
dB typ
dB typ
Channel-to-Channel Crosstalk
–60
–80
dB typ
dB typ
25
36
13
MHz typ
MHz typ
pF typ
180
90
pF typ
pF typ
200
100
pF typ
pF typ
1
50
26
µA typ
µA max
µA typ
µA max
0.001
1.0
ISS
VS = VSS to VDD, IDS = 10 mA;
Test Circuit 1
VS = VSS to VDD, IDS = 10 mA
nA typ
nA max
nA typ
nA max
nA max
nA typ
nA max
nA max
60
–3 dB Bandwidth
ADG706
ADG707
CS (OFF)
CD (OFF)
ADG706
ADG707
CD, CS (ON)
ADG706
ADG707
POWER REQUIREMENTS
IDD
Test Conditions/Comments
0.001
1.0
VS = VD = +2.25 V/–1.25 V, Test Circuit 4
RL = 50 Ω, CL = 5 pF, Test Circuit 9
RL = 50 Ω, CL = 5 pF, Test Circuit 9
VDD = +3.3 V
Digital Inputs = 0 V or 3.3 V
VSS = –3.3 V
Digital Inputs = 0 V or 3.3 V
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–4–
REV. 0
ADG706/ADG707
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
TSSOP Package
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 97.9°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 14°C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . 300°C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . . 220°C
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25°C unless otherwise noted)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –3.5 V
Analog Inputs2 . . . . . . . . . . . . . . VSS – 0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Digital Inputs2 . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG706/ADG707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG706BRU
ADG707BRU
–40°C to +85°C
–40°C to +85°C
Thin Shrink Small Outline Package (TSSOP)
Thin Shrink Small Outline Package (TSSOP)
RU-28
RU-28
PIN CONFIGURATIONS
28-Lead TSSOP
VDD 1
28 DA
NC 2
27 VSS
DB 2
27 VSS
NC 3
26 S8
NC 3
26 S8A
S16 4
25 S7
S8B 4
25 S7A
S15 5
24 S6
S7B 5
24 S6A
S14 6
23 S5
S6B 6
TOP VIEW 22 S4
S12 8 (Not to Scale) 21 S3
S5B 7
S11 9
20 S2
S3B 9
20 S2A
S10 10
19 S1
S2B 10
19 S1A
S9 11
18 EN
S1B 11
18 EN
GND 12
17 A0
GND 12
17 A0
NC 13
16 A1
NC 13
16 A1
A3 14
15 A2
NC 14
15 A2
VDD 1
28 D
ADG706
NC = NO CONNECT
REV. 0
ADG707
23 S5A
S4A
TOP VIEW 22
S4B 8 (Not to Scale) 21 S3A
S13 7
NC = NO CONNECT
–5–
ADG706/ADG707
Table I. ADG706 Truth Table
Table II. ADG707 Truth Table
A3
A2
A1
A0
EN
ON Switch
A2
A1
A0
EN
ON Switch Pair
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
NONE
1
2
3
4
5
6
7
8
X = Don’t Care.
X = Don’t Care.
TERMINOLOGY
VDD
Most Positive Power Supply Potential.
CD (OFF)
VSS
Most Negative Power Supply in a Dual Supply Application. In single supply applications,
this should be tied to ground at the device.
“OFF” Switch Drain Capacitance. Measured
with reference to ground.
CD, CS (ON)
“ON” Switch Capacitance. Measured with
reference to ground.
IDD
Positive Supply Current.
CIN
Digital Input Capacitance.
ISS
Negative Supply Current.
tTRANSITION
GND
Ground (0 V) Reference.
S
Source Terminal. May be an input or output.
Delay Time Measured Between the 50% and
90% Points of the Digital Inputs and the Switch
“ON” Condition when Switching from One
Address State to Another.
D
Drain Terminal. May be an input or output.
tON (EN)
IN
Logic Control Input.
Delay Time Between the 50% and 90% Points
of the EN Digital Input and the Switch “ON”
Condition.
tOFF (EN)
Delay Time Between the 50% and 90% Points
of the EN Digital Input and the Switch “OFF”
Condition.
tOPEN
“OFF” Time Measured Between the 80%
Points of Both Switches when Switching from
One Address State to Another.
Charge
Injection
A Measure of the Glitch Impulse Transferred
from the Digital Input to the Analog Output
During Switching.
Off Isolation
A Measure of Unwanted Signal Coupling
through an “OFF” Switch.
Crosstalk
A Measure of Unwanted Signal which is
Coupled through from One Channel to
Another as a Result of Parasitic Capacitance.
Bandwidth
The Frequency at which the Output Is
Attenuated by 3 dBs.
On Response
The Frequency Response of the “ON” Switch.
Insertion
Loss
The Loss Due to the ON Resistance of the
Switch.
VD (VS)
Analog Voltage on Terminals D, S.
RON
Ohmic Resistance Between D and S.
∆RON
On Resistance Match Between any Two Channels, i.e., RONmax – RONmin.
RFLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on
resistance as measured over the specified analog
signal range.
IS (OFF)
Source Leakage Current with the Switch
“OFF.”
ID (OFF)
Drain Leakage Current with the Switch “OFF.”
ID, IS (ON)
Channel Leakage Current with the Switch
“ON.”
VINL
Maximum Input Voltage for Logic “0.”
VINH
Minimum Input Voltage for Logic “1.”
IINL(IINH)
Input Current of the Digital Input.
CS (OFF)
“OFF” Switch Source Capacitance. Measured
with reference to ground.
–6–
REV. 0
Typical Performance Characteristics–ADG706/ADG707
8
8
8
7
VDD = 5V
VSS = 0V
7
6
ON RESISTANCE – ⍀
ON RESISTANCE – ⍀
VDD = 2.7V
5
VDD = 3.3V
4
VDD = 4.5V
3
2
5
+25ⴗC
3
+85ⴗC
2
VDD = 5.5V
0
6
5
4
+25ⴗC
+85ⴗC
3
2
–40ⴗC
1
0
6
4
VDD = +3.0V
VSS = –3.0V
7
ON RESISTANCE – ⍀
TA = 25ⴗC
VSS = GND
–40ⴗC
1
1
0
0
–2
–1
1
2
3
–3
0
VD OR VS /DRAIN OR SOURCE VOLTAGE – V
0
1
2
3
4
5
VD OR VS /DRAIN OR SOURCE VOLTAGE – V
1
5
2
3
4
VD, VS, DRAIN OR SOURCE VOLTAGE – V
Figure 1. On Resistance as a Function
of VD (VS) for Single Supply
Figure 2. On Resistance as a Function
of VD (VS) for Different Temperatures,
Dual Supply
Figure 3. On Resistance as a Function
of VD (VS) for Different Temperatures,
Single Supply
0.3
8
8
TA = 25ⴗC
VDD = 3V
VSS = 0V
7
7
VDD = 5V
VSS = 0V
TA = 25ⴗC
VDD = +2.7V
5
VSS = –2.7V VDD = +3.0V
VSS = –3.0V
4
3
2
1
4
–40ⴗC
3
2
1
VSS = –3.3V
0
Figure 4. On Resistance as a Function
of VD (VS) for Dual Supply
+85ⴗC
5
VDD = +3.3V
0
–3
0
–2
–1
1
2
3
VD OR VS /DRAIN OR SOURCE VOLTAGE – V
–0.2
0
0.2
0
ID, IS (ON)
–0.1
IS (OFF)
1
2
3
VD (VS) – Volts
5
4
Figure 6. Leakage Currents as a Function of VD (VS)
0.8
VDD = +3V
VSS = –3V
TA = 25ⴗC
0.1
0
–0.1
ID, IS (ON)
VDD = +3V
VSS = –3V
0.6 VD = +2.25V/–1.25V
VS = –1.25V/+2.25V
0.5
0.7
ID (OFF)
CURRENT – nA
ID (OFF)
0.1
0
–0.1
Figure 5. On Resistance as a Function
of VD (VS) for Different Temperatures,
Single Supply
CURRENT – nA
0.2
0.1
IS (OFF)
+25ⴗC
0.3
VDD = 3V
VSS = 0V
TA = 25ⴗC
ID (OFF)
ID, IS (ON)
1.0
1.5
2.0
2.5
3.0
0
0.5
VD OR VS – DRAIN OR SOURCE VOLTAGE – V
0.3
CURRENT – nA
6
CURRENT – nA
6
ON RESISTANCE – ⍀
ON RESISTANCE – ⍀
0.2
IS (OFF)
0.4
VDD = 5V
VSS = GND
VD = 4.5V/1V
VS = 1V/4.5V
ID (OFF)
0.3
ID, IS (ON)
0.2
0.1
–0.2
–0.2
–0.3
–0.3
–3
0
0
1
2
3
VD (VS) – Volts
4
5
Figure 7. Leakage Currents as a Function of VD (VS)
REV. 0
IS (OFF)
–2
–1
0
1
VOLTAGE – Volts
2
3
Figure 8. Leakage Currents as a Function of VD (VS)
–7–
–0.1
5
15
25
35 45
55
65
TEMPERATURE – ⴗC
75
85
Figure 9. Leakage Currents as a Function of Temperature
ADG706/ADG707
TA = 25ⴗC
VDD = 3V
VSS = GND
VD = 3V/1V
VS = 1V/3V
0.5
–2
0.4
ID (OFF)
0.3
IS (OFF)
0.2
0.1
ADG706
CURRENT – A
0.6
1m
ATTENUATION – dB
0.7
CURRENT – nA
10m
0
0.8
ADG707
–4
–6
VDD = +3V
10n
ID, IS (ON)
25
35 45
55
65
TEMPERATURE – ⴗC
75
85
–10
10k
100k
1M
10M
1n
10
100M
10
QINJ – pC
–80
–20
–100
–30
100k
1M
10M
100M
FREQUENCY – Hz
Figure 13. Off Isolation vs. Frequency
–40
–3
1M
10M
VDD = 5V
TA = 25ⴗC
–20
VDD = 5V
VSS = GND
0
–10
100k
0
VDD = +3.0V
VSS = –3.0V
–60
10k
Figure 12. Supply Currents vs. Input
Switching Frequency
20
–40
1k
FREQUENCY – Hz
Figure 11. On Response vs.
Frequency
VDD = 5V
TA = 25ⴗC
–20
100
FREQUENCY – Hz
ATTENUATION – dB
15
0
ATTENUATION – dB
VDD = +5V
1␮
–8
Figure 10. Leakage Currents as a
Function of Temperature
–120
30k
10␮
100n
0
–0.1
5
VDD = +3.0V
VSS = –3.0V
100␮
VDD = 3V
VSS = GND
–40
–60
–80
–100
–2
–1
0
1
2
VOLTAGE – V
3
4
Figure 14. Charge Injection vs.
Source Voltage
–8–
5
–120
30k
100k
1M
10M
100M
FREQUENCY – Hz
Figure 15. Crosstalk vs. Frequency
REV. 0
ADG706/ADG707
TEST CIRCUITS
IDS
VDD
VSS
VDD
VSS
V1
S1
D
S2
S
IDOFF
A
D
VDD
S16
VS
EN
VS
0.8V
GND
RON = V1/VDS
Test Circuit 1. On Resistance
ISOFF
VDD
VSS
VDD
VSS
Test Circuit 3. ID (OFF)
S1
A
VSS
VDD
VSS
D
S1
D
S2
VS
VDD
VD
A
VD
S16
S16
0.8V
EN
IDON
EN
VS
2.4V
GND
GND
Test Circuit 4. ID (ON)
Test Circuit 2. IS (OFF)
VDD
VSS
VDD
VSS
3V
VIN
50⍀
A3
S1
A2
S1 THRU S15
A1
ADG706*
ADDRESS
DRIVE (VIN)
VS1
D
50%
0V
VS16
S16
VS1
A0
VOUT
D
2.4V
50%
RL
300⍀
EN
GND
CL
35pF
90%
VOUT
90%
VS16
t TRANSITION
t TRANSITION
*SIMILAR CONNECTION FOR ADG707
Test Circuit 5. Switching Time of Multiplexer, tTRANSITION
VIN
50⍀
VDD
VSS
VDD
VSS
3V
A3
S1
A2
S1 THRU S15
A1
ADG706*
VS
ADDRESS
DRIVE (VIN)
D
0V
S16
A0
EN
GND
VS
VOUT
D
2.4V
RL
300⍀
CL
35pF
VOUT
80%
t OPEN
*SIMILAR CONNECTION FOR ADG707
Test Circuit 6. Break-Before-Make Delay, tOPEN
REV. 0
80%
–9–
ADG706/ADG707
VDD
VSS
VDD
VSS
3V
VS
S1
A3
ENABLE
DRIVE (VIN)
t OFF (EN)
ADG706*
A1
VO
D
EN
VOUT
RL
300⍀
GND
50⍀
0.9VO
0.9VO
A0
VIN
50%
0V
S2 THRU S16
A2
50%
OUTPUT
CL
35pF
0V
t ON(EN)
*SIMILAR CONNECTION FOR ADG707
Test Circuit 7. Enable Delay, tON (EN), tOFF (EN)
VDD
VSS
VDD
VSS
A3
3V
A2
LOGIC
INPUT (VIN)
ADG706*
A1
0V
A0
S
D
VOUT
RS
CL
1nF
EN
VS
VIN
VOUT
⌬VOUT
QINJ = CL ⴛ ⌬VOUT
GND
*SIMILAR CONNECTION FOR ADG707
Test Circuit 8. Charge Injection
VDD
VDD
VDD
S1
A3
A2
S16
A1
VS
50⍀
A0
EN**
GND
VSS
ADG706*
A0
D
2.4V
EN
A2
ADG706*
A1
VDD
A3
D
S1
VOUT
S2
RL
50⍀
VS
VSS
S16
GND
*SIMILAR CONNECTION FOR ADG707
**CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
OFF ISOLATION = 20LOG10(VOUT/VS)
OFF ISOLATION = 20LOG10 VOUT WITH SWITCH
(
)
VOUT WITHOUT SWITCH
VOUT
RL
50⍀
VSS
VSS
*SIMILAR CONNECTION FOR ADG707
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG10(VOUT/VS )
Test Circuit 10. Channel-to-Channel Crosstalk
Test Circuit 9. OFF Isolation and Bandwidth
–10–
REV. 0
ADG706/ADG707
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
C3832–8–4/00 (rev. 0)
28-Lead TSSOP
(RU-28)
0.386 (9.80)
0.378 (9.60)
28
15
0.177 (4.50)
0.169 (4.30)
0.256 (6.50)
0.246 (6.25)
1
14
PIN 1
0.006 (0.15)
0.002 (0.05)
0.0256 (0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20)
0.0035 (0.090)
8ⴗ
0ⴗ
0.028 (0.70)
0.020 (0.50)
PRINTED IN U.S.A.
SEATING
PLANE
0.0433 (1.10)
MAX
REV. 0
–11–