PD - 96112A
IRF7413QPbF
HEXFET® Power MOSFET
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Advanced Process Technology
Ultra Low On-Resistance
N Channel MOSFET
Surface Mount
Available in Tape & Reel
150°C Operating Temperature
Lead-Free
A
A
D
S
1
8
S
2
7
D
S
3
6
D
G
4
5
D
VDSS = 30V
RDS(on) = 0.011Ω
Top View
Description
These HEXFET® Power MOSFET's in SO-8 package
utilize the lastest processing techniques to achieve
extremely low on-resistance per silicon area.
Additional features of these HEXFET Power MOSFET's
are a 150°C junction operating temperature, fast
switching speed and improved repetitive avalanche
rating. These benefits combine to make this design an
extremely efficient and reliable device for use in a wide
variety of applications.
The efficient SO-8 package provides enhanced thermal
characteristics making it ideal in a variety of power
applications. This surface mount SO-8 can dramatically
reduce board space and is also available in Tape &
Reel.
SO-8
Absolute Maximum Ratings
Symbol
VDS
Parameter
Max
dv/dt
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Single Pulse Avalanche Energency
Peak Diode Recovery dv/dt
TJ, TSTG
Junction and Storage Temperature Range
VGS
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
EAS
c
e
Units
30
d
V
± 20
13
9.2
58
2.5
W
0.02
260
mW/°C
mJ
5.0
V/ns
-55 to +150
°C
A
Thermal Resistance Ratings
Symbol
RθJL
RθJA
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Parameter
h
gh
Junction-to-Drain Lead
Junction-to-Ambient
Typ
Max
–––
20
–––
50
Units
°C/W
1
08/09/10
IRF7413QPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
IGSS
Qg
Qgs
Qgd
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min
Typ
Max
Units
30
–––
–––
–––
1.0
10
–––
–––
–––
–––
–––
–––
–––
1.2
–––
–––
–––
–––
–––
–––
–––
–––
0.034
–––
–––
–––
–––
–––
–––
–––
–––
52
6.1
16
–––
8.6
50
52
46
1800
680
240
–––
–––
0.011
0.018
3.0
–––
12
25
-100
100
79
9.2
23
3.7
–––
–––
–––
–––
–––
–––
–––
V
V/°C
Min.
Typ.
Max.
Units
Ω
V
S
µA
nA
nC
ns
pF
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 7.3A
VGS = 4.5V, ID = 3.7A
VDS = VGS, ID = 250µA
VDS = 10V, ID = 3.7A
VDS = 30V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
VGS = -20V
VGS = 20V
ID = 7.3A
VDS = 24V
VGS = 10V, See Fig. 6 and 9
f
f
f
VDD = 15V
ID = 7.3A
RG = 6.2 Ω
RG = 2.0Ω, See Fig. 10
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig. 5
f
Source-Drain Ratings and Characteristics
Symbol
IS
ISM
VSD
trr
Qrr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
c
–––
–––
3.1
–––
–––
58
–––
–––
–––
–––
74
200
1.0
110
300
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 7.3A, VGS = 0V
TJ = 25°C, IF = 7.3A
di/dt = 100A/µs
e
e
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 7.3A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS,
Starting TJ = 25°C, L =9.8mH
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS =7.3A. (See Figure 12)
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T J ≤ 150°C
Surface mounted on FR-4 board
Rθ is measured at TJ approximately 90°C
2
IRF7413QPbF
100
100
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 3.0V
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 3.0V
TOP
I D, Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
10
3.0V
20µs PULSE WIDTH
TJ = 25°C
A
1
0.1
1
3.0V
10
20µs PULSE WIDTH
TJ = 150°C
A
1
0.1
10
1
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
100
TJ = 150°C
TJ = 25°C
10
V DS = 10V
20µs PULSE WIDTH
1
3.0
3.5
4.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
V DS, Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
A
4.5
I D = 7.3A
1.5
1.0
0.5
VGS = 10V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF7413QPbF
3200
V GS , Gate-to-Source Voltage (V)
2800
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
Ciss C oss = C ds + C gd
Coss
12
1600
1200
Crss
800
V DS = 24V
V DS = 15V
16
2400
2000
I D = 7.3A
400
0
1
10
100
8
4
FOR TEST CIRCUIT
SEE FIGURE 9
0
A
0
10
VDS , Drain-to-Source Voltage (V)
30
40
50
60
A
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 25°C
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
20
TJ = 150°C
100
10
VGS = 0V
1
0.4
1.2
2.0
2.8
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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A
3.6
100us
10
1ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
1
0.1
10ms
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
4
IRF7413QPbF
V DS
QG
10V
QGS
VGS
QGD
D.U.T.
RG
VG
RD
+
- VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Charge
Fig 9a. Basic Gate Charge Waveform
Fig 10a. Switching Time Test Circuit
Current Regulator
Same Type as D.U.T.
VDS
50KΩ
12V
90%
.2µF
.3µF
+
V
- DS
D.U.T.
10%
VGS
VGS
3mA
td(on)
IG
tr
t d(off)
tf
ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
100
D = 0.50
10
0.20
0.10
0.05
PDM
0.02
1
0.01
t1
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.1
0.0001
0.001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJA + TA
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
15V
L
VDS
D.U.T
RG
IAS
20V
DRIVER
+
- VDD
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRF7413QPbF
600
TOP
500
BOTTOM
ID
3.3A
6.0A
7.3A
400
300
200
100
0
25
50
75
100
125
150
Starting T J, Junction Temperature ( oC)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
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6
IRF7413QPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
Period
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 13. For N-Channel HEXFETS
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7
IRF7413QPbF
SO-8 Package Details
Dimensions are shown in milimeters (inches)
D
DIM
B
5
A
8
6
6
7
H
E
1
6X
2
3
0.25 [.010]
4
A
e
e1
8X b
0.25 [.010]
A
MILLIMETERS
MAX
MIN
.0532
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
E
.1497
.1574
3.80
4.00
e
.050 BAS IC
1.27 BAS IC
e1
A
5
INCHES
MIN
MAX
.025 BAS IC
0.635 BAS IC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
K x 45°
C
A1
y
0.10 [.004]
8X L
8X c
7
C A B
FOOT PRINT
NOT ES :
1. DIMENS IONING & T OLERANCING PER AS ME Y14.5M-1994.
8X 0.72 [.028]
2. CONT ROLLING DIMENS ION: MILLIMET ER
3. DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ].
4. OUT LINE CONFORMS T O JEDEC OUT LINE MS -012AA.
5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUS IONS NOT T O EXCEED 0.15 [.006].
6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUS IONS NOT T O EXCEED 0.25 [.010].
6.46 [.255]
7 DIMENS ION IS T HE LENGT H OF LEAD FOR S OLDERING T O
A S UBS T RAT E.
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOSFET )
INT ERNAT IONAL
RECT IFIER
LOGO
XXXX
F7101
DAT E CODE (YWW)
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
Y = LAS T DIGIT OF T HE YEAR
WW = WEEK
A = AS S EMBLY S IT E CODE
LOT CODE
PART NUMBER
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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8
IRF7413QPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 08/2010
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