TPA6133A2 www.ti.com SLOS821 – JUNE 2013 138-mW DIRECTPATH™ STEREO HEADPHONE AMPLIFIER Check for Samples: TPA6133A2 FEATURES DESCRIPTION • The TPA6133A2 is a stereo DirectPath™ headphone amplifier with GPIO control. The TPA6133A2 has minimal quiescent current consumption, with a typical IDD of 4.2 mA, making it optimal for portable applications. The GPIO control allows the device to be put in a low power shutdown mode. 1 2 • • • • • • • DirectPath™ Ground-Referenced Outputs – Eliminates Output DC Blocking Capacitors – Reduces Board Area – Reduces Component Height and Cost – Full Bass Response Without Attenuation Power Supply Voltage Range: 2.5 V to 5.5 V High Power Supply Rejection Ratio (>100 dB PSRR) Differential Inputs for Maximum Noise Rejection (69 dB CMRR) High-Impedance Outputs When Disabled Advanced Pop and Click Suppression Circuitry GPIO Control for Shutdown 20 Pin, 4 mm x 4 mm QFN Package The TPA6133A2 is a high fidelity amplifier with an SNR of 93 dB. A PSRR greater than 100 dB enables direct-to-battery connections without compromising the listening experience. The output noise of 12 μVrms (typical A-weighted) provides a minimal noise background during periods of silence. Configurable differential inputs and high CMRR allow for maximum noise rejection in the noisy environment of a mobile device. TPA6133A2 is available in a 4 by 4 mm QFN package. APPLICATIONS • • • • Mobile Phones Audio Headsets Notebook Computers High Fidelity Applications SIMPLIFIED APPLICATION DIAGRAM GPIO VBAT 2.2KQ Audio Source TEST1 SD TEST2 0.47uF LEFT_OUTM LEFTINM 0.47uF RIGHT_OUTM HPLEFT LEFTINP LEFT_OUTP 0.47uF 0.47uF RIGHT_OUTP HPRIGHT RIGHTINM GND RIGHTINP GND CPP CPN CPVSS VDD VDD VBAT 1uF 1uF 1uF 1uF 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DirectPath is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated TPA6133A2 SLOS821 – JUNE 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM TEST2 TEST1 LEFTINM HPLEFT LEFT LEFTINP INPUT STAGE DEPOP RIGHTINM HPRIGHT RIGHT RIGHTINP THERMAL CURRENT LIMIT CPP SD CHARGE PUMP CPN POWER MANAGEMENT SHUTDOWN CONTROL CPVSS VDD GND VDD GND Headphone channels and the charge pump are activated by toggling the SD pin to logic 1. The charge pump generates a negative supply voltage for the output amplifiers. This allows a 0 V bias at the outputs, eliminating the need for bulky output capacitors. The thermal block detects faults and shuts down the device before damage occurs. The current limit block prevents the output current from getting high enough to damage the device. The De-Pop block eliminates audible pops during power-up, power-down, and amplifier enable and disable events. 2 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 www.ti.com SLOS821 – JUNE 2013 20 19 18 CPVSS CPN CPP VDD GND RJT PACKAGE (Top VIEW) 17 16 1 15 LEFTINM CPVSS 2 14 LEFTINP HPLEFT Top View 3 GND 13 GND 4 12 RIGHTINP VDD 5 11 RIGHTINM HPRIGHT GND 10 GND 9 TEST1 8 TEST2 7 SD 6 Top View QFN Package (RTJ) PIN FUNCTIONS PIN PIN QFN INPUT, OUTPUT, POWER VDD 20 P Charge pump voltage supply. VDD must be connected to the common VDD voltage supply. Decouple to GND (pin 19 ) with its own 1 μF capacitor. GND 19 P Charge pump ground. GND must be connected to common supply GND. It is recommended that this pin be decoupled to the VDD of the charge pump pin (pin 20 on the QFN). CPP 18 P Charge pump flying capacitor positive terminal. Connect one side of the flying capacitor to CPP. CPN 17 P Charge pump flying capacitor negative terminal. Connect one side of the flying capacitor to CPN. LEFTINM 1 I Left channel negative differential input. Impedance must be matched to LEFTINP. Connect the left input to LEFTINM when using single-ended inputs. LEFTINP 2 I Left channel positive differential input. Impedance must be matched to LEFTINM. AC ground LEFTINP near signal source while maintaining matched impedance to LEFTINM when using single-ended inputs. CPVSS 15, 16 P Negative supply generated by the charge pump. Decouple to pin 19 or a GND plane. Use a 1 μF capacitor. HPLEFT 14 O Headphone left channel output. Connect to left terminal of headphone jack. RIGHTINM 5 I Right channel negative differential input. Impedance must be matched to RIGHTINP. Connect the right input to RIGHTINM when using single-ended inputs. RIGHTINP 4 I Right channel positive differential input. Impedance must be matched to RIGHTINM. AC ground RIGHTINP near signal source while maintaining matched impedance to RIGHTINM when using single-ended inputs. GND 3, 9, 10, 13 P Analog ground. Must be connected to common supply GND. It is recommended that this pin be used to decouple VDD for analog. Use pin 13 to decouple pin 12 on the QFN package. VDD 12 P Analog VDD. VDD must be connected to common VDD supply. Decouple with its own 1μF capacitor to analog ground (pin 13). SD 6 I Shutdown. Active low logic. 5V tolerant input. NAME DESCRIPTION 3 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 SLOS821 – JUNE 2013 www.ti.com PIN FUNCTIONS (continued) PIN NAME PIN QFN INPUT, OUTPUT, POWER TEST2 7 I Factory test pins. Pull up to VDD supply. See Applications Diagram. TEST1 8 I Factory test pins. Pull up to VDD supply. See Applications Diagram. HPRIGHT 11 O Headphone light channel output. Connect to the right terminal of the headphone jack. Die Pad P Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB. It is required for mechanical stability and will enhance thermal performance. Thermal pad DESCRIPTION ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range, TA = 25°C (unless otherwise noted) Supply voltage, VDD MAX UNIT 6 V CPVSS-0.2 V to minimum of (3.6 V, VDD+0.2 V) RIGHTINx, LEFTINx Input voltage MIN –0.3 SD, TEST1, TEST2 –0.3 Output continuous total power dissipation 7 V See Dissipation Rating Table Operating free-air temperature range, TA –40 85 °C Operating junction temperature range, TJ –40 150 °C Storage temperature range, Tstg –65 150 °C 3 kV ESD Protection HBM 12.8 Ω Minimum Load Impedance (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS TABLE (1) (2) PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR (1) (2) TA = 70°C POWER RATING TA = 85°C POWER RATING RTJ 4100 mW 41 mW/°C 2250 mW 1640 mW Derating factor measured with JEDEC High K board: 1S2P - One signal layer and two plane layers. See JEDEC Standard 51-3 for Low-K board, JEDEC Standard 51-7 for High-K board, and JEDEC Standard 51-12 for using package thermal information. Please see JEDEC document page for downloadable copies: http://www.jedec.org/download/default.cfm. AVAILABLE OPTIONS (1) (2) TA PACKAGED DEVICES (1) PART NUMBER SYMBOL –40°C to 85°C 20-pin, 4 mm × 4 mm QFN TPA6133A2RTJ (2) SIZ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. The RTJ package is only available taped and reeled. To order, add the suffix “R” to the end of the part number for a reel of 3000, or add the suffix “T” to the end of the part number for a reel of 250 (that is, TPA6133A2RTJR). RECOMMENDED OPERATING CONDITIONS Supply voltage, VDD VIH High-level input voltage TEST1, TEST2, SD VIL Low-level input voltage SD TA Operating free-air temperature MIN MAX 2.5 5.5 1.3 –40 4 UNIT V V 0.35 V 85 °C Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 www.ti.com SLOS821 – JUNE 2013 ELECTRICAL CHARACTERISTICS TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT |VOS| Output offset voltage VDD = 2.5 V to 5.5 V, inputs grounded 135 400 μV PSRR DC Power supply rejection ratio VDD = 2.5 V to 5.5 V, inputs grounded –101 -85 dB CMRR Common mode rejection ratio VDD = 2.5 V to 5.5 V |IIH| High-level input current VDD = 5.5 V, VI = VDD |IIL| Low-level input current VDD = 5.5 V, VI = 0 V IDD Supply current –69 TEST1, TEST2 dB 1 SD 10 SD VDD = 2.5 V to 5.5 V, SD = VDD Shutdown mode, VDD = 2.5V to 5.5 V, SD = 0 V µA 1 µA 4.2 6 mA 0.08 1 µA OPERATING CHARACTERISTICS VDD = 3.6 V , TA = 25°C, RL = 16 Ω (unless otherwise noted) PARAMETER PO Output power TEST CONDITIONS Stereo, Outputs out of phase, THD = 1%, f = 1 kHz, Gain = +4 dB MIN VDD = 2.5V 63 VDD = 3.6V 133 VDD = 5V 142 f = 100 Hz THD+N Total harmonic distortion plus noise PO = 35 mW Supply ripple rejection ratio MAX UNIT mW 0.0096% f = 1 kHz 0.007% f = 20 kHz 0.0021% 200 mVpp ripple, f = 217 Hz kSVR TYP -94.3 200 mVpp ripple, f = 1 kHz -85 -92 200 mVpp ripple, f = 20 kHz -77.1 SD = VDD 1.597 dB Av Channel DC Gain ΔAv Gain matching 0.1 % Slew rate 0.4 V/µs 12 µVRMS Vn Noise output voltage fosc Charge pump switching frequency VDD = 3.6V, A-weighted, Gain = +4 dB 300 Start-up time from shutdown Signal-to-noise ratio Thermal shutdown ZO HW Shutdown HP output impedance CO Output capacitance 500 kHz 4.8 ms 36.6 kΩ 93 dB Threshold 180 °C Hysteresis 35 °C 112 Ω 80 pF Differential input impedance SNR 381 V/V Po = 35 mW SD = 0 V, measured output to ground. 5 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 SLOS821 – JUNE 2013 www.ti.com Table of Graphs FIGURE Total harmonic distortion + noise versus Output power 1–4 Total harmonic distortion + noise versus Frequency 5–12 Supply voltage rejection ratio versus Frequency 13-14 Common mode rejection ratio versus Frequency 15-16 Crosstalk versus Frequency 17-18 TYPICAL CHARACTERISTICS C(PUMP, DECOUPLE, ,BYPASS, CPVSS) = 1 μF, CI = 2.2µF. All THD + N graphs taken with outputs out of phase (unless otherwise noted). TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 10 10 VDD = 3.6V f = 1kHz RL = 16Ÿ Stereo VDD = 3.6V f = 1kHz RL = 32Ÿ Stereo VDD = 2.5V f = 1kHz RL = 16Ÿ Stereo 0.1 0.01 1 THD+N (%) 1 THD+N (%) 1 THD+N (%) TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 0.1 0.01 0.1 VDD = 2.5V 0.01 Out of Phase Out of Phase In Phase In Phase VDD = 3.0V VDD = 3.6V 0.001 0.01 0.1 0.001 0.01 1 0.1 Output Power (W) VDD = 5.0V 0.001 0.001 1 0.01 Output Power (W) 0.1 1 Output Power (W) C007 C007 C006 Figure 1. Figure 2. Figure 3. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 1 1 VDD = 2.5V RL = 16Ÿ VDD = 2.5V f = 1kHz RL = 32Ÿ Stereo VDD = 3.0V RL = 16Ÿ 1 0.1 THD+N (%) 0.1 THD+N (%) THD+N (%) 0.1 0.01 0.01 VDD = 2.5V 0.01 VDD = 3.0V Po = 1mW VDD = 3.6V Po = 4mW VDD = 5.0V 0.001 0.001 Po = 5mW Po = 20mW Po = 20mW Po = 40mW 0.001 0.01 0.1 1 Output Power (W) 0.001 20 200 2k Frequency (Hz) C006 Figure 4. 20k 20 200 2k C004 Figure 5. 6 20k Frequency (Hz) C004 Figure 6. Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 www.ti.com SLOS821 – JUNE 2013 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 1 1 VDD = 3.6V RL = 16Ÿ VDD = 5.0V RL = 16Ÿ VDD = 2.5V RL = 32Ÿ 0.01 THD+N (%) 0.1 THD+N (%) 0.1 THD+N (%) 0.1 0.01 0.01 Po = 5mW Po = 5mW Po = 35mW Po = 50mW Po = 70mW Po = 1mW Po = 4mW Po = 80mW 0.001 Po = 20mW 0.001 20 200 2k 20k 0.001 20 200 Frequency (Hz) 2k 20k 20 2k 20k Frequency (Hz) C004 C004 Figure 7. Figure 8. Figure 9. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 1 1 VDD = 3.0V RL = 32Ÿ VDD = 3.6V RL = 32Ÿ VDD = 5.0V RL = 32Ÿ 0.01 THD+N (%) 0.1 THD+N (%) 0.1 THD+N (%) 0.1 0.01 0.01 Po = 5mW Po = 5mW Po = 20mW Po = 35mW Po = 40mW Po = 5mW Po = 50mW Po = 70mW 0.001 Po = 80mW 0.001 20 200 2k 20k 0.001 20 200 Frequency (Hz) 2k 20k 20 200 Frequency (Hz) 2k 20k Frequency (Hz) C004 C004 C004 Figure 10. Figure 11. Figure 12. SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY COMMON MODE REJECTION RATIO vs FREQUENCY 0 0 0 VDD = 2.5V Vrip = 0.1VPK RL = 16Ÿ Ci = 1µF Stereo -40 -60 -80 VDD = 3.6V VDD = 5.0V -40 -60 -80 -100 -100 -120 -120 VDD = 2.5V Vo = 0.1Vrms RL = 16Ÿ Ci = 1µF Stereo -10 Common-mode Rejection Ratio (dB) -20 VDD = 5.0V VDD = 2.5V Vrip = 0.1VPK RL = 32Ÿ Ci = 1µF Stereo VDD = 3.6V Supply Voltage Rejection Ratio (dB) -20 200 Frequency (Hz) C004 Supply Voltage Rejection Ratio (dB) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VDD = 3.6V VDD = 5.0V -20 -30 -40 -50 -60 -70 20 200 2k 20k Frequency (Hz) -80 20 200 2k 20k Frequency (Hz) C010 Figure 13. 20 200 2k Figure 14. 20k Frequency (Hz) C010 C010 Figure 15. 7 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 SLOS821 – JUNE 2013 www.ti.com COMMON MODE REJECTION RATIO vs FREQUENCY CROSSTALK vs FREQUENCY 0 0 0 VDD = 2.5V Vo = 0.1Vrms RL = 32Ÿ Ci = 1µF Stereo -10 VDD = 3.6V VDD = 2.5V Vo = 1Vrms RL = 16Ÿ Ci = 1µF Stereo -10 VDD = 5.0V VDD = 3.6V VDD = 5.0V -20 -30 -30 -30 -40 -50 Crosstalk (dB) -20 -40 -50 -60 -70 -70 -70 -80 -80 2k 20k Frequency (Hz) -80 20 200 2k 20k Frequency (Hz) C010 Figure 16. VDD = 5.0V -50 -60 200 VDD = 3.6V -40 -60 20 VDD = 2.5V Vo = 1Vrms RL = 32Ÿ Ci = 1µF Stereo -10 -20 Crosstalk (dB) Common-mode Rejection Ratio (dB) CROSSTALK vs FREQUENCY 20 200 2k Figure 17. 8 20k Frequency (Hz) C010 C010 Figure 18. Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 www.ti.com SLOS821 – JUNE 2013 APPLICATION INFORMATION VDD SIMPLIFIED APPLICATIONS CIRCUIT CPN CPP VDD 20 19 18 CPVSS 1uF GND 1uF 17 16 1 15 LEFTINM CPVSS 0.47uF 1uF 2 14 LEFTINP HPLEFT 0.47uF Top View 3 13 GND VDD GND 4 12 RIGHTINP VDD 0.47uF 1uF 5 11 RIGHTINM HPRIGHT 0.47uF GND 10 GND 9 TEST1 8 TEST2 7 SD 6 VDD SD 2.2KQ Headphone Amplifiers Single-supply headphone amplifiers typically require dc-blocking capacitors. The capacitors are required because most headphone amplifiers have a dc bias on the outputs pin. If the dc bias is not removed, the output signal is severely clipped, and large amounts of dc current rush through the headphones, potentially damaging them. The top drawing in Figure 19 illustrates the conventional headphone amplifier connection to the headphone jack and output signal. DC blocking capacitors are often large in value. The headphone speakers (typical resistive values of 16 Ω or 32 Ω) combine with the dc blocking capacitors to form a high-pass filter. Equation 1 shows the relationship between the load impedance (RL), the capacitor (CO), and the cutoff frequency (fC). 1 fc + 2pRLC O (1) CO can be determined using Equation 2, where the load impedance and the cutoff frequency are known. 1 CO + 2pRLf c (2) If fc is low, the capacitor must then have a large value because the load resistance is small. Large capacitance values require large package sizes. Large package sizes consume PCB area, stand high above the PCB, increase cost of assembly, and can reduce the fidelity of the audio output signal. 9 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 SLOS821 – JUNE 2013 www.ti.com Two different headphone amplifier applications are available that allow for the removal of the output dc blocking capacitors. The Capless amplifier architecture is implemented in the same manner as the conventional amplifier with the exception of the headphone jack shield pin. This amplifier provides a reference voltage, which is connected to the headphone jack shield pin. This is the voltage on which the audio output signals are centered. This voltage reference is half of the amplifier power supply to allow symmetrical swing of the output voltages. Do not connect the shield to any GND reference or large currents will result. The scenario can happen if, for example, an accessory other than a floating GND headphone is plugged into the headphone connector. See the second block diagram and waveform in Figure 19. Conventional VDD CO VOUT CO VDD/2 GND Capless VDD VOUT VBIAS GND VBIAS DirectPath TM VDD GND VSS Figure 19. Amplifier Applications The DirectPath™ amplifier architecture operates from a single supply but makes use of an internal charge pump to provide a negative voltage rail. Combining the user provided positive rail and the negative rail generated by the IC, the device operates in what is effectively a split supply mode. The output voltages are now centered at zero volts with the capability to swing to the positive rail or negative rail. The DirectPath™ amplifier requires no output dc blocking capacitors, and does not place any voltage on the sleeve. The bottom block diagram and waveform of Figure 19 illustrate the ground-referenced headphone architecture. This is the architecture of the TPA6133A2. Input-Blocking Capacitors DC input-blocking capacitors block the dc portion of the audio source, and allow the inputs to properly bias. Maximum performance is achieved when the inputs of the TPA6133A2 are properly biased. Performance issues such as pop are optimized with proper input capacitors. The dc input-blocking capacitors may be removed provided the inputs are connected differentially and within the input common mode range of the amplifier, the audio signal does not exceed ±3 V, and pop performance is sufficient. 10 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 TPA6133A2 www.ti.com SLOS821 – JUNE 2013 CIN is a theoretical capacitor used for mathematical calculations only. Its value is the series combination of the dc input-blocking capacitors, C(DCINPUT-BLOCKING). Use Equation 3 to determine the value of C(DCINPUT-BLOCKING). For example, if CIN is equal to 0.22 μF, then C(DCINPUT-BLOCKING) is equal to about 0.47 μF. 1 C CIN = (DCINPUT-BLOCKING) 2 (3) The two C(DCINPUT-BLOCKING) capacitors form a high-pass filter with the input impedance of the TPA6133A2. Use Equation 3 to calculate CIN, then calculate the cutoff frequency using CIN and the differential input impedance of the TPA6133A2, RIN, using Equation 4. Note that the differential input impedance changes with gain. See for input impedance values. The frequency and/or capacitance can be determined when one of the two values are given. 1 1 fc IN + or C IN + 2p fc R 2p RIN C IN IN IN (4) If a high pass filter with a -3 dB point of no more than 20 Hz is desired over all gain settings, the minimum impedance would be used in the above equation. shows this to be 37 kΩ. The capacitor value by the above equation would be 0.215 μF. However, this is CIN, and the desired value is for C(DCINPUT-BLOCKING). Multiplying CIN by 2 yields 0.43 μF, which is close to the standard capacitor value of 0.47 μF. Place 0.47 μF capacitors at each input terminal of the TPA6133A2 to complete the filter. Charge Pump Flying Capacitor and CPVSS Capacitor The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage. The CPVSS capacitor must be at least equal to the flying capacitor in order to allow maximum charge transfer. Low ESR capacitors are an ideal selection, and a value of 1 µF is typical. Decoupling Capacitors The TPA6133A2 is a DirectPath™ headphone amplifier that requires adequate power supply decoupling to ensure that the noise and total harmonic distortion (THD) are low. Use good low equivalent-series-resistance (ESR) ceramic capacitors, typically 1.0 µF. Find the smallest package possible, and place as close as possible to the device VDD lead. Placing the decoupling capacitors close to the TPA6133A2 is important for the performance of the amplifier. Use a 10 μF or greater capacitor near the TPA6133A2 to filter lower frequency noise signals. The high PSRR of the TPA6133A2 will make the 10 μF capacitor unnecessary in most applications. Layout Recommendations Exposed Pad On TPA6133A2RTJ Package Solder the exposed metal pad on the TPA6133A2RTJ QFN package to the a pad on the PCB. The pad on the PCB may be grounded or may be allowed to float (not be connected to ground or power). If the pad is grounded, it must be connected to the same ground as the GND pins (3, 9, 10, 13, and 19). See the layout and mechanical drawings at the end of the datasheet for proper sizing. Soldering the thermal pad improves mechanical reliability, improves grounding of the device, and enhances thermal conductivity of the package. GND Connections The GND pin for charge pump should be decoupled to the charge pump VDD pin, and the GND pin adjacent to the Analog VDD pin should be separately decoupled to each other. Modes of Operation The TPA6133A2 supports two modes of operation. When the SD pin is driven to logic 0, the device is in low power mode where the charge pump is powered down, the headphone channel is disabled and the outputs are weakly pulled to ground. When the SD pin is driven to logic 1, the device enters an active mode with charge pump powered up and headphone channel enabled with channel gain of +4dB. The transition from inactive to active and active to inactive states is done softly to avoid audible artifacts. 11 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPA6133A2 PACKAGE OPTION ADDENDUM www.ti.com 9-Aug-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) TPA6133A2RTJR ACTIVE QFN RTJ 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 SIZ TPA6133A2RTJT ACTIVE QFN RTJ 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 SIZ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPA6133A2RTJR QFN RTJ 20 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 TPA6133A2RTJT QFN RTJ 20 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPA6133A2RTJR QFN RTJ 20 3000 367.0 367.0 35.0 TPA6133A2RTJT QFN RTJ 20 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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