TI TPA6136A2YFFR

TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
25-mW DIRECTPATH™ STEREO HEADPHONE AMPLIFIER WITH POP SUPPRESSION
FEATURES
1
• Patented DirectPath™ Technology Eliminates
Need for DC-Blocking Capacitors
– Outputs Biased at 0 V
– Excellent Low Frequency Fidelity
• Active Click and Pop Suppression
• HI-Z Output Mode Allows Sharing Output Jack
• 2.1 mA Typical Supply Current
• Fully Differential Inputs Reduce System Noise
– Also Configurable as Single-Ended Inputs
• SGND Pin Eliminates Ground Loop Noise
• Constant Maximum Output Power from 2.3 V
to 5.5 V Supply
– Simplifies Design to Prevent Acoustic
Shock
• MicrosoftTM Windows VistaTM Compliant
• 100 dB Power Supply Noise Rejection
• Wide Power Supply Range: 2.3 V to 5.5 V
• Gain Settings: 0 dB and 6 dB
• Short-Circuit and Thermal-Overload Protection
• ±8 kV HBM ESD Protected Outputs
• Small Package Available
– 16-Ball, 1.6 x 1.6 mm, 0.4 mm Pitch WCSP
23
APPLICATIONS
•
•
•
•
Smart Phones / Cellular Phones
Portable Media / MP3 Players
Notebook Computers
Portable Gaming
The TPA6136A2 (TPA6136) features fully differential
inputs with an integrated low pass filter to reduce
system noise pickup between the audio source and
the headphone amplifier and to reduce DAC
out-of-band noise. The high power supply noise
rejection performance and differential architecture
provides increased RF noise immunity. For
single-ended input signals, connect INL+ and INR+ to
ground.
The device has built-in pop suppression circuitry to
completely eliminate disturbing pop noise during
turn-on and turn-off. The amplifier outputs have
short-circuit and thermal-overload protection along
with ±8 kV HBM ESD protection, simplifying end
equipment compliance to the IEC 61000-4-2 ESD
standard.
The TPA6136A2 (TPA6136) operates from a single
2.3 V to 5.5 V supply with 2.1 mA of typical supply
current. Shutdown mode reduces supply current to
less than 1 µA.
OUTR+
INR+
OUTR-
INR-
OUTL+
INL+
OUTL-
INL-
CODEC
OUTR
TPA6136A2
OUTL
SGND
ENABLE
GAIN
EN
GAIN
HI-Z MODE
VBAT
HI-Z
VDD
GND
HPVSS
HPVDD
CPP
CPN
DESCRIPTION
The TPA6136A2 (sometimes referred to as TPA6136)
is a DirectPath™ stereo headphone amplifier that
eliminates the need for external dc-blocking output
capacitors. Differential stereo inputs and built-in
resistors set the device gain, further reducing external
component count. Gain is selectable at 0 dB or 6 dB.
The amplifier drives 25 mW into 16 Ω speakers from
a single 2.3 V supply. The TPA6136A2 (TPA6136)
provides a constant maximum output power
independent of the supply voltage, thus facilitating the
design for prevention of acoustic shock.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DirectPath is a trademark of Texas Instruments.
Windows Vista is a trademark of Microsoft Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TPA6136A2
SLOS621A – JULY 2009 – REVISED AUGUST 2009 ........................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
VDD
HPVDD
Supply
Control
2.2 mF
GND
HPVDD
–
INL+
Resistor
Array
OUTL
+
INL-
Short-Circuit
Protection
HPVSS
Thermal
Protection
HPVDD
Resistor
Array
OUTR
+
INR+
–
INR-
HPVDD
HPVSS
CPP
GAIN
Click-and-Pop
Suppression
Control
HI-Z
Charge
Pump
1 mF
CPN
HPVSS
2.2 mF
SGND
EN
2
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :TPA6136A2
TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
DEVICE PINOUT
WCSP PACKAGE
(TOP VIEW)
A1
A2
A3
A4
EN
VDD
OUTL
INL-
B1
B2
B3
B4
GND
CPP
HPVDD
INL+
C1
C2
C3
C4
CPN
HPVSS
SGND
INR+
D1
D2
D3
D4
HI-Z
GAIN
OUTR
INR-
PIN FUNCTIONS
PIN
NAME
WCSP
I/O/P
PIN DESCRIPTION
INL-
A4
I
Inverting left input for differential signals; left input for single-ended signals
INL+
B4
I
Non-inverting left input for differential signals. Connect to ground for single-ended input applications
INR+
C4
I
Non-inverting right input for differential signals. Connect to ground for single-ended input applications
INR-
D4
I
Inverting right input for differential signals; right input for single-ended signals
OUTR
D3
O
Right headphone amplifier output. Connect to right terminal of headphone jack
HI-Z
D1
I
Output impedance select. Set to logic LOW for normal operation and to logic HIGH for high output
impedance
GAIN
D2
I
Gain select. Set to logic LOW for a gain of 0dB and to logic HIGH for a gain of 6dB
HPVSS
C2
P
Charge pump output and negative power supply for output amplifiers; connect 1µF capacitor to GND
CPN
C1
P
Charge pump negative flying cap. Connect to negative side of 1µF capacitor between CPP and CPN
GND
B1
P
Ground
CPP
B2
P
Charge pump positive flying cap. Connect to positive side of 1µF capacitor between CPP and CPN
HPVDD
B3
P
Positive power supply for headphone amplifiers. Connect to a 2.2µF capacitor. Do not connect to VDD
EN
A1
I
Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate
VDD
A2
P
Positive power supply for TPA6136A2
SGND
C3
I
Amplifier reference voltage. Connect to ground terminal of headphone jack
OUTL
A3
O
Left headphone amplifier output. Connect to left terminal of headphone jack
3
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Product Folder Link(s) :TPA6136A2
TPA6136A2
SLOS621A – JULY 2009 – REVISED AUGUST 2009 ........................................................................................................................................................ www.ti.com
BOARD LAYOUT CONCEPT
Battery
Supply
Enable
Control
A1
A2
A3
A4
EN
VDD
OUTL
INL-
B1
B2
B3
B4
GND
CPP
HPVDD
INL+
C1
C2
C3
C4
CPN
HPVSS
SGND
INR+
D1
D2
D3
D4
Hi-Z
GAIN
OUTR
INR-
Audio Inputs –
Matched board layout
for differential input
signals
High-Z
Gain
Headphone
Connector
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range, TA = 25°C (unless otherwise noted)
VALUE / UNIT
VI
Supply voltage, VDD
–0.3 V to 6.0 V
Headphone amplifier supply voltage, HPVDD (do not connect to external supply)
–0.3 V to 1.9 V
Input voltage (INR+, INR–, INL+, INL–)
1.4 VRMS
Output continuous total power dissipation
See Dissipation Rating Table
TA
Operating free-air temperature range
–40°C to 85°C
TJ
Operating junction temperature range
–40°C to 150°C
Tstg
Storage temperature range
–65°C to 150°C
ESD Protection – HBM
OUTL, OUTR
8 kV
All Other Pins
2 kV
ORDERING GUIDE
(1)
(2)
TA
PACKAGED DEVICES (1)
–40°C to 85°C
16–ball, 1.6 mm × 1.6 mm WCSP
PART NUMBER (2)
TPA6136A2YFFR
TPA6136A2YFFT
SYMBOL
AOWI
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
The YFF package is only available taped and reeled. The suffix “R” indicates a reel of 3000; the suffix “T” indicates a reel of 250.
4
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :TPA6136A2
TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
DISSIPATION RATINGS TABLE
TA ≤ 25°C
POWER RATING
YFF (WCSP)
1250 mW
(1)
PACKAGE
DERATING FACTOR
(1)
10 mW/°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
800 mW
650 mW
See JEDEC Standard 51-3 for Low-K board, JEDEC Standard 51-7 for High-K board, and JEDEC Standard 51-12 for using package
thermal information. See JEDEC document page for downloadable copies: http://www.jedec.org/download/default.cfm.
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
Supply voltage, VDD
2.3
5.5
VIH
High-level input voltage; EN, GAIN, HI-Z
1.3
VIL
Low-level input voltage; EN, GAIN, HI-Z
TA
UNIT
V
V
0.6
V
V
Voltage applied to Output; OUTR, OUTL (when EN = 0 V)
–0.3
3.6
Voltage applied to Output; OUTR, OUTL (when EN ≥ 1.3 V and HI–Z ≥ 1.3 V)
–1.8
1.8
V
Operating free-air temperature
–40
85
°C
TYP
MAX
ELECTRICAL CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Output offset voltage
Power supply rejection ratio
MIN
–0.5
VDD = 2.3 V to 5.5 V
0.5
100
UNIT
mV
dB
High-level output current (EN, GAIN, HI-Z)
1
µA
Low-level output current (EN, GAIN, HI-Z)
1
µA
Supply Current
Shutdown Supply Current
VDD = 2.3 V, No load, EN = VDD
2.1
2.8
VDD = 3.6 V, No load, EN = VDD
2.1
2.8
VDD = 5.5 V, No load, EN = VDD
2.2
2.9
VDD = 2.3 V to 5.5 V, No load, EN = HI-Z = V,
0.7
1.2
EN = 0 V, VDD = 2.3 V to 5.5 V
0.7
1.2
mA
µA
5
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Product Folder Link(s) :TPA6136A2
TPA6136A2
SLOS621A – JULY 2009 – REVISED AUGUST 2009 ........................................................................................................................................................ www.ti.com
OPERATING CHARACTERISTICS
VDD = 3.6 V , TA = 25°C, RL = 16 Ω (unless otherwise noted)
PARAMETER
PO
Output power (1) (Outputs in phase)
VO
Output voltage(1) (Outputs in phase)
AV
Closed-loop voltage gain (OUT / IN–)
ΔAv
Gain matching
Input impedance (per input pin)
RIN
Input impedance in shutdown
(per input pin)
VCM
TEST CONDITIONS
MIN
25
THD = 1%, f = 1 kHz, RL = 32 Ω
22
THD = 1%, VDD = 3.6 V, f = 1 kHz, RL = 100 Ω
1.1
VRMS
–1.0
–1.05
GAIN ≥ 1.3 V (6 dB)
–1.95
–2.0
–2.05
Between Left and Right channels
UNIT
mW
–0.95
V/V
1%
GAIN = 0 V (0 dB)
19.8
GAIN ≥ 1.3 V (6 dB)
13.2
EN = 0 V
kΩ
10
–0.5
EN = HI-Z ≥ 1.3 V, f = 10 kHz
1.5
V
40
EN = HI-Z ≥ 1.3 V, f = 1 MHz
4.5
EN = HI-Z ≥ 1.3 V, f = 10 MHz
0.75
EN = 0 V (shutdown mode)
Input-to-output attenuation in shutdown
MAX
GAIN = 0 V, (0 dB)
Input common-mode voltage range
Output Impedance
TYP
THD = 1%, f = 1 kHz
EN = 0 V
200 mVpp ripple, f = 217 Hz
–80
kΩ
25
Ω
80
dB
-100
AC
PSRR
AC-power supply rejection ratio
THD+N
Total harmonic distortion plus noise (2)
SNR
Signal-to-noise ratio
PO = 20 mW; GAIN = 0 V, (AV = 0 dB)
100
dB
En
Noise output voltage
A-weighted
5.5
µVRMS
fosc
Charge pump switching frequency
tON
Start-up time from shutdown
Crosstalk
Thermal shutdown
(1)
(2)
200 mVpp ripple, f = 10 kHz
dB
-90
PO = 20 mW, f = 1 kHz
0.02%
PO = 25 mW into 32 Ω, VDD = 5.5 V, f = 1 kHz
0.01%
1200
1275
1350
kHz
5
ms
PO = 20 mW, f = 1 kHz
–80
dB
Threshold
150
°C
Hysteresis
20
°C
Per output channel
A-weighted
6
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Product Folder Link(s) :TPA6136A2
TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
TYPICAL CHARACTERISTICS
TA = 25°C, VDD = 3.6 V, Gain = 0 dB, EN = 3.6 V, CHPVDD = CHPVSS = 2.2 µF, CINPUT = CFLYING = 1 µF, Outputs in
Phase
TOTAL HARMONIC DISTORTION + NOISE vs
OUTPUT POWER
TOTAL HARMONIC DISTORTION + NOISE vs
OUTPUT POWER
10
THD+N - Total Harmonic Distortion + Noise - %
THD+N - Total Harmonic Distortion + Noise - %
10
RL = 16 W,
f = 1kHz
VDD = 2.5 V, In Phase
VDD = 3.6 V, In Phase
1
VDD = 2.5 V, Out of Phase
VDD = 3.6 V, Out of Phase
0.1
0.01
0.1
1
10
PO - Output Power per Channel - mW
VDD = 3.6 V, In Phase
1
VDD = 2.5 V, Out of Phase
VDD = 3.6 V, Out of Phase
0.1
1
10
PO - Output Power per Channel - mW
50
Figure 1.
Figure 2.
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
THD+N - Total Harmonic Distortion + Noise - %
THD+N - Total Harmonic Distortion + Noise - %
VDD = 2.5 V, In Phase
0.01
0.1
50
1
RL = 16 W,
VDD = 2.5 V
PO = 1 mW per Channel
0.1
0.01
PO = 4 mW per Channel
PO = 10 mW per Channel
0.001
20
100
1k
f - Frequency - Hz
10k
RL = 16 W,
VDD = 3.6 V
PO = 1 mW per Channel
0.1
PO = 20 mW per Channel
0.01
PO = 10 mW per Channel
0.001
20
20k
100
1k
f - Frequency - Hz
10k
20k
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
1
THD+N - Total Harmonic Distortion + Noise - %
THD+N - Total Harmonic Distortion + Noise - %
RL = 32 W,
f = 1kHz
RL = 16 W,
VDD = 5 V
PO = 1 mW per Channel
0.1
PO = 20 mW per Channel
0.01
PO = 10 mW per Channel
0.001
20
100
1k
f - Frequency - Hz
10k
20k
RL = 32 W,
VDD = 2.5 V
PO = 1 mW per Channel
0.1
PO = 4 mW per Channel
0.01
0.001
20
Figure 5.
PO = 10 mW per Channel
100
1k
f - Frequency - Hz
10k
20k
Figure 6.
7
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TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY
1
THD+N - Total Harmonic Distortion + Noise - %
THD+N - Total Harmonic Distortion + Noise - %
1
RL = 32 W,
VDD = 3.6 V
PO = 1 mW per Channel
0.1
PO = 10 mW per Channel
0.01
PO = 20 mW per Channel
0.001
20
100
1k
f - Frequency - Hz
10k
20k
RL = 32 W,
VDD = 5 V
PO = 1 mW per Channel
0.1
PO = 20 mW per Channel
0.01
PO = 10 mW per Channel
0.001
20
100
Figure 7.
10k
20k
Figure 8.
OUTPUT POWER vs SUPPLY VOLTAGE
OUTPUT POWER vs SUPPLY VOLTAGE
50
50
RL = 16 W
45
45
PO - Output Power per Channel - mW
PO - Output Power per Channel - mW
1k
f - Frequency - Hz
40
THD+N = 10%
35
30
THD+N = 1%
25
20
15
10
5
RL = 32 W
40
35
THD+N = 10%
30
25
THD+N = 1%
20
15
10
5
0
2.5
3
3.5
4
4.5
VDD - Supply Voltage - V
5
0
2.5
5.5
3
Figure 9.
3.5
4
4.5
VDD - Supply Voltage - V
5
5.5
Figure 10.
OUTPUT POWER vs LOAD RESISTANCE
OUTPUT POWER vs LOAD RESISTANCE
30
40
VDD = 3.6 V, 10% THD+N
10
VDD = 2.5 V, 10% THD+N
VDD = 2.5 V, 1% THD+N
VDD = 3.6 V, 1% THD+N
25
HPVSS and Flying Cap = 2.2 mF
20
15
HPVSS and Flying Cap = 0.47 mF
10
5
THD+N = 1%,
VDD = 3.6 V
f = 1 kHz
1
10
PO - Output Power per Channel - mW
PO - Output Power per Channel - mW
HPVSS and Flying Cap = 1 mF
100
RL - Load Resistance - W
1000
0
10
100
200
RL - Load Resistance - W
Figure 11.
Figure 12.
8
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Product Folder Link(s) :TPA6136A2
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TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE vs SUPPLY VOLTAGE
SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY
2
VO - Output Voltage - Vrms
1.6
1.4
Load = 600 W
1.2
1
Load = 32 W
0.8
0.6
Load = 16 W
0.4
0.2
0
2.5
3
3.5
4
4.5
5
-10
Ksvr - Supply Voltage Rejection Ratio - dB
f = 1 kHz,
THD+N = 1%
1.8
5.5
RL = 16 W
-30
-50
-70
VDD = 5 V
VDD = 2.5 V
VDD = 3.6 V
-90
-110
20
100
VDD - Supply Voltage - V
1k
f - Frequency - Hz
Figure 13.
10k
20k
Figure 14.
SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY
QUIESCENT SUPPLY CURRENT vs SUPPLY VOLTAGE
-10
9
RL = 32 W
-30
-50
-70
VDD = 3.6 V
VDD = 5 V
VDD = 2.5 V
-90
EN = 1.3 V,
No Load
8
Quiescent Supply Current - mA
Ksvr - Supply Voltage Rejection Ratio - dB
10
7
6
5
4
3
2
1
-110
20
100
1k
f - Frequency - Hz
10k
0
2.5
20k
3
3.5
4
4.5
VDD - Supply Voltage - V
Figure 15.
5.5
Figure 16.
SUPPLY CURRENT vs TOTAL OUTPUT POWER
SUPPLY CURRENT vs TOTAL OUTPUT POWER
100
100
RL = 16 W,
f = 1kHz
RL = 32 W,
f = 1kHz
IDD - Supply Current - mA
VDD = 3 V
IDD - Supply Current - mA
5
VDD = 5 V
10
VDD = 2.5 V
VDD = 5 V
10
VDD = 3.6 V
VDD = 3 V
VDD = 3.6 V
1
0.001
0.01
VDD = 2.5 V
0.1
1
PO - Total Output Power - mW
10
50
1
0.001
Figure 17.
0.01
0.1
1
PO - Total Output Power - mW
10
50
Figure 18.
9
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TYPICAL CHARACTERISTICS (continued)
CROSSTALK vs FREQUENCY
OUTPUT SPECTRUM vs FREQUENCY
0
-10
RL = 16 W,
Power = 15 mW,
VDD = 3.6 V
-30
VO - Output Amplitude - dBV
-20
-40
Crosstalk - dB
Single Channel,
Load = 16 W,
VDD = 3.6 V
-60
-80
-100
-50
-70
-90
-110
-130
-120
-140
20
100
1k
f - Frequency - Hz
10k
-150
0
20k
5000
10000
f - Frequency - Hz
Figure 19.
20000
Figure 20.
HI-Z OUTPUT IMPEDANCE vs FREQUENCY
STARTUP WAVEFORMS vs TIME
5
100k
VDD = 3.6 V,
EN = 3.6 V,
HiZ = 3.6 V
4
EN
3
Right Channel
10k
V - Voltage - V
ZO - H-Z Output Impedance - W
15000
Left Channel
2
1
VOUT
0
1k
-1
Load = 16 W,
VDD = 3.6 V,
VI = 0.5 VRMS at 1 kHz
-2
100
10
-3
100
1000
10k
100k
1M
10M
100M
0
2
4
6
t - Time - ms
f - Frequency - Hz
Figure 21.
8
10
Figure 22.
SHUTDOWN WAVEFORMS vs TIME
5
Load = 16 W,
VDD = 3.6 V,
VI = 0.5 VRMS at 20 kHz
4
EN
V - Voltage - V
3
2
1
VOUT
0
-1
-2
-3
0
50
100
t - Time - ms
150
200
Figure 23.
10
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APPLICATION INFORMATION
APPLICATION CIRCUIT
0.22 µF x 4
INR+
OUTR
INRTPA2012D2
INL+
OUTL
INL-
0.22 µF x 4
ABB
or
TLV320AIC33
TLV320AIC3104
TLV320DAC32
PCM1774
OUTR+
INR+
OUTR–
INR-
OUTR
OUTL+
INL+
OUTL
OUTL–
INL-
TPA6136A2
SGND
ENABLE
GAIN
HI-Z MODE
VBAT
2.2 µF
EN
GND
GAIN
HI-Z
VDD
HPVSS
HPVDD
CPP
CPN
1 µF
2.2 µF
1 µF
Figure 24. Typical Application Configuration with Differential Input Signals
1 µF
RIGHT IN
INRINR+
OUTR
LEFT IN
1 µF
INL-
TPA6136A2
OUTL
INL+
SGND
ENABLE
GAIN
EN
HI-Z MODE
HI-Z
VBAT
VDD
2.2 µF
GND
GAIN
HPVDD
HPVSS
CPP
CPN
1 µF
2.2 µF
1 µF
Figure 25. Typical Application Configuration with Single-Ended Input Signals
11
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GAIN CONTROL
The TPA6136A2 has two gain settings which are controlled with the GAIN pin. The following table gives an
overview of the gain function.
GAIN VOLTAGE
AMPLIFIER GAIN
≤ 0.6 V
0 dB
≥ 1.3 V
6 dB
Table 1. Windows Vista™ Premium Mobile Mode Specifications
Device Type
Requirement
Windows Premium Mobile Vista
Specifications
TPA6136A2 Typical Performance
THD+N
≤ –65 dB FS [20 Hz, 20 kHz]
–75 dB FS [20 Hz, 20 kHz]
Analog Speaker Line Jack
[RL = 10 kΩ, FS = 0.707
Vrms]
Dynamic Range with Signal
Present
≤ –80 dB FS A-Weight
–100 dB FS A-Weight
Analog Headphone Out Jack
[RL = 32Ω, FS = 0.300 Vrms]
Line Output Crosstalk
≤ –60 dB [20 Hz, 20 kHz]
–90 dB [20 Hz, 20 kHz]
THD+N
≤ –45 dB FS [20 Hz, 20 kHz]
–65 dB FS [20 Hz, 20 kHz]
Dynamic Range with Signal
Present
≤ –80 dB FS A-Weight
–94 dB FS A-Weight
Headphone Output Crosstalk
≤ –60 dB [20 Hz, 20 kHz]
–90 dB [20 Hz, 20 kHz]
HIGH OUTPUT IMPEDANCE
The TPA6136A2 has a HI-Z control pin that increases output impedance while muting the amplifier. Apply a
voltage greater than 1.3 V to the HI-Z and EN pin to activate the HI-Z mode. This feature allows the headphone
output jack to be shared for other functions besides audio. For example, sharing of a headphone jack between
audio and video as shown in Figure 26. The TPA6136A2 output impedance is high enough to prevent
attenuating the video signal.
Enable Voltage
HI-Z Voltage
Output Impedance
≤ 0.6 V
≤ 0.6 V
20 Ω – 30 Ω
≤ 0.6 V
≥ 1.3 V
20 Ω –30 Ω
≥ 1.3 V
≤ 0.6 V
Maximum
External Voltage
Applied to the
Output Pins
Comments
–0.3 V to 3.3 V (1)
Shutdown Mode
–
Active Mode
–1.8 V to 1.8 V
HI-Z Mode
≤1Ω
40 kΩ @ 10 kHz
≥ 1.3 V
≥ 1.3 V
4.5 kΩ @ 1 MHz
750 Ω @ 10 MHz
(1)
If VDD is < 3.3 V, then maximum allowed external voltage applied is VDD in this mode
Video Buffer/Amp
(i.e: THS7375)
+
75 W
–
TPA6136A2
OUTR
OUTL
Figure 26. Sharing One Connector Between Audio and Video Signals Example
12
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Product Folder Link(s) :TPA6136A2
TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
GROUND SENSE FUNCTION
The ground sense pin, SGND, reduces ground-loop noise when the audio output jack is connected to a different
ground reference than codec and amplifier ground. Always connect the SGND pin to the headphone jack. This
reduces output offset voltage and eliminates turn-on pop. Figure 27 shows how to connect SGND when an FM
radio antenna function is implemented on the headphone wire. The nH coil and capacitor separate the RF signal
from the audio GND signal. In this case, SGND is used to eliminate the offset voltage that is generated from the
audio signal current and the RF coil low-frequency impedance.
The voltage difference between SGND and AGND cannot be greater than ±300 mV. The amplifier performance
degrades if the voltage difference between SGND and AGND is greater than ±300 mV.
OUTR+
INR+
OUTR-
INR-
OUTL+
INL+
OUTL-
INL-
CODEC
OUTR
TPA6136A2
OUTL
SGND
ENABLE
GAIN
EN
GAIN
HI-Z MODE
VBAT
HI-Z
VDD
FM Tuner
GND
nH Coil
HPVSS
HPVDD
CPP
CPN
Figure 27. Typical Application Circuit Using Ground Sense Function
HEADPHONE AMPLIFIERS
Single-supply headphone amplifiers typically require dc-blocking capacitors to remove dc bias from their output
voltage. The top drawing in Figure 28 illustrates this connection. If dc bias is not removed, large dc current will
flow through the headphones which wastes power, clips the output signal, and potentially damages the
headphones.
These dc-blocking capacitors are often large in value and size. Headphone speakers have a typical resistance
between 16 Ω and 32 Ω. This combination creates a high-pass filter with a cutoff frequency as shown in
Equation 1, where RL is the load impedance, CO is the dc-block capacitor, and fC is the cutoff frequency.
1
fc =
2pRLCO
(1)
For a given high-pass cutoff frequency and load impedance, the required dc-blocking capacitor is found as:
CO =
1
2p ¦C RL
(2)
Reducing fC improves low frequency fidelity and requires a larger dc-blocking capacitor. To achieve a 20 Hz
cutoff with 16 Ω headphones, CO must be at least 500 µF. Large capacitor values require large packages,
consuming PCB area, increasing height, and increasing cost of assembly. During start-up or shutdown the
dc-blocking capacitor has to be charged or discharged. This causes an audible pop on start-up and power-down.
Large dc-blocking capacitors also reduce audio output signal fidelity.
Two different headphone amplifier architectures are available to eliminate the need for dc-blocking capacitors.
The Capless amplifier architecture provides a reference voltage to the headphone connector shield pin as shown
in the middle drawing of Figure 28. The audio output signals are centered around this reference voltage, which is
typically half of the supply voltage to allow symmetrical output voltage swing.
13
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Product Folder Link(s) :TPA6136A2
TPA6136A2
SLOS621A – JULY 2009 – REVISED AUGUST 2009 ........................................................................................................................................................ www.ti.com
When using a Capless amplifier do not connect the headphone jack shield to any ground reference or large
currents will result. This makes Capless amplifiers ineffective for plugging non-headphone accessories into the
headphone connector. Capless amplifiers are useful only with floating GND headphones.
Conventional
CO
VOUT
CO
GND
Capless
VOUT
GND
VBIAS
DirectPath™
VDD
GND
VSS
Figure 28. Amplifier Applications
The DirectPath™ amplifier architecture operates from a single supply voltage and uses an internal charge pump
to generate a negative supply rail for the headphone amplifier. The output voltages are centered around 0 V and
are capable of positive and negative voltage swings as shown in the bottom drawing of Figure 28. DirectPath
amplifiers require no output dc-blocking capacitors. The headphone connector shield pin connects to ground and
will interface with headphones and non-headphone accessories. The TPA6136A2 is a DirectPath amplifier.
ELIMINATING TURN-ON POP AND POWER SUPPLY SEQUENCING
The TPA6136A2 has excellent noise and turn-on / turn-off pop performance. It uses an integrated click-and-pop
suppression circuit to allow fast start-up and shutdown without generating any voltage transients at the output
pins. Typical start-up time from shutdown is 5 ms.
DirectPath technology keeps the output dc voltage at 0 V even when the amplifier is powered up. The DirectPath
technology together with the active pop-and-click suppression circuit eliminates audible transients during start up
and shutdown.
Use input coupling capacitors to ensure inaudible turn-on pop. Activate the TPA6136A2 after all audio sources
have been activated and their output voltages have settled. On power-down, deactivate the TPA6136A2 before
deactivating the audio input source. The EN pin controls device shutdown: Set to 0.6 V or lower to deactivate the
TPA6136A2; set to 1.3 V or higher to activate.
14
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :TPA6136A2
TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
RF AND POWER SUPPLY NOISE IMMUNITY
The TPA6136A2 employs a new differential amplifier architecture to achieve high power supply noise rejection.
Power supply noise is common in modern electronics. Although power supply noise frequencies are much higher
than the 20 kHz audio band, signal modulation often falls in-band. This, in turn, modulates the supply voltage,
allowing a coupling path into the audio amplifier. A common example is the 217 Hz GSM frame-rate buzz often
heard from an active speaker when a cell phone is placed nearby during a phone call.
The TPA6136A2 has excellent rejection of power supply noise, preventing audio signal degradation.
CONSTANT MAXIMUM OUTPUT POWER AND ACOUSTIC SHOCK PREVENTION
Typically the output power increases with increasing supply voltage on an unregulated headphone amplifier. The
TPA6136A2 maintains a constant output power independent of the supply voltage. Thus the design for
prevention of acoustic shock (hearing damage due to exposure to a loud sound) is simplified since the output
power will remain constant, independent of the supply voltage. This feature allows maximizing the audio signal at
the lowest supply voltage.
INPUT COUPLING CAPACITORS
Input coupling capacitors block any dc bias from the audio source and ensure maximum dynamic range. Input
coupling capacitors also minimize TPA6136A2 turn-on pop to an inaudible level.
The input capacitors are in series with TPA6136A2 internal input resistors, creating a high-pass filter. Equation 3
calculates the high-pass filter corner frequency. The input impedance, RIN, is dependent on device gain. Larger
input capacitors decrease the corner frequency. See the Operating Characteristics table for input impedance
values.
1
fC =
2 p RIN CIN
(3)
For a given high-pass cutoff frequency, the minimum input coupling capacitor is found as:
1
CIN =
2 p ¦ C RIN
(4)
Example: Design for a 20 Hz corner frequency with a TPA6136A2 gain of +6 dB. The Operating Characteristics
table gives RIN as 13.2 kΩ. Equation 4 shows the input coupling capacitors must be at least 0.6 µF to achieve a
20 Hz high-pass corner frequency. Choose a 0.68 µF standard value capacitor for each TPA6136A2 input (X5R
material or better is required for best performance).
Input capacitors can be removed provided the TPA6136A2 inputs are driven differentially with less than ±1 VRMS
and the common-mode voltage is within the input common-mode range of the amplifier. Without input capacitors
turn-on pop performance may be degraded and should be evaluated in the system.
CHARGE PUMP FLYING CAPACITOR AND HPVSS CAPACITOR
The TPA6136A2 uses a built-in charge pump to generate a negative voltage supply for the headphone
amplifiers. The charge pump flying capacitor connects between CPP and CPN. It transfers charge to generate
the negative supply voltage. The HPVSS capacitor must be at least equal in value to the flying capacitor to allow
maximum charge transfer. Use low equivalent-series-resistance (ESR) ceramic capacitors (X5R material or
better is required for best performance) to maximize charge pump efficiency. Typical values are 1 µF to 2.2 µF
for the HPVSS and flying capacitors. Although values down to 0.47 µF can be used, total harmonic distortion
(THD) will increase.
OPERATION WITH DACs AND CODECs AND INPUT RF NOISE REJECTION
When using amplifiers with CODECs and DACs, sometimes there is an increase in the output noise floor from
the audio amplifier. This occurs when the output out–of–band noise of the CODEC/DAC folds back into the audio
frequency due to the limited gain bandwidth product of the audio amplifier. Single–ended RF noise can also fold
back into the audio band thus degrading the audio signal even further.
15
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Product Folder Link(s) :TPA6136A2
TPA6136A2
SLOS621A – JULY 2009 – REVISED AUGUST 2009 ........................................................................................................................................................ www.ti.com
The TPA6136A2 has a built-in low-pass filter to reduce CODEC/DAC out–of–band noise and RF noise, that
could fold back into the audio frequency.
POWER SUPPLY AND HPVDD DECOUPLING CAPACITORS AND CONNECTIONS
The TPA6136A2 DirectPath headphone amplifier requires adequate power supply decoupling to ensure that
output noise and total harmonic distortion (THD) remain low. Use good low equivalent-series-resistance (ESR)
ceramic capacitors (X5R material or better is required for best performance). Place a 2.2 µF capacitor within
5 mm of the VDD pin. Reducing the distance between the decoupling capacitor and VDD minimizes parasitic
inductance and resistance, improving TPA6136A2 supply rejection performance. Use 0402 or smaller size
capacitors if possible. Ensure that the ground connection of each of the capacitors has a minimum length return
path to the device. Failure to properly decouple the TPA6136A2 may degrade audio or EMC performance.
For additional supply rejection, connect an additional 10 µF or higher value capacitor between VDD and ground.
This will help filter lower frequency power supply noise. The high power supply rejection ratio (PSRR) of the
TPA6136A2 makes the 10 µF capacitor unnecessary in most applications.
Connect a 2.2 µF capacitor between HPVDD and ground. This ensures the amplifier internal bias supply remains
stable and maximizes headphone amplifier performance.
WARNING:
DO NOT connect HPVDD directly to VDD or an external supply voltage. The
voltage at HPVDD is generated internally. Connecting HPVDD to an external
voltage can damage the device.
PACKAGE INFORMATION
Package Dimensions
The package dimensions for this YFF package are shown in the table below. See the package drawing at the
end of this data sheet for more details.
Table 2. YFF Package Dimensions
Packaged Devices
D
E
TPA6136A2YFF
Min = 1530µm
Max = 1590µm
Min = 1530µm
Max = 1590µm
LAYOUT RECOMMENDATIONS
GND CONNECTIONS
The SGND pin is an input reference and must be connected to the headphone ground connector pin. This
ensures no turn-on pop and minimizes output offset voltage. Do not connect more than ±0.3 V to SGND.
GND is a power ground. Connect supply decoupling capacitors for VDD, HPVDD, and HPVSS to GND.
BOARD LAYOUT
In making the pad size for the WCSP balls, it is recommended that the layout use non-solder-mask defined
(NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the
opening size is defined by the copper pad width. Figure 29 and Table 3 shows the appropriate diameters for a
WCSP layout.
For improved RF immunity it is recommended that all signal traces are routed in the middle layers of the
multi-layer PCB. The top and bottom layers are used for the supply voltage plane and the GND plane.
16
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Product Folder Link(s) :TPA6136A2
TPA6136A2
www.ti.com ........................................................................................................................................................ SLOS621A – JULY 2009 – REVISED AUGUST 2009
Copper
Trace Width
Solder
Pad Width
Solder Mask
Opening
Solder Mask
Thickness
Copper Trace
Thickness
Figure 29. Land Pattern Dimensions
Table 3. Land Pattern Dimensions (1)
SOLDER PAD
DEFINITIONS
Non-solder-mask
defined (NSMD)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
COPPER PAD
SOLDER MASK (5)
OPENING
230 µm (+0.0, –25 µm) 310 µm (+0.0, –25 µm)
(2) (3) (4)
COPPER
THICKNESS
STENCIL (6) (7)
OPENING
STENCIL
THICKNESS
1 oz max (32 µm)
275 µm × 275 µm Sq.
(rounded corners)
100 µm thick
Circuit traces from NSMD defined PWB lands should be 75 µm to 100 µm wide in the exposed area inside the solder mask opening.
Wider trace widths reduce device stand off and impact reliability.
Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the
intended application
Recommend solder paste is Type 3 or Type 4.
For a PWB using a Ni/Au surface finish, the gold thickness should be less 0,5 mm to avoid a reduction in thermal fatigue performance.
Solder mask thickness should be less than 20 µm on top of the copper circuit pattern
Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in
inferior solder paste volume control.
Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional component movement due to
solder wetting forces.
TRACE WIDTH
Recommended trace width at the solder balls is 75 µm to 100 µm to prevent solder wicking onto wider PCB
traces. For high current pins (VDD, HPVDD, HPVSS, CPP, CPN, OUTL, and OUTR) of the TPA6136A2, use 100
µm trace widths at the solder balls and at least 500 µm PCB traces to ensure proper performance and output
power for the device. For the remaining signals of the TPA6136A2, use 75 µm to 100 µm trace widths at the
solder balls. The audio input pins (INL–, INL+, INR– and INR+) must run side-by-side to maximize
common-mode noise cancellation.
17
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Product Folder Link(s) :TPA6136A2
PACKAGE OPTION ADDENDUM
www.ti.com
21-Aug-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPA6136A2YFFR
ACTIVE
DSBGA
YFF
16
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
TPA6136A2YFFT
ACTIVE
DSBGA
YFF
16
250
SNAGCU
Level-1-260C-UNLIM
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Oct-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
TPA6136A2YFFR
DSBGA
YFF
16
3000
180.0
8.4
TPA6136A2YFFR
DSBGA
YFF
16
3000
180.0
TPA6136A2YFFT
DSBGA
YFF
16
250
180.0
TPA6136A2YFFT
DSBGA
YFF
16
250
180.0
1.65
1.65
0.81
4.0
8.0
Q1
8.4
1.65
1.65
0.81
4.0
8.0
Q1
8.4
1.65
1.65
0.81
4.0
8.0
Q1
8.4
1.65
1.65
0.81
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Oct-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPA6136A2YFFR
DSBGA
YFF
16
3000
190.5
212.7
31.8
TPA6136A2YFFR
DSBGA
YFF
16
3000
190.5
212.7
31.8
TPA6136A2YFFT
DSBGA
YFF
16
250
190.5
212.7
31.8
TPA6136A2YFFT
DSBGA
YFF
16
250
190.5
212.7
31.8
Pack Materials-Page 2
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