TOSHIBA TLP152

TLP152
Photocouplers
GaAℓAs Infrared LED & Photo IC
TLP152
1. Applications
•
Plasma Display Panels (PDPs)
•
Transistor Inverters
•
MOSFET Gate Drivers
•
IGBT Gate Drivers
2. General
The TLP152 is a photocoupler in a SO6 package that consists of a GaAℓAs infrared light-emitting diode(LED)
optically coupled to an integrated high-gain, high-speed photodetector IC chip.
3. Features
(1)
Buffer logic type (Totem pole output)
(2)
Output peak current: ±2.5 A (max)
(3)
Operating temperature: -40 to 100 
(4)
Supply current: 3 mA (max)
(5)
Supply voltage: 10 to 30 V
(6)
Threshold input current: 7.5 mA(max)
(7)
Propagation delay time: tpHL = 190 ns (max), tpLH = 170 ns (max)
(8)
Common-mode transient immunity: ±20 kV/µs (min)
(9)
Isolation voltage: 3750 Vrms (min)
4. Packaging and Pin Assignment
1: Anode
3: Cathode
4: GND
5: VO(Output)
6: VCC
11-4L1S
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2012-09-14
Rev.3.0
TLP152
5. Internal Circuit (Note)
Fig. 5.1 Internal Circuit
Note:
A 0.1-µF bypass capacitor must be connected between pin 6 and pin 4.
6. Principle of Operation
6.1. Truth Table
Input
LED
M1
M2
Output
H
ON
ON
OFF
H
L
OFF
OFF
ON
L
6.2. Mechanical Parameters
Characteristics
Min
Unit
Creepage distances
5.0 (min)
mm
Clearance distances
5.0 (min)
Internal isolation thickness
0.4 (min)
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TLP152
)
7. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25
25
Characteristics
LED
Symbol
Input forward current
IF
Peak transient input forward
current
IFPT
Input reverse voltage
VR
Input power dissipation
Detector Peak high-level output current
Peak low-level output current
Note
(Note 1)
PD
Rating
Unit
20
mA
1
A
5
V
40
mW
(Ta = -40 to 100)
IOPH
(Note 2)
-2.5
A
(Ta = -40 to 100)
IOPL
(Note 2)
+2.5
Output voltage
VO
Supply voltage
VCC
35
Output power dissipation
PO
260
mW
Topr
-40 to 100

Tstg
-55 to 125
Common Operating temperature
Storage temperature
Lead soldering temperature
Isolation voltage
35
(10 s)
Tsol
(Note 3)
260
AC, 1 min,
R.H. ≤ 60%, Ta = 25
BVS
(Note 4)
3750
V
Vrms
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW) ≤ 1 µs, 300 pps
Note 2: Exponential waveform. Pulse width ≤ 0.2 µs, f ≤ 15 kHz, VCC = 20V, Ta = -40 to 100 
Exponential waveform. Pulse width ≤ 0.08 µs, f ≤ 25 kHz, VCC = 15V, Ta = -40 to 100 
Note 3: ≥ 2 mm below seating plane.
Note 4: This device is considered as a two-terminal device: Pins 1, and 3 are shorted together, and pins 4, 5 and 6
are shorted together.
8. Recommended Operating Conditions (Note)
Characteristics
Symbol
Note
Min
Typ.
Input on-state current
IF(ON)
(Note 1)
10
Input off-state voltage
VF(OFF)
0
Peak high-level output current
IOPH

Peak low-level output current
IOPL


Operating frequency
f
(Note 2)
Max
Unit

15
mA

0.8
V

-2.0
A

+2.0

250
kHz
Note:
The recommended operating conditions are given as a design guide necessary to obtain the intended
performance of the device. Each parameter is an independent value. When creating a system design using
this device, the electrical characteristics specified in this datasheet should also be considered.
Note: A ceramic capacitor (0.1 µF) should be connected between pin 6 and pin 4 to stabilize the operation of a highgain linear amplifier. Otherwise, this photocoupler may not switch properly. The bypass capacitor should be
placed within 1 cm of each pin.
Note 1: The rise and fall times of the input on-current should be less than 0.5 µs.
Note 2: Exponential waveform. IOPH ≥ -0.65 A (≤ 80 ns), IOPL ≤ 0.65 A (≤ 80 ns), Ta = 100, VCC = 20V
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TLP152
9. Electrical Characteristics (Note)
(Unless otherwise specified, Ta = -40 to 100
)
100
Characteristics
Symbol
Input forward voltage
Input forward voltage
temperature coefficient
Min
Typ.
Max

IF = 10 mA, Ta = 25
1.40
1.57
1.80
V

IF = 10 mA

-1.8

mV/
IR

VR = 5 V, Ta = 25


10
µA

V = 0 V, f = 1 MHz, Ta = 25

45

pF
IF = 10 mA, VCC = 15 V,
V6-5 = 4 V

-2.2
-1.0
A
IF = 10 mA, VCC = 15 V,
V6-5 = 10 V

-3.4
-2.0
IF = 0 mA, VCC = 15 V,
V5-4 = 2 V
1.0
2.4

IF = 0 mA, VCC = 15 V,
V5-4 = 10 V
2.0
3.5

Ct
IOPH
(Note 1)
IOPL
Fig.
12.1.1
(Note 1)
Fig.
12.1.2
High-level output voltage
VOH
Fig.
12.1.3
IF = 10 mA, VCC = 10 V,
IO = -100 mA
6.0
8.5

Low-level output voltage
VOL
Fig.
12.1.4
VF = 0.8 V, VCC = 10 V,
IO = 100 mA

0.1
1.0
High-level supply current
ICCH
Fig.
12.1.5
IF = 10 mA, VCC = 10 to 30 V,
VO = Open

1.9
3.0
Low-level supply current
ICCL
Fig.
12.1.6
IF = 0 mA, VCC = 10 to 30 V,
VO = Open

1.8
3.0
Threshold input current (L/H)
IFLH

VCC = 15 V, VO > 1 V

1.5
7.5
Threshold input voltage (H/L)
VFHL

VCC = 15 V, VO < 1 V
0.8
1.47

VCC


10

30
VUVLO+

IF = 5 mA , VO > 2.5 V
7.5
8.7
9.5
VUVLO-
IF = 5 mA, VO < 2.5 V
7.5
8.4
9.5
UVLOHYS
IF = 5 mA , VO > 2.5 V

0.3

Supply voltage
UVLO threshold voltage
UVLO hysteresis
Unit
VF
Input capacitance
Peak low-level output current
Test Condition
∆VF/∆Ta
Input reverse current
Peak high-level output current
Test
Circuit
Note
V
mA
V
Note:
Note:
All typical values are at Ta = 25.
This device is designed for low power consumption, making it more sensitive to ESD than its predecessors.
Extra care should be taken in the design of circuitry and pc board implementation to avoid ESD problems.
Note 1: IO application time ≤ 50 µs, single pulse.
)
10. Isolation Characteristics (Unless otherwise specified, Ta = 25
25
Characteristics
Symbol
Note
Test Conditions
Total capacitance (input to output)
CS
(Note 1) VS = 0 V, f = 1 MHz
Isolation resistance
RS
(Note 1) VS = 500 V, R.H. ≤ 60%
Isolation voltage
BVS
(Note 1) AC, 1 min
Min
Typ.
Max
Unit

0.35

pF
1×1012
1014

Ω
Vrms
3750


AC, 1 s, in oil

10000

DC, 1 min, in oil

10000

Vdc
Note 1: This device is considered as a two-terminal device: Pins 1 and 3 are shorted together, and pins 4, 5 and 6 are
shorted together.
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2012-09-14
Rev.3.0
TLP152
11. Switching Characteristics (Note)
(Unless otherwise specified, Ta = -40 to 100
)
100
Test
Circuit
Test Condition
Min
Typ.
Max
Unit
Fig.
12.1.7
IF = 0 → 10 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF,Ta = 25

95
145
ns
(Note 1)
IF = 10 → 0 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF,Ta = 25

110
165
tpLH
(Note 1)
IF = 0 → 10 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF
50
95
170
Propagation delay time
(H/L)
tpHL
(Note 1)
IF = 10 → 0 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF
50
110
190
Propagation delay skew
(device to device)
tpsk
(Note 1)
(Note 4)
IF = 0 ←→ 10 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF
-85

85
|tpHL-tpLH| (Note 1)
IF = 0 ←→ 10 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF

15
50
Characteristics
Symbol
Note
Propagation delay time
(L/H)
tpLH
(Note 1)
Propagation delay time
(H/L)
tpHL
Propagation delay time
(L/H)
Pulse width distortion
Rise time
tr
(Note 1)
IF = 0 → 10 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF

18

Fall time
tf
(Note 1)
IF = 10 → 0 mA, VCC = 30 V,
Rg = 20 Ω, Cg = 10 nF

22

Common-mode transient
immunity at output high
CMH
(Note 2)
VCM = 1000 Vp-p, IF = 10 mA,
VCC = 30 V, Ta = 25,
VO(min) = 26 V
±20


Common-mode transient
immunity at output low
CML
(Note 3)
VCM = 1000 Vp-p, IF = 0 mA,
VCC = 30 V, Ta = 25,
VO(max) = 1 V
±20


Fig.
12.1.8
kV/µs
Note: All typical values are at Ta = 25.
Note 1: Input signal ( f = 125 kHz, duty = 50%, tr = tf = 5 ns or less ).
CL is approximately 15 pF which includes probe and stray wiring capacitance.
Note 2: CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage
in the logic high state (VO > 26 V).
Note 3: CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in
the logic low state (VO < 1 V).
Note 4: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH
that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc).
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2012-09-14
Rev.3.0
TLP152
12. Test Circuits and Characteristics Curves
12.1. Test Circuits
Fig. 12.1.1 IOPH Test Circuit
Fig. 12.1.2 IOPL Test Circuit
Fig. 12.1.3 VOH Test Circuit
Fig. 12.1.4 VOL Test Circuit
Fig. 12.1.5 ICCH Test Circuit
Fig. 12.1.6 ICCL Test Circuit
Fig. 12.1.7 Switching Time Test Circuit and Waveform
Fig. 12.1.8 Common-Mode Transient Immunity Test Circuit and Waveform
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TLP152
13. Soldering and Storage
13.1. Precautions for Soldering
The soldering temperature should be controlled as closely as possible to the conditions shown below, irrespective
of whether a soldering iron or a reflow soldering method is used.
•
When using soldering reflow (See Fig. 13.1.1 and 13.1.2)
Reflow soldering must be performed once or twice.
The mounting should be completed with the interval from the first to the last mountings being 2 weeks.
Fig. 13.1.1 An Example of a Temperature Profile Fig. 13.1.2 An Example of a Temperature Profile
When Sn-Pb Eutectic Solder Is Used
When Lead(Pb)-Free Solder Is Used
•
When using soldering flow (Applicable to both eutectic solder and Lead(Pb)-Free solder)
Apply preheating of 150 for 60 to 120 seconds.
Mounting condition of 260 within 10 seconds is recommended.
Flow soldering must be performed once.
•
When using soldering Iron (Applicable to both eutectic solder and Lead(Pb)-Free solder)
Complete soldering within 10 seconds for lead temperature not exceeding 260 or within 3 seconds not
exceeding 350
Heating by soldering iron must be done only once per lead.
13.2. Precautions for General Storage
•
Avoid storage locations where devices may be exposed to moisture or direct sunlight.
•
Follow the precautions printed on the packing label of the device for transportation and storage.
•
Keep the storage location temperature and humidity within a range of 5 to 35 and 45% to 75%,
respectively.
•
Do not store the products in locations with poisonous gases (especially corrosive gases) or in dusty
conditions.
•
Store the products in locations with minimal temperature fluctuations. Rapid temperature changes during
storage can cause condensation, resulting in lead oxidation or corrosion, which will deteriorate the
solderability of the leads.
•
When restoring devices after removal from their packing, use anti-static containers.
•
Do not allow loads to be applied directly to devices while they are in storage.
•
If devices have been stored for more than two years under normal storage conditions, it is recommended
that you check the leads for ease of soldering prior to use.
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TLP152
14. Land Pattern Dimensions for Reference Only
Fig. 14.1 Land Pattern Dimensions for Reference
Only (unit: mm)
15. Marking
Fig. 15.1 Marking
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Rev.3.0
TLP152
Package Dimensions
Unit: mm
Weight: 0.08 g (typ.)
Package Name(s)
TOSHIBA: 11-4L1S
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2012-09-14
Rev.3.0
TLP152
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• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information
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for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage
to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate
the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications,
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