PD - 91494A
IRL520N
HEXFET®
l
l
l
l
l
l
Logic-Level Gate Drive
Advanced Process Technology
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Power MOSFET
D
VDSS = 100V
RDS(on) = 0.18Ω
G
Description
ID = 10A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
TO-220AB
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
10
7.1
35
48
0.32
± 16
85
6.0
4.8
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.50
–––
3.1
–––
62
°C/W
5/13/98
IRL520N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
100
–––
–––
–––
–––
1.0
3.1
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IGSS
Typ.
–––
0.11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.0
35
23
22
Max. Units
Conditions
–––
V
V GS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.18
VGS = 10V, ID = 6.0A
0.22
Ω
VGS = 5.0V, ID = 6.0A
0.26
VGS = 4.0V, ID = 5.0A
2.0
V
VDS = V GS, ID = 250µA
–––
S
V DS = 25V, ID = 6.0A
25
VDS = 100V, VGS = 0V
µA
250
VDS = 80V, VGS = 0V, TJ = 150°C
100
VGS = 16V
nA
-100
VGS = -16V
20
ID = 6.0A
4.6
nC
VDS = 80V
10
VGS = 5.0V, See Fig. 6 and 13
–––
VDD = 50V
–––
ID = 6.0A
ns
–––
RG = 11Ω, VGS = 5.0V
–––
RD = 8.2Ω, See Fig. 10
Between lead,
4.5
–––
nH
6mm (0.25in.)
G
from package
7.5 –––
and center of die contact
440 –––
VGS = 0V
97 –––
pF
VDS = 25V
50 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
10
––– –––
showing the
A
G
integral reverse
––– –––
35
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 6.0A, VGS = 0V
––– 110 160
ns
TJ = 25°C, IF =6.0A
––– 410 620
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 4.7mH
RG = 25Ω, IAS = 6.0A. (See Figure 12)
ISD ≤ 6.0A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
D
S
IRL520N
100
100
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
VGS
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
TOP
ID , Drain-to-Source Current (A )
ID , D rain-to-S ource C urrent (A )
TOP
10
1
2.5V
2 0µ s P U LS E W ID T H
T J = 2 5°C
0.1
0.1
1
10
A
2.5 V
1
2 0µ s P U LS E W ID TH
T J = 1 75 °C
0.1
100
0.1
1
10
V D S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
R D S (on ) , D rain-to-S ource O n R esistance
(N orm alized)
T J = 2 5°C
T J = 1 7 5°C
10
1
V D S = 5 0V
2 0µ s P U L S E W ID TH
0.1
2
4
6
8
V G S , G ate-to -Sou rce Voltage (V)
Fig 3. Typical Transfer Characteristics
10
A
A
100
V D S , D rain-to-S ource V oltage (V )
100
I D , D rain-to-So urce C urren t (A )
10
I D = 1 0A
2.5
2.0
1.5
1.0
0.5
V G S = 10 V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
IRL520N
15
V GS
C iss
C rs s
C o ss
=
=
=
=
0V ,
f = 1MHz
C g s + C g d , C d s S H O R TE D
C gd
C ds + C g d
V G S , G ate -to-S ou rc e V oltage (V )
C , Capacitance (pF)
800
400
C oss
200
C rss
0
10
9
6
3
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
0
A
1
V D S = 80 V
V D S = 50 V
V D S = 20 V
12
C iss
600
I D = 6 .0A
0
100
10
15
20
A
25
Q G , Total G ate C harge (nC )
V D S , D rain-to-S ourc e V oltage (V )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
O P E R A TIO N IN TH IS A R E A L IM ITE D
B Y R D S (o n)
10µ s
I D , Drain C urrent (A )
I S D , R everse Drain C urrent (A )
5
TJ = 1 75 °C
10
T J = 2 5°C
1
V G S = 0V
0.1
0.4
0.6
0.8
1.0
1.2
V S D , S ourc e-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
A
1.4
10
100µ s
1m s
1
10 m s
T C = 25 °C
T J = 17 5°C
S ing le P u lse
0.1
1
10
100
V D S , D rain-to-S ource V oltage (V )
Fig 8. Maximum Safe Operating Area
A
1000
IRL520N
10
VDS
VGS
I D , D rain C u rren t (A m ps )
8
RD
D.U.T.
RG
+
-VDD
6
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
4
Fig 10a. Switching Time Test Circuit
2
VDS
90%
A
0
25
50
75
100
125
150
175
TC , C ase T em perature (°C )
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.01
0.00001
0.02
0.01
P DM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
0.1
IRL520N
1 5V
L
VD S
D .U .T
RG
IA S
10V
tp
D R IV E R
+
V
- DD
A
0.0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
E A S , S ingle P ulse A valanche E nergy (m J)
200
TO P
B O TTO M
160
ID
2.4 A
4.2A
6 .0 A
120
80
40
0
A
25
V (B R )D SS
50
75
100
125
150
175
S tarting T J , J unc tion T em perature (°C )
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
5.0 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
IRL520N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
D=
Period
P.W.
+
-
VDD
P.W.
Period
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
ISD
*
IRL520N
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
2.87 (.11 3)
2.62 (.10 3)
10 .54 (.4 15)
10 .29 (.4 05)
3 .7 8 (.149 )
3 .5 4 (.139 )
-A -
-B 4.69 ( .18 5 )
4.20 ( .16 5 )
1 .32 (.05 2)
1 .22 (.04 8)
6.47 (.25 5)
6.10 (.24 0)
4
1 5.24 (.60 0)
1 4.84 (.58 4)
1.15 (.04 5)
M IN
1
2
1 4.09 (.55 5)
1 3.47 (.53 0)
4.06 (.16 0)
3.55 (.14 0)
3X
3X
L E A D A S S IG NM E NT S
1 - GATE
2 - D R A IN
3 - S O U RC E
4 - D R A IN
3
1 .4 0 (.0 55 )
1 .1 5 (.0 45 )
0.93 (.03 7)
0.69 (.02 7)
0 .3 6 (.01 4)
3X
M
B A M
2.54 (.10 0)
0.55 (.02 2)
0.46 (.01 8)
2 .92 (.11 5)
2 .64 (.10 4)
2X
N O TE S :
1 D IM E N S IO N IN G & TO L E R A N C ING P E R A N S I Y 1 4.5M , 1 9 82.
2 C O N TR O L LIN G D IM E N S IO N : IN C H
3 O U T LIN E C O N F O R M S TO JE D E C O U T LIN E TO -2 20 A B .
4 H E A TS IN K & LE A D M E A S U R E M E N T S D O N O T IN C LU DE B U R R S .
Part Marking Information
TO-220AB
E XEAXMAPML PE L:E TH
IS ISIS ISA NA NIR FIR1 F1
01010
: TH
W ITH
A SASSESMEBML BY L Y
W IT H
L OLTO C
T OCDOED E9 B 91M
B1M
A A
IN TE
R NRANTAIOTIO
N ANL A L
IN TE
R ERCETIFIE
C TIFRIE R
IR FIR1 F0 10 1 0
L OLGOOG O
9 2 49 62 4 6
9B 9B 1 M1 M
A SASSESMEBML BY L Y
L OT
L O T C OCDOED E
P APRATR N
T UNMUBMEBRE R
D ADTE
A TEC OCDOED E
(Y Y(YWYW
W )W )
Y YY Y
= Y
= EYAERA R
WW
W W= W
= EWEEKE K
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http://www.irf.com/
Data and specifications subject to change without notice.
5/98