[AK7734] AK7734 2-Channel ADC/SRC Audio DSP AK7734 2chADC 2chSRC IIR/FIR DSP AK7734 AKM SRC DSP I/F DSP : 24-bit (F24 ) : 13.6ns ( 1536step/fs fs=48kHz) : 20 x 24 44-bit : 20 / 20 20-bit - ALU: 48bit (overflow margen 4bit) 20bit RAM: 3072 x 36-bit RAM: 2048 x 24-bit (F24 ) RAM: 2048 x 24-bit (F24 ) : 64 x 13-bit RAM1: 3072 x 24-bit RAM2: 2048 x 24-bit : fs= 7.35k ~ 48kHz : 1536fs PLL 32fs, 48fs, 64fs, 128fs, 256fs, 384fs / [ADC ] - 64 - 24bit 2ch : 7.35 ~ 48kHz - S/(N+D): 83dB (fs = 48kHz) - DR, S/N: 96dB (fs = 48kHz) - DC HPF [SRC ] - 2ch x 1 - Fin = 7.35kHz ~ 96kHz (FSO/FSI = 0.167~ 6.0 Fout = 7.35kHz ~ 48kHz ) - 8ch - 8ch MS1033-J-03-PB - 1 - 2010/06 [AK7734] [ ] 2 -I C or 4 - PLL - 3.3V 1.8V : 3.3V ± 0.3V : -40 85 - 48pin LQFP MS1033-J-03-PB - 2 - 2010/06 [AK7734] ■ VCOM AVDRV AINR AINL AVDD DVDD CLKOE VSS CLKO BITCLKOE BITCLKO LRCLKOE LRCLKO LFLT XT O pull down Open Drain XT I BIT CLKI1 LRCLKI1 INIT RST N MICIF MLRCLK0 MBIT CLK0 CKM[3:0] T EST I1 T EST I2 SELRDY SO RDY MADCLK0 MDSPCLK0 0 1 I2CSEL RQN / CAD1 SI / CAD0 SCLK / SCL SDA SO / RDY DIN5 SELDO1[1:0] DIN1 SDIN1 JX0E DOUT 1 0 1 2 3 GP1 JX0 OUT1E SDOUT 1 SELDO2[1:0] SDIN2 / JX0 DIN2 JX1E DOUT 2 0 1 2 3 GP0 JX1 SELDO3[1:0] DIN3 SDIN3 / JX1 DOUT3 OUT2E SDOUT 2 OUT3E SDOUT 3 0 1 2 IRPT RDYE BIT CLKI2 LRCLKI2 SET SRC SRCLFLT SRCMCKI UNLOCK SRCBICKI SRCBICKO SRCLRCKI SRCLRCKO WDTEN WDT SRC DSP SELDI4 SDIN4 / JX2 ST O LOCKE SRCO SRCI SELDO4 0 1 DIN4 DOUT4 0 1 OUT4E SDOUT 4 JX2E JX2 Figure 1. * Figure 1 AK7734 MS1033-J-03-PB - 3 - 2010/06 [AK7734] CP0,CP1 DLP0,DLP1 DP0,DP1 DLRAM1:3072W 24-Bit DRAM 2048w 24-Bit CRAM 2048W 24-Bit OFREG 64w 13-Bit DLRAM2:2048W 24-Bit CBUS(24-Bit) DBUS(24-Bit) MPX24 Micon I/F MPX20 X Serial I/F Control DEC Y PRAM 3072w Multiply 24 20 44-Bit 36-Bit PC Stack : 5level(max) 24-Bit 44-Bit TMP 12 24-Bit PTMP(LIFO) 6 24-Bit MUL DBUS SHIFT 48-Bit 48-Bit A B ALU 48-Bit 2 24(,16)-Bit DIN5 (ADC) 2 24(,16)-Bit DIN4 (SRC) 2 24,20,16-Bit DIN3 2 24,20,16-Bit DIN2 2 24,20,16-Bit DIN1 Overflow Margin: 4-Bit 48-Bit DR0 ∼ 3 48-Bit Over Flow Data Generator Division 20÷20 20 DOUT4 2 24,20,16-Bit DOUT3 2 24,20,16-Bit DOUT2 2 24,20,16-Bit DOUT1 Peak Detector Figure 2. AK7734 MS1033-J-03-PB 2 24,20,16-Bit DSP - 4 - 2010/06 [AK7734] ■ AK7734XQ AKD7734 -40 ∼ +85°C 48pin LQFP Evaluation Board for AK7734 ■ 48pin LQFP (TOP VIEW ) MS1033-J-03-PB - 5 - 2010/06 [AK7734] No. 1 TESTI1 2 3 4 CKM[2] CKM[1] SDIN1 I/O I 1 VSS I I I 2 1 1 0 5 JX0 I JX0E bit = “1” J JX1E bit = “1” J X0 SDIN2 I JX1 I 2 1 6 X1 SDIN3 I 7 BITCLKI1 I 8 LRCLKI1 I 9 DVDD 10 VSS1 - 11 XTI I 12 XTO O 13 SDOUT4 14 SDOUT3 15 SDOUT2 16 SDOUT1 LR (256kHz/512kHz) 1 Bluetooth LR (8kHz) 3.0 3.6V 0V XTI pin XTO pin XTIpin XTI pin XTO pin 4 O 3 O 2 “L” “L” “L” O 1 “L” - 19 I2CSEL I 20 INITRSTN I 21 CKM[0] I O MS1033-J-03-PB 1 Bluetooth O 17 VSS2 18 DVDD 22 LRCLKO 3 0V 3.0 3.6V I2CBUS I2CSELpin =“L”: 4 I2CSELpin =“H”: I2C SCL, SDA I2CSEL “L(VSS)”, “H(DVDD)” N AK7734 XTI, BITCLK 0 LR I2C CKM[3:0] pin “L” - 6 - 2010/06 [AK7734] No. 23 BITCLKO 24 CLKO 25 STO I/O O “L” O “L” O SO O RDY O “H” 26 I LR 28 BITCLKI2 I 2 (SRC ) 2 I (SRC ) 2 JX2E bit = “1” JX2 JX2 29 31 IF SELRDY bit= “1” RDY 27 LRCLKI2 30 IF “L” 4 SDIN4 I RQN I CAD1 RQN pin =“H” I I2CSEL pin = “H” I2C I I2CSEL pin = “L” SRC I2CSEL pin = “L” N IF I2C 1 IF SI SI pin= “L” CAD0 32 SDA I I2CSEL pin = “H” I2C O I2CSEL pin = “L” I2C 0 SDA “L” I/O I2CSEL pin = “H” I2C I2C “Hi-Z” I I2CSEL pin = “L” 33 IF SCLK SCLK pin = “H” SCL 34 DVDD 35 VSS3 36 AVDRV I I2CSEL pin = “H” I2C 3.0 3.6V 0V O AVDRV Pin 1μF 35pin(VSS3) I2C “L” 37 SRCLFLT 38 39 40 41 VSS4 DVDD CKM[3] SETSRC 42 TESTI2 43 AINR MS1033-J-03-PB O SRCPLL C C=1µF 38pin(VSS4) “L” 0V 3.0 3.6V I 3 I SRC PLL I 2 VSS I ADC Rch - 7 - 2010/06 [AK7734] No. 44 AINL 45 AVDD 46 VCOM 47 VSS5 48 LFLT I/O I ADC Lch I O 0.1μF 2.2μF 3.0 3.6V 47pin(VSS5) “L” I 0V O PLL C C=12nF 47pin(VSS5) “L” Note: AINL, AINR ■ Classification Analog Digital MS1033-J-03-PB Pin Name AINL, AINR SDOUT1-4, CLKO, LRCLKO, BITCLKO, STO, SO/RDY, XTO TESTI1, TESTI2, SDIN1, JX0-2/SDIN2-4, XTI, BITCLKI1-2, LRCLKI1-2 - 8 - Setting VSS 2010/06 [AK7734] (VSS1=VSS2=VSS3=VSS4=VSS5=0V: Note 1) Parameter Symbol Analog Digital ( ) AINL pin, AINR pin min max Units AVDD DVDD IIN -0.3 -0.3 4.3 4.3 ±10 V V mA VINA -0.3 AVDD+0.3 V VIND Ta Tstg -0.3 -40 -65 DVDD+0.3 85 150 V Note 1. Note 2. VSS1-5 : (VSS1=VSS2=VSS3=VSS4=VSS5=0V: Note 1) Parameter Symbol min Analog Digital Note 3. AVDD, DVDD Note 4. I2C BUS SCL Pin AVDD DVDD 3.0 3.0 typ max Units 3.3 3.3 3.6 3.6 V V (I2CSELpin = “H”) SDA,SCL DVDD ON DVDD AK7734 OFF SDA, : MS1033-J-03-PB - 9 - 2010/06 [AK7734] (1) 1) ADC 1-1) fs=8kHz ( Ta=25 ; AVDD=DVDD=3.3V, BITCLK=64fs; 3.4kHz@fs=8kHz; CKM mode0(CKM[3:0]=LLLL)) Parameter min ADC S/(N+D) (-1dBFS) (Note 5) S/N (fin=1kHz) (Note 6) (Note 7) Note 5. -60dBFS Note 6. -1dBFS Note 7. 76 84 84 90 1.85 38 S/(N+D) (-1dBFS) (A ) (Note 8) ) (fin=1kHz) (Note 9) (Note 10) Note 8. -60dBFS Note 9. -1dBFS Note 10. MS1033-J-03-PB typ =20Hz max 24 84 92 92 110 Units Bits dB dB dB dB 0.1 0.3 dB 2.00 58 2.15 Vp-p k S/(N+D) AINL, AINR FS=AVDD 2.0/3.3 1-2) fs=48kHz ( Ta=25 ; AVDD=DVDD=3.3V, BITCLK=64fs; 20kHz@fs=48kHz; CKM mode0(CKM[3:0]=LLLL)) Parameter min ADC S/N ( A 1kHz; 75 87 87 90 1.85 23 1kHz; typ =20Hz max 24 83 96 96 110 Units Bits dB dB dB dB 0.1 0.3 dB 2.00 35 2.15 Vp-p k S/(N+D) AINL, AINR FS=AVDD 2.0/3.3 - 10 - 2010/06 [AK7734] (2) SRC (Ta=25°C; AVDD = DVDD=3.3V; VSS=0V, data = 24bit; measurement bandwidth = 20Hz~ FSO/2; unless otherwise specified.) Parameter Symbol min typ max Units Resolution 24 Bits Input Sample Rate FSI 7.35 96 kHz Output Sample Rate FSO 7.35 48 kHz THD+N (Input= 1kHz, 0dBFS) FSO/FSI=44.1kHz/48kHz -112 dB FSO/FSI=44.1kHz/96kHz -104 dB FSO/FSI=48kHz/44.1kHz -112 dB FSO/FSI=48kHz/96kHz -112 dB FSO/FSI=48kHz/8kHz -111 -103 dB FSO/FSI=8kHz/48kHz -113 dB FSO/FSI=8kHz/44.1kHz -78 dB Dynamic Range (Input= 1kHz, -60dBFS) FSO/FSI=44.1kHz/48kHz 113 dB FSO/FSI=44.1kHz/96kHz 113 dB FSO/FSI=48kHz/44.1kHz 113 dB FSO/FSI=48kHz/96kHz 113 dB FSO/FSI=48kHz/8kHz 109 112 dB FSO/FSI=8kHz/48kHz 113 dB FSO/FSI=8kHz/44.1kHz 113 dB Dynamic Range (Input= 1kHz, -60dBFS, A-weighted FSO/FSI=44.1kHz/48kHz 115 dB Ratio between Input and Output Sample Rate FSO/FSI 0.167 6 - (3) DC (Ta=-40 85 Parameter ; AVDD=DVDD=3.0 3.6V) (Note 11) (Note 11) SCL,SDA SCL,SDA Symbol VIH VIL VIH VIL VOH VOL VOL Iin Iid Iix min 80%DVDD max 20%DVDD 70%DVDD DVDD-0.5 Iout=-100μA Iout=100μA (Note 12) SDA Iout=3mA (Note 13) (Note 14) XTI pin Note 11. SCL, SDA pin (SCLK pin ) Note 12. SDA pin Note 13. XTIpin Note 14. (Typ150k ) TESTI1, TESTI2 MS1033-J-03-PB typ - 11 - 30%DVDD 22 26 0.5 0.4 10 Units V V V V V V V μA μA μA 2010/06 [AK7734] (4) (Ta=25 ; AVDD=DVDD=3.0 3.6V(typ=3.3V , max=3.6V) Parameter min (Note 15) AVDD DVDD AVDD+DVDD INITRSTN pin= “L” ( ) (Note 16) Note 15. DVDD Note 16. MS1033-J-03-PB - 12 - typ 21 65 86 2 max 120 Units mA mA mA mA 2010/06 [AK7734] ■ ADC 1. fs=8kHz (Ta=-40 ~85 , AVDD=DVDD=3.0~3.6V, fs=8kHz; Note 17) Parameter Symbol min (±0.1dB) (Note 18) PB 0 (-1.0dB) (-3.0dB) SB 4.66 (Note 18) PR (Note 19, Note 20) SA 68 GD (Ts=1/fs) GD Note 17. fs Note 18. Note 19. Note 20. fs=8kHz fs=8kHz fs=8kHz DC 3.15kHz 4.66kHz 507.34kHz 512kHz (n x 512kHz ±4.66kHz; n=0,1,2,3 typ 3.63 3.83 ±0.1 0 16 - 13 - Units kHz kHz kHz kHz dB dB μs Ts ) 2. fs=48kHz (Ta=-40 ~85 , AVDD=DVDD=3.0~3.6V, fs=48kHz; Note 17) Parameter Symbol min typ (±0.1dB) (Note 21) PB 0 20.0 (-0.2dB) 23.0 (-3.0dB) SB 28 (Note 21) PR (Note 22, Note 23) SA 68 GD 0 (Ts=1/fs) GD 16 Note 21. fs=48kHz DC 18.9kHz Note 22. fs=48kHz 28kHz 3.044MHz Note 23. fs=48kHz 3.072MHz (n x 3.072MHz ±28kHz; n=0,1,2,3 ) MS1033-J-03-PB max 3.15 max 18.9 ±0.04 Units kHz kHz kHz kHz dB dB μs Ts 2010/06 [AK7734] ■ (Ta=-40 85 ; AVDD=DVDD=3.0~3.6V) Parameter Symbol XTI CKM[3:0]=0000, 0001, 0010 a) CKM[3:0]=0000 fs=44.1kHz fXTI fs=48kHz CKM[3:0]=0001 fs=44.1kHz fXTI fs=48kHz b) min typ max Units - 11.2896 12.288 16.9344 18.432 - MHz - MHz 50 11.2896 12.288 16.9344 18.432 60 % MHz - 40 CKM[3:0]=0000, 0010 fs=44.1kHz fs=48kHz CKM[3:0]=0001 fs=44.1kHz fs-48kHz LRCLKI1 (Note 24) BITCLKI1 fXTI fXTI 11.0 16.5 fs 7.35 tBCLKH tBCLKL fBCLK 64 64 0.46 fBCLK 40 2.75 c) CKM[3:0]=0100 fBCLK 40 230 d) CKM[3:0]=0101 fBCLK 40 460 e) CKM[3:0]=1001 fBCLK 40 2.06 f) CKM[3:0]=1010 fBCLK fs 40 345 7.35 LRCLKI2 BITCLKI2 a) CKM[3:0]=1011 fBCLK 40 2.75 b) CKM[3:0]=1100 fBCLK 40 230 c) CKM[3:0]=1101 Note 24. LRCK MS1033-J-03-PB 18.6 48 64 a) CKM[3:0]=0010 b) CKM[3:0]=0011 12.4 (Note 25) (Note 26) (Note 25) (Note 27) (Note 27) (Note 24) (Note 25) (Note 26) (Note 25) fBCLK (fs) 40 460 - 14 - 3.072 64 50 3.072 32 50 256 64 50 512 48 50 2.304 48 50 384 64 50 3.072 32 50 256 64 50 512 3.1 60 3.1 60 258 60 516 60 2.32 60 387 48 60 3.1 60 258 60 516 MHz kHz fs ns ns MHz fs % MHz fs % kHz fs % kHz fs % MHz fs % kHz kHz fs % MHz fs % kHz fs % kHz 2010/06 [AK7734] Note 25. BITCLK Note 26. BITCLK Note 27. BITCLK ■ MCLK (BITCLK 64fs ) (BITCLK 32fs ) (BITCLK 48fs ) MCLK MCLK 1fs BITCLK 64 1fs BITCLK 32 1fs BITCLK 48 SRC (Ta=-40 ~85 Parameter LRCLKI2 ; AVDD=DVDD=3.0~3.6V;VSS=0V) Symbol fs min 7.35 typ max 96 Units kHz fBCLK tBCLKH tBCLKL 0.23 32 32 3.072 6.144 MHz ns ns ; AVDD=DVDD=3.0~3.6V) Symbol (Note 28) tRST “L” min 600 typ max Units ns BITCLKI2 ■ (Ta=-40 ~85 Parameter INITRSTN Note 28. MS1033-J-03-PB - 15 - 2010/06 [AK7734] ■ (SDIN1-4, SDOUT1-4) (Ta=-40 ~85 ; AVDD=DVDD=3.0~3.6V, CL=20pF) Parameter DSP SDIN1-4 (Note 29) BICLKI1 “↑” LRCLKI1 (Note 30, Note 31) LRCLKI1 BITCLKI1 “↑” (Note 30, Note 31) SRC SDIN4 BICLKI2 “↑” LRCLKI2 LRCLKI2 BITCLKI2 “↑” (Note 32) (Note 33) (Note 33) Symbol “ ” Note 35. I2S Note 36. SDIN1 SDIN2 SDIN3 SDIN4 MS1033-J-03-PB SELBCK bit= “1” SDOUT1 SDOUT2 SDOUT3 SDOUT4 max Units 20 20 80 80 ns ns ns ns tBLRD tLRBD tBSIDS tBSIDH 20 20 40 40 ns ns ns ns BITCLKO : : : : typ tBLRD tLRBD tBSIDS tBSIDH SDOUT1-4 (Note 29) fBCLK BITCLKO BITCLKO BITCLKO “↓” LRCLKO (Note 34) tBLRD LRCLKI1 (Note 35) tLRD BITCLKI1 (Note 31) tBSOD LRCLKO (Note 35) tLRD BITCLKO (Note 31) tBSOD SDINn SDOUTn (n=1-4) (Note 36) tIOD SDINn SDOUTn Note 29. CKM modeB/C/D LRCLKI2=LRCLKI1, BITCLKI2=BITCLKI1 Note 30. LRCLKI1 BITCLKI1 Note 31. PCM mode 0/2 BITCLKI1 Note 32. CKM mode B/C/D Note 33. LRCLKI2 BITCLKI2 BIEDGE bit= “1” BITCLKI2 Note 34. min 64 50 fs -20 40 80 80 80 80 ns ns ns ns ns 60 ns BITCLKI2 “ ” BITCLKO SELDO1[1:0] bit= “01”, OUT1E bit= “1” SELDO2[1:0] bit = “01”, OUT2E bit= “1” SELDO3[1:0] bit= “01”, OUT3E bit= “1” SELDO4 bit= “1”, OUT4E bit= “1” - 16 - 2010/06 [AK7734] ■ (Ta=-40 85 Parameter ; AVDD=DVDD=3.0 3.6V;VSS=0V;CL=20pF) Symbol min RQN RQN SCLK SCLK SCLK SCLK SCLK typ max Units 30 30 30 30 2.1 tWRF tWRR tSF tSR fSCLK tSCLKL tSCLKH 200 200 ns ns ns ns MHz ns ns tWRQH tRST tIRRQ tWSC tSCW tSIS tSIH 500 600 50 500 800 200 200 ns ns ms ns ns ns ns AK7734 RQN RQN “ ” INITRSTN “ INITRSTN “ ” RQN “ RQN" " SCLK" " SI SI SCLK" " RQN" " AK7734 SCLK " " SCLK " " (Note 37) tSOS SO SO Note 37. ■ ” ” 200 tSOH ns 200 ns 8bit I2CBUS (Ta=-40 ~85 ; AVDD=DVDD=3.0~3.6V) Parameter I2C Timing SCL clock frequency Bus Free Time Between Transmissions Start Condition Hold Time (prior to first Clock pulse) Clock Low Time Clock High Time Setup Time for Repeated Start Condition SDA Hold Time from SCL Falling SDA Setup Time from SCL Rising Rise Time of Both SDA and SCL Lines Fall Time of Both SDA and SCL Lines Setup Time for Stop Condition Pulse Width of Spike Noise Suppressed by Input Filter Capacitive load on bus 2 Note 38. I C-bus MS1033-J-03-PB Symbol min typ max Unit 400 fSCL tBUF 1.3 kHz μs tHD:STA 0.6 μs tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO 1.3 0.6 0.6 0 0.1 μs μs μs μs μs μs μs μs tSP 0.3 0.3 0.6 0 Cb 0.9 50 ns 400 pF NXP B.V. - 17 - 2010/06 [AK7734] ■ 1/fXTI 1/fXTI tXTI=1/fXTI XTI VIH VIL 1/fs ts=1/fs 1/fs LRCLKI1,2 VIH VIL 1/fBCLK 1/fBCLK tBCLK=1/fBCLK VIH BITCLKI1,2 VIL tBCLKH tBCLKL Figure 3. INITRSTN tRST VIL Figure 4. Note 39. MS1033-J-03-PB INITRSTN pin = “L” - 18 - 2010/06 [AK7734] VIH VIL LRCLKI1,2 tBLRD tLRBD VIH VIL BITCLKI1,2 tBSIDS tBSIDH VIH VIL SDINn n=1,2,3,4 Figure 5. DSP VIH VIL LRCLKI2 tBLRD tLRBD VIH VIL BITCLKI2 tBSIDS tBSIDH VIH VIL SDIN4 Figure 6. SRC VIH VIL LRCLKI1,2 tLRD VIH VIL BITCLKI1,2 tLRD tBSOD SDOUTn n=1,2,3,4 tBSOD 50%DVDD Figure 7. MS1033-J-03-PB - 19 - 2010/06 [AK7734] LRCLKO 50%DVDD tMBL tMBL BITCLKO 50%DVDD tBSIDS tBSIDH VIH VIL SDINn n=1,2,3,4 Figure 8. LRCLKO 50%DVDD tLRD BITCLKO 50%DVDD tLRD tBSOD SDOUTn n=1,2,3,4 tBSOD 50%DVDD Figure 9. MS1033-J-03-PB - 20 - 2010/06 [AK7734] VIH VIL RQN tWRF tWRR tSF tSR VIH VIL SCLK tSCLKL tSCLKH 1/fSCLK 1/fSCLK VIH VIL INITRSTN VIH VIL RQN tRST tIRRQ Figure 10. RQN VIH VIL tWRQH VIH SI VIL tSIS tSIH VIH VIL SCLK tWSC tSCW Figure 11. MS1033-J-03-PB tWSC tSCW AK7734 - 21 - 2010/06 [AK7734] VIH VIL SCLK VOH SO VOL tSOH tSOS Figure 12. AK7734 VIH SDA tBUF tLOW tR tHIGH VIL tF tSP VIH SCL VIL tHD:STA Stop tHD:DAT tSU:DAT tSU:STA tSU:STO Start Stop Start Figure 13. I2C MS1033-J-03-PB - 22 - 2010/06 [AK7734] 48pin LQFP (Unit: mm) 1.60MAX 9.00 ± 0.20 0.10 ± 0.07 7.00 1.4TYP 25 24 48 13 7.00 37 1 9.00 ± 0.20 36 12 0.17 ± 0.05 0.50 0.19 ± 0.05 0.10 M 1.00 0˚ ~ 10˚ 0.10 S 0.50 ± 0.20 ■ ( MS1033-J-03-PB ) - 23 - 2010/06 [AK7734] AKM AK7734XQ XXXXXXX 1 1) 2) 3) 4) Date (YY/MM/DD) 09/03/24 09/11/16 Revision 00 01 Reason Page Pin #1 indication Date Code: XXXXXXX(7digits) Marking Code: AK7734XQ Asahi Kasei Logo Contents 6, 7 13 32 33 63 63 73 87 91 10/01/06 MS1033-J-03-PB 02 32 Note 20: “n x 512kHz ±3.665kHz” “n x 512kHz ±4.66kHz” Note 23: “n x 3.072MHz ±21.99kHz” “n x 3.072MHz ±28kHz” Note 59: DIF mode0 → DIF1 mode0 Note 63: DOF2 mode DOF1 mode D23 D17 D23 D16 D16 D8 D15 D8 D7 D1 D7 D0 MIR2-4 Note77 Table3 bit byte Note2 VSS1-5 CLKS mode7 Note 61 - 24 - 2010/06 [AK7734] Date (YY/MM/DD) 10/06/11 Revision 03 Reason Page 4 17 21 Contents Figure 2 SHIFT 44-Bit 48-Bit RQ_N “ ” INIT_RESET_N “ ” INIT_RESET_N “ ” RQ_N “ ” Figure 10 INITRSTN RQN z z z z z z MS1033-J-03-PB - 25 - 2010/06 [AK7734] MS1033-J-03-PB - 26 - 2010/06