AOC2804

AOC2804
20V Common-Drain Dual N-Channel AlphaMOS
General Description
Product Summary
• Trench Power AlphaMOS (αMOS LV) technology
• Low RSS(ON)
• With ESD protection to improve battery performance and safety
• Common drain configuration for design simplicity
• RoHS and Halogen-Free Compliant
Applications
VSS
IS (at VGS=4.5V)
20V
4A
RSS(ON) (at VGS=4.5V)
< 22mΩ
RSS(ON) (at VGS=4.0V)
< 24mΩ
RSS(ON) (at VGS=3.7V)
< 25mΩ
RSS(ON) (at VGS=3.1V)
< 29mΩ
RSS(ON) (at VGS=2.5V)
< 36mΩ
Typical ESD protection
HBM Class 3A
• Battery protection switch
• Mobile device battery charging and discharging
AlphaDFN 1.5x1.5_4
Top View
Top View
Bottom View
D2
D1
Bottom View
2
1
S1
G1
S2
G2
G2
G1
Pin1
4
3
S2
S1
Orderable Part Number
Package Type
Form
Minimum Order Quantity
AOC2804
AlphaDFN 1.5x1.5_4
Tape & Reel
3000
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Source-Source Voltage
Symbol
VSS
Maximum
20
Units
V
VGS
IS
±12
V
Source Current(Pulse) Note2
Power Dissipation Note1 TA=25°C
ISM
16
Junction and Storage Temperature Range
TJ, TSTG
Gate-Source Voltage
Source Current(DC) Note1
TA=25°C
4
PD
Thermal Characteristics
Parameter
Symbol
t ≤ 10s
Maximum Junction-to-Ambient
RθJA
Steady-State
Maximum Junction-to-Ambient
Note 1. Mounted on 1in2 FR-4 board with 2oz. Copper.
Note 2. PW <300 µs pulses, duty cycle 0.5% max
Rev.2.0: June 2015
Typ
115
145
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A
0.7
W
-55 to 150
°C
Max
140
180
Units
°C/W
°C/W
Page 1 of 5
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVSSS
Source-Source Breakdown Voltage
Conditions
Min
Typ
Max
IS=250µA, VGS=0V
Test Circuit 6
VSS=20V, VGS=0V
Test Circuit 1
1
5
20
Units
V
ISSS
Zero Gate Voltage Source Current
IGSS
VGS(th)
Gate leakage current
VSS=0V, VGS=±10V
TJ=55°C
Test Circuit 2
±10
µA
Gate Threshold Voltage
VSS=VGS, IS=250µA
Test Circuit 3
0.5
0.85
1.3
V
VGS=4.5V, IS=3A
Test Circuit 4
12
17.8
22
16
24.7
31
RSS(ON)
Static Source to Source On-Resistance
VGS=4.0V, IS=3A
12.5
18.8
24
mΩ
VGS=3.7V, IS=3A
Test Circuit 4
13
19.3
25
mΩ
VGS=3.1V, IS=3A
Test Circuit 4
14.5
21.6
29
mΩ
VGS=2.5V, IS=3A
Test Circuit 4
17.5
25.8
36
mΩ
1
V
Forward Transconductance
VSS=5V, IS=3A
Test Circuit 3
20
VFSS
Forward Source to Source Voltage
IS=1A,VGS=0V
Test Circuit 5
0.65
DYNAMIC PARAMETERS
Rg
Gate resistance
f=1MHz
SWITCHING PARAMETERS
Qg
Total Gate Charge
VG1S1=4.5V, VSS=10V, IS=3A
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
mΩ
TJ=125°C
Test Circuit 4
gFS
tD(on)
µA
VG1S1=4.5V, VSS=10V, RL=3.3Ω,
RGEN=3Ω
Test Circuit8
S
2
KΩ
9.5
nC
0.8
µs
2.2
µs
2.5
µs
6.5
µs
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev.2.0: August 2015
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Page 2 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10
2.0V
VDS=5V
2.5V
3.0V
3.5V
4.0V
4.5V
10V
IS (A)
9
8
VGS=1.5V
6
IS(A)
12
6
4
3
2
125°C
25°C
0
0
0
1
2
3
4
0
5
0.5
1.5
2
2.5
3
VGS(Volts)
Figure 2: Transfer Characteristics
VSS (Volts)
Figure 1: On-Region Characteristics
35
1.6
Normalized On-Resistance
30
VGS=2.5V
RSS(ON) (mΩ)
1
25
VGS=3.1V
20
15
VGS=4.5V
VGS=3.7V
VGS=4.0V
10
VGS=4.5V
IS=3A
1.4
VGS=4.0V
IS=3A
VGS=3.7V
IS=3A
1.2
VGS=3.1V
IS=3A
1
VGS=2.5V
IS=3A
0.8
5
0
2
4
6
8
0
10
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
IS (A)
Figure 3: On-Resistance vs. Source Current and
Gate Voltage
50
1.0E+01
IS=3A
1.0E+00
1.0E-01
30
IS (A)
RSS(ON) (mΩ)
40
125°C
1.0E-02
125°C
20
1.0E-03
25°C
10
25°C
1.0E-04
0
1.0E-05
0
2
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
Rev.2.0: August 2015
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0.0
0.2
0.4
0.6
0.8
1.0
VFSS (Volts)
Figure 6: Forward Source to Source Characteristics
Page 3 of 5
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
5
VSS=10V
IS=3A
VGS (Volts)
4
3
2
1
0
0
3
6
9
12
Qg (nC)
Figure 7: Gate-Charge Characteristics
100
100.0
TJ(Max)=150°C
TA=25°C
10µs
10µs
RSS(ON)
limited
100µs
Power (W)
IS (Amps)
10.0
1ms
1.0
10ms
10
1
TJ(Max)=150°C
TA=25°C
0.1
DC
0.0
0.01
0.1
1
VSS (Volts)
10
0.1
1E-050.00010.001 0.01
100
ZθJA Normalized Transient
Thermal Resistance
1
1
10
100 1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note1)
VGS> or equal to 2.5V
Figure 9: Maximum Forward Biased Safe
Operating Area (Note1)
10
0.1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=180°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
1E-05
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note1)
Rev.2.0: August 2015
www.aosmd.com
Page 4 of 5
TEST CIRCUIT 1 Isss
TEST CIRCUIT 2 Igss1,2
POSITIVE VSS FOR ISSS+
POSITIVE VGS FOR IGSS1+
S2
NEGATIVE VSS FOR ISSS-
S2
NEGATIVE VGS FOR IGSS1When FET1 is measured
between GATE and SOURCE
G2
A
G2
of FET2 are shorted
D2
D2
D1
D1
VSS
G1
G1
A
VG
S1
TEST CIRCUIT 3 Vgs(off)
S1
TEST CIRCUIT 4 Rss(on)
S2
S2
When FET1 is measured
Vss/Is
between GATE and SOURCE
of FET2 are shorted
G2
G2
A
Is
D2
D2
D1
D1
VSS
G1
G1
V
VSS
VGS
VGS
S1
TEST CIRCUIT 5 VF(SS)1,2
S1
TEST CIRCUIT 6 BVDSS
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
S2
S2
4.5V
When FET1 measured
G2
G2
IF
FET2 VGS=4.5V
Is
D2
D2
D1
D1
G1
G1
V
V
VSS
VGS=0
S1
S1
TEST CIRCUIT 8
Switching time
TEST CIRCUIT 7 BVGSO1,2
POSITIVE VSS FOR ISSS+
NEGATIVE VSS FOR ISSS-
S2
Vout
S2
When FET1 is measured
between GATE and SOURCE
G2
of FET2 are shorted
G2
D2
D2
D1
D1
Vin
G1
G1
V
IG
Rev.1.0: August 2015
S1
S1
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Page 5 of 5