AON3818 24V Dual N-Channel AlphaMOS General Description Product Summary VDS • Trench Power AlphaMOS (αMOS LV) technology • Low RDS(ON) • Low Gate Charge • ESD protection • RoHS and Halogen-Free Compliant ID (at VGS=4.5V) 24V 8A RDS(ON) (at VGS=4.5V) < 13.5mΩ RDS(ON) (at VGS=4.0V) < 14mΩ RDS(ON) (at VGS=3.7V) < 15mΩ RDS(ON) (at VGS=3.1V) < 17mΩ RDS(ON) (at VGS=2.5V) < 21mΩ Typical ESD protection HBM Class 2 Applications • Battery protection switch • Mobile device battery charging and discharging DFN 3x3 Top View D2 D1 Bottom View Top View 1 2 3 4 S2 G2 S1 G1 8 D1/D2 7 6 5 D1/D2 G1 G2 D1/D2 D1/D2 S2 S1 Pin 1 Orderable Part Number Package Type Form Minimum Order Quantity AON3818 DFN 3x3 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Symbol VDS Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current G VGS TA=25°C Pulsed Drain Current C Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.1.0: May 2014 Steady-State Steady-State A 2.7 W 1.7 TJ, TSTG Symbol t ≤ 10s V 32 PD TA=70°C ±12 6 IDM TA=25°C Power Dissipation B Units V 8 ID TA=70°C Maximum 24 RθJA RθJL -55 to 150 Typ 35 60 15 www.aosmd.com °C Max 45 75 20 Units °C/W °C/W °C/W Page 1 of 5 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250µA, VGS=0V Typ Max Units 24 V VDS=24V, VGS=0V 1 IDSS Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±10V ±10 µA Gate Threshold Voltage VDS=VGS, ID=250µA 0.4 0.8 1.2 V VGS=4.5V, ID=8A 7.5 10.8 13.5 19 TJ=55°C TJ=125°C RDS(ON) Static Drain-Source On-Resistance 10.5 15 VGS=4.0V, ID=6A 7.8 11.2 14 VGS=3.7V, ID=6A 8 11.5 15 VGS=3.1V, ID=4A 8 12.5 17 VGS=2.5V, ID=4A 8.6 14.8 21 gFS Forward Transconductance VDS=5V, ID=8A 42 VSD Diode Forward Voltage IS=1A,VGS=0V 0.66 IS Maximum Body-Diode Continuous Current DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=12V, f=1MHz f=1MHz SWITCHING PARAMETERS Qg Total Gate Charge Qgs Gate Source Charge Qgd tD(on) tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time mΩ S 1 V 4 A 840 pF 210 pF 205 pF 2 kΩ 9.5 VGS=4.5V, VDS=12V, ID=8A µA 5 15 nC 1.5 nC Gate Drain Charge 4.5 nC Turn-On DelayTime 0.3 µs VGS=4.5V, VDS=12V, RL=1.5Ω, RGEN=3Ω 0.8 µs 1.7 µs 5.2 µs A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating. THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev.1.0: May 2014 www.aosmd.com Page 2 of 5 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 30 4.5V 25 VDS=5V 25 2V 4V 20 ID(A) 20 ID (A) 30 2.5V 3.1V 3.7V 15 10 125°C 15 10 5 5 25°C VGS=1.5V 0 0 0 1 2 3 4 0 5 0.5 1.5 2 2.5 3 VGS(Volts) Figure 2: Transfer Characteristics (Note E) VDS (Volts) Figure 1: On-Region Characteristics (Note E) 18 Normalized On-Resistance 1.6 VGS=2.5V 16 RDS(ON) (mΩ) 1 14 VGS=3.1V VGS=3.7V 12 10 VGS=4.5V VGS=4V VGS=4.5V ID=8A 1.4 VGS=4V ID=6A VGS=2.5V ID=4A 1.2 VGS=3.7V ID=6A 1 VGS=3.1V ID=4A 0.8 8 0 4 8 12 0 16 25 50 75 100 125 150 175 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature (Note E) ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 35 1.0E+02 30 1.0E+01 25 1.0E+00 20 IS (A) RDS(ON) (mΩ) ID=8A 125°C 1.0E-01 15 1.0E-02 10 1.0E-03 25°C 5 125°C 25°C 1.0E-04 0 1.0E-05 0 2 4 6 8 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) Rev.1.0: May 2014 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) Page 3 of 5 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 5 1200 VDS=12V ID=8A 1000 Capacitance (pF) VGS (Volts) 4 3 2 Ciss 800 600 400 Coss 1 200 Crss 0 0 0 2 4 6 8 10 0 Qg (nC) Figure 7: Gate-Charge Characteristics 20 24 TJ(Max)=150°C TA=25°C RDS(ON) limited 100µs 1.0 10ms 0.0 0.01 100 10 TJ(Max)=150°C TA=25°C 0.1 Power (W) ID (Amps) 16 10µs 10µs 1ms ZθJA Normalized Transient Thermal Resistance 12 1000 10.0 1 8 VDS (Volts) Figure 8: Capacitance Characteristics 100.0 10 4 DC 0.1 1 10 VDS (Volts) VGS> or equal to 2.5V Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 1 1E-05 0.0001 0.001 0.01 100 0.1 1 10 100 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJA=75°C/W 0.1 PD 0.01 Single Pulse Ton T 0.001 1E-05 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.1.0: May 2014 www.aosmd.com Page 4 of 5 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.1.0: May 2014 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5