Process C1015

®
ISO 9001 Registered
Process C1015
CMOS 1.0µm
Analog Mixed Mode
Electrical Characteristics
T=25oC Unless otherwise noted
N-Channel Transistor
Threshold Voltage
Body Factor
Conduction Factor
Effective Channel Length
Width Encroachment
Punch Through Voltage
Poly Field Threshold
Symbol
VTN
γN
βN
LeffN
∆WN
BVDSSN
VTFP(N)
Minimum
0.65
0.72
40.0
0.70
P-Channel Transistor
Threshold Voltage
Body Factor
Conduction Factor
Effective Channel Length
Width Encroachment
Punch Through Voltage
Poly Field Threshold Voltage
Symbol
VTP
γP
βP
LeffP
∆WP
BVDSSP
VTFP(P)
Minimum
–1.3
0.46
12.5
0.72
Diffusion & Thin Films
Well (field) Sheet Resistance
N+ Sheet Resistance
N+ Junction Depth
P+ Sheet Resistance
P+ Junction Depth
Gate Oxide Thickness
Field Oxide Thickness
Gate Poly Sheet Res.
Top Poly Sheet Resistance
Metal-1 Sheet Resistance
Metal-2 Sheet Resistance
Passivation Thickness
Symbol
ρN-well(f)
ρN+
xjN+
ρP+
xjP+
TGOX
TFIELD
ρPOLY1
ρPOLY2
ρM1
ρM2
TPASS
Minimum
0.65
27
Capacitance
Gate Oxide
Metal-1 to Poly1
Metal-1 to Silicon
Metal-2 to Metal-1
Poly-1 to Poly-2
Symbol
COX
CM1P
CM1S
CMM
CP1P2
Minimum
© Daily Silver IMP
Typical
0.85
0.82
43.5
0.90
0.25
Maximum
1.05
0.92
47.0
1.10
Unit
V
V1/2
µA/V2
µm
µm
V
V
Comments
25 x 1.0µm
25 x 1.0µm
25 x 25µm
25 x 1.0µm
Per side
Typical
–1.1
0.56
14.0
0.97
0.3
Maximum
–0.9
0.66
15.5
1.22
Unit
V
V1/2
µA/V2
µm
µm
V
V
Comments
25 x 1.0µm
25 x 1.0µm
25 x 25µm
25 x 1.0µm
Per side
Typical
0.80
37
0.25
85
0.3
20.0
580
32
23
45
25
200+900
Maximum
1.10
47
Unit
KΩ/o
Ω/o
µm
Ω/o
µm
nm
nm
Ω/o
Ω/o
mΩ/o
mΩ/o
nm
Comments
n-well
Typical
1.73
0.046
0.028
0.035
0.5
Maximum
8
8
–8
–8
65
18.7
25
18
0.42
110
21.3
39
28
0.57
Unit
fF/µm2
fF/µm2
fF/µm2
fF/µm2
fF/µm2
oxide+nit.
Comments
21
Process C1015
Physical Characteristics
Starting Material
Starting Mat. Resistivity
Typ. Operating Voltage
Well Type
Metal Layers
Poly Layers
Contact Size
Via Size
Metal-1 Width/Space
Metal-2 Width/Space
Gate Poly Width/Space
P <100>
15 - 25 Ω-cm
5V
N-well
2
2
1.2x1.2µm
1.2x1.2µm
1.4 / 1.2µm
2.5 / 1.5µm
1.5 / 2.0µm
N+/P+ Width/Space
N+ To P+ Space
Contact To Poly Space
Contact Overlap Of Diffusion
Contact Overlap Of Poly
Metal-1 Overlap Of Contact
Metal-1 Overlap Of Via
Metal-2 Overlap Of Via
Minimum Pad Opening
Minimum Pad-to-Pad Spacing
Minimum Pad Pitch
1.6 / 1.6µm
7.0µm
1.0µm
1.0µm
0.8µm
0.8µm
0.8µm
0.8µm
65x65µm
5.0µm
80.0µm
Special Feature of C1015 Process: CMOS 1.0 µm analog technology with 2 levels of metal
and Poly-to-Poly capacitors for analog applications.
22
C1015