2SK2553(L), 2SK2553(S) Silicon N Channel MOS FET High Speed Power Switching REJ03G1015-1000 (Previous: ADE-208-357H) Rev.10.00 Sep 07, 2005 Application High speed power switching Features • • • • Low on-resistance RDS(on) = 7 mΩ typ. High speed switching 4 V gate drive device can be driven from 5 V source Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK(L)) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK(S)-(1)) D 4 4 1. Gate 2. Drain 3. Source 4. Drain G 1 1 2 3 Rev.10.00 Sep 07, 2005 page 1 of 8 2 3 S 2SK2553(L), 2SK2553(S) Absolute Maximum Ratings (Ta = 25°C) Item Symbol VDSS VGSS ID Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Ratings 60 ±20 50 200 50 45 174 75 150 –55 to +150 ID(pulse) Note 1 IDR IAP Note 3 EAR Note 3 Pch Note 2 Tch Tstg Unit V V A A A A mJ W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) Static drain to source on state resistance RDS(on) Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage |yfs| Ciss Coss Crss td(on) tr td(off) tf VDF Body to drain diode reverse recovery time Note: 4. Pulse Test Rev.10.00 Sep 07, 2005 page 2 of 8 trr Min 60 ±20 — — 1.0 — — 35 — — — — — — — — — Typ — — — — — 7 10 55 3550 1760 500 35 230 470 360 0.85 135 Max — — ±10 10 2.0 10 16 — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 60 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 25 A, VGS = 10 V Note 4 ID = 25 A, VGS = 4 V Note 4 ID = 25 A, VDS = 10 V Note 4 VDS = 10 V, VGS = 0, f = 1 MHz ID = 25 A, VGS = 10 V, RL = 1.2 Ω IF = 50 A, VGS = 0 IF = 50 A, VGS = 0 diF / dt = 50 A / µs 2SK2553(L), 2SK2553(S) Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 500 20 1 10 (1 sh ot n ) c (T = 25 5 s s io Operation in this area is limited by RDS(on) µs m m t ra 10 µs °C ) 2 1 50 100 150 Ta = 25°C 0.5 0.1 0.3 1 200 10 30 100 Drain to Source Voltage VDS (V) Typical Output Characteristics Typical Transfer Characteristics 10 V 6 V 100 Pulse Test 5V 4V 80 3.5 V 60 3V 40 20 VGS = 2.5 V 2 4 6 8 VDS = 10 V Pulse Test 80 60 40 25°C Tc = 75°C 20 –25°C 0 10 1 2 3 4 5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 1.0 Pulse Test 0.8 0.6 ID = 50 A 0.4 0.2 20 A 10 A Static Drain to Source on State Resistance RDS (on) (Ω) 0 3 Case Temperature TC (°C) Drain Current ID (A) 100 Drain Current ID (A) = pe 25 PW 50 0 O 50 100 10 C Drain Current ID (A) 75 0 Drain to Source Saturation Voltage VDS (on) (V) 10 200 D Channel Dissipation Pch (W) 100 0.5 Pulse Test 0.2 0.1 0.05 0.02 VGS = 4 V 0.01 0.005 10 V 0.002 0.001 0.0005 0 2 4 6 8 10 Gate to Source Voltage VGS (V) Rev.10.00 Sep 07, 2005 page 3 of 8 1 3 10 30 100 300 Drain Current ID (A) 1000 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance yfs (S) Static Drain to Source on State Resistance vs. Temperature 0.04 Pulse Test 0.032 0.024 ID = 50 A 10, 20 A 0.016 VGS = 4 V 0.008 10, 20, 50 A 10 V 0 –40 0 40 80 120 160 500 200 100 50 5 1 0.5 0.1 0.3 1 3 10 30 Drain Current ID (A) Body to Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage Capacitance C (pF) 5000 1000 500 200 100 50 20 di / dt = 50 A / µs VGS = 0, Ta = 25°C 10 0.3 1 3 10 30 100 Ciss 2000 Coss 1000 500 Crss 200 VGS = 0 f = 1 MHz 100 100 0 10 20 30 40 50 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 16 VDD = 10 V 25 V 50 V VDS 12 VGS 40 20 4 VDD = 50 V 25 V 10 V 40 80 120 160 Gate Charge Qg (nc) Rev.10.00 Sep 07, 2005 page 4 of 8 8 0 200 5000 2000 Switching Time t (ns) 20 ID = 50 A 80 0 75°C 2 2000 60 25°C 10 10000 100 Tc = –25°C 20 5000 5 0.1 VDS = 10 V Pulse Test Case Temperature TC (°C) Gate to Source Voltage VGS (V) Drain to Source Voltage VDS (V) Reverse Recovery Time t rr (ns) Static Drain to Source on State Resistance RDS (on) (Ω) 2SK2553(L), 2SK2553(S) 1000 td(off) 500 tf 200 tr 100 td(on) 50 20 VGS = 10 V, VDD = 30 V PW = 5 µs, duty < 1 % 10 5 0.1 0.3 1 3 10 30 Drain Current ID (A) 100 2SK2553(L), 2SK2553(S) Reverse Drain Current IDR (A) 100 Pulse Test 80 60 10 V 5V VGS = 0, –5 V 40 20 0 0.4 0.8 1.2 1.6 Source to Drain Voltage Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) Reverse Drain Current vs. Source to Drain Voltage 2.0 200 IAP = 45 A VDD = 25 V duty < 0.1 % Rg > 50 Ω 160 120 80 40 0 25 50 75 100 125 150 Channel Temperature Tch (°C) VSD (V) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θch – c(t) = γs (t) • θch – c θch – c = 1.67°C/W, Tc = 25°C 0.1 0.05 0.03 PDM 0.02 1 lse 0.0 t pu o h 1s 0.01 10 µ 100 µ D= PW T 1m 100 m 10 m Pulse Width L EAR = Vin 15 V D. U. T VDSS 1 • L • IAP2 • VDSS – VDD 2 V(BR)DSS IAP VDD VDS ID 50 Ω 0 Rev.10.00 Sep 07, 2005 page 5 of 8 10 Avalanche Waveform IAP Monitor Rg 1 PW (S) Avalanche Test Circuit VDS Monitor PW T VDD 2SK2553(L), 2SK2553(S) Switching Time Test Circuit Waveform Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vout Vin 10 V 50 Ω 10% 10% VDD = 30 V 90% td(on) Rev.10.00 Sep 07, 2005 page 6 of 8 10% tr 90% td(off) tf 2SK2553(L), 2SK2553(S) Package Dimensions JEITA Package Code RENESAS Code Package Name MASS[Typ.] PRSS0004AE-A LDPAK(L) / LDPAK(L)V 1.40g 8.6 ± 0.3 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 RENESAS Code Package Name PRSS0004AE-B LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] Unit: mm 1.30g (1.4) 4.44 ± 0.2 (1.5) 2.54 ± 0.5 Rev.10.00 Sep 07, 2005 page 7 of 8 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 + 0.3 – 0.5 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 10.0 (1.5) 8.6 ± 0.3 10.2 ± 0.3 1.7 SC-83 2.49 ± 0.2 11.0 ± 0.5 11.3 ± 0.5 0.3 10.0 +– 0.5 (1.4) 4.44 ± 0.2 10.2 ± 0.3 0.2 0.86 +– 0.1 JEITA Package Code Unit: mm 2.2 2SK2553(L), 2SK2553(S) Ordering Information Part Name 2SK2553L-E 2SK2553STL-E Quantity 500 pcs 1000 pcs Shipping Container Box (Sack) Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.10.00 Sep 07, 2005 page 8 of 8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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