2SK3211(L), 2SK3211(S) Silicon N Channel MOS FET High Speed Power Switching REJ03G1091-0400 Rev.4.00 May 15, 2006 Features • Low on-resistance RDS = 60 mΩ typ. • High speed switching • 4 V gate drive device can be driven from 5 V source Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK(L)) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK(S)-(1)) 4 D 4 1. Gate 2. Drain 3. Source 4. Drain G 1 1 2 3 Rev.4.00 May 15, 2006 page 1 of 8 2 3 S 2SK3211(L), 2SK3211(S) Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Symbol VDSS VGSS ID Ratings 200 ±20 25 100 25 25 41 100 150 –55 to +150 ID(pulse)Note1 IDR IAP Note3 EAR Note3 Pch Note2 Tch Tstg Unit V V A A A A mJ W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Note: 4. Pulse test Rev.4.00 May 15, 2006 page 2 of 8 Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss td(on) tr td(off) tf VDF trr Min 200 ±20 — — 1.0 — — 18 — — — — — — — — — Typ — — — — — 60 65 30 2420 790 340 20 230 590 330 0.95 230 Max — — ±10 10 2.5 75 85 — — — — — — — — — — Unit V V µA µA V mΩ mΩ S pF pF pF ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = 200 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 15 A, VGS = 10 VNote4 ID = 15 A, VGS = 4 V Note4 ID = 15 A, VDS = 10 V Note4 VDS = 10 V, VGS = 0, f = 1 MHz ID = 15 A, VGS = 10 V, RL = 2 Ω IF = 25 A, VGS = 0 IF = 25 A, VGS = 0 diF/ dt = 50 A/ µs 2SK3211(L), 2SK3211(S) Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating 1000 Drain Current ID (A) Channel Dissipation Pch (W) 160 120 80 40 DC 10 1m =1 Op 0m er 0µ s µs s s( ati on 1S ho (T c= 1 t) 25 ° C) Operation in this area is limited by RDS (on) 0.1 0 50 100 0.01 200 150 100 300 1000 Typical Transfer Characteristics 20 Pulse Test 4V 6V VDS = 10 V Pulse Test Drain Current ID (A) 3.5 V 3V 20 10 VGS = 2.5 V 0 30 10 Typical Output Characteristics 30 0 3 Drain to Source Voltage VDS (V) 10 V 40 1 Case Temperature Tc (°C) 50 2 4 6 8 16 12 8 Tc = 75°C 25°C 4 0 10 –25°C 0 1 2 3 4 5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 2.5 Pulse Test 2.0 1.5 1.0 ID = 15 A 10 A 0.5 0 0 5A 4 8 12 16 Gate to Source Voltage VGS (V) Rev.4.00 May 15, 2006 page 3 of 8 20 Static Drain to Source on State Resistance RDS (on) (mΩ) Drain Current ID (A) 10 PW Ta = 25°C 0 Drain to Source Saturation Voltage VDS (on) (V) 10 100 500 Pulse Test 200 100 VGS = 4 V 50 10 V 20 10 1 2 5 10 20 Drain Current ID (A) 50 100 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance yfs (S) Static Drain to Source on State Resistance vs. Temperature 250 Pulse Test 200 150 5,10,15 A VGS = 4 V 100 5,10,15 A 50 10 V 0 –40 0 40 80 120 160 25°C 75°C 10 5 2 1 0.5 0.1 VDS = 10 V Pulse Test 0.3 1 3 10 30 Body to Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 100 10000 di / dt = 50 A / µs VGS = 0, Ta = 25°C 5000 Ciss Capacitance C (pF) 500 200 100 50 20 2000 1000 500 Coss 200 Crss 100 50 VGS = 0 f = 1 MHz 20 10 0.1 200 10 0.3 1 3 10 30 10 20 30 40 50 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 20 ID = 20 A 160 16 VDD = 150 V 100 V 50 V 120 12 VGS 80 8 40 0 0 100 VDD = 150 V 100 V 50 V 40 80 120 4 VDS 160 Gate Charge Qg (nc) Rev.4.00 May 15, 2006 page 4 of 8 0 200 Gate to Source Voltage VGS (V) Reverse Recovery Time trr (ns) Tc = –25°C 20 Drain Current ID (A) 1000 Drain to Source Voltage VDS (V) 50 Case Temperature TC (°C) 1000 td(off) 500 Switching Time t (ns) Static Drain to Source on State Resistance RDS (on) (mΩ) 2SK3211(L), 2SK3211(S) tf 200 100 tr 50 td(on) VGS = 10 V, VDD = 30 V PW = 5 µs, duty < 1 % 20 10 0.1 0.2 0.5 1 2 5 Drain Current ID (A) 10 20 2SK3211(L), 2SK3211(S) 16 Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) (A) 20 Reverse Drain Current IDR Reverse Drain Current vs. Source to Drain Voltage Pulse Test 12 10 V 8 5V 4 0 VGS = 0, –5 V 0.2 0.4 0.6 0.8 Source to Drain Voltage 1.0 50 IAP = 25 A VDD = 50 V duty < 0.1 % Rg > 50 Ω 40 30 20 10 0 25 VSD (V) 50 75 100 125 150 Channel Temperature Tch (°C) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θ ch – c(t) = γ s (t) • θ ch – c θ ch – c = 1.25°C/W, Tc = 25°C 0.1 0.05 PDM 0.02 1 lse 0.0 t pu o h 1s 0.03 0.01 10 µ D= PW T 100 µ 1m 10 m Pulse Width 100 m 1 10 PW (S) Avalanche Test Circuit VDS Monitor PW T Avalanche Waveform L EAR = 1 2 • L • IAP2 • VDSS VDSS – VDD IAP Monitor VV(BR)DSS IAP Rg D. U. T VDS VDD ID Vin 15 V 50 Ω 0 Rev.4.00 May 15, 2006 page 5 of 8 VDD 2SK3211(L), 2SK3211(S) Switching Time Test Circuit Switching Time Waveforms Vout Monitor Vin Monitor 90% D.U.T. RL Vin Vout Vin 10 V 50 Ω 10% 10% VDD = 30 V 90% td(on) Rev.4.00 May 15, 2006 page 6 of 8 10% tr 90% td(off) tf 2SK3211(L), 2SK3211(S) Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.4.00 May 15, 2006 page 7 of 8 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 2SK3211(L), 2SK3211(S) Ordering Information Part Name 2SK3211L-E 2SK3211STL-E Quantity 500 pcs 1000pcs Shipping Container Box (Sack) Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.4.00 May 15, 2006 page 8 of 8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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