IS31LT3948-GRLS4-TR

IS31LT3948
PFM MODE BOOST LED DRIVER WITH THE EXTERNAL NMOS
February 2015
GENERAL DESCRIPTION
FEATURES
The IS31LT3948 is a PFM step-up DC-DC converter
designed for driving the white LED arrays for large
size LCD panel backlighting applications. It can
deliver stable constant output current from a few
milliamps up to 2A, programmed via an external
resistor.


The IS31LT3948 utilizes a control scheme in which
the output is automatically adjusted to the optimum
output voltage for the system, maximizing the
efficiency. Furthermore, the control scheme is
inherently stable removing the need to provide
additional loop compensation.






The device features external PWM dimming, which
allows the flexible control of the back-lighting
luminance.
The IS31LT3948 has a wide input voltage range
from 5V to 100V (Note). An integrated OVP circuit
protects the chip and the system even under no-load
conditions.
The chip is assembled in SOP-8 package. It
operates from 5V to 100V over two temperature
ranges of -40°C to +85°C and -40°C to +125°C.
Note: The IS31LT3948 has an internal 5V shunt
regulator connected to the VCC pin. A dropping
resistor must be connected between the VCC pin
and VIN to limit current flow. VIN voltages above
100V are allowed but care must be taken to ensure
that the output voltage remains greater than VIN,
and that the NMOS voltage rating is sufficiently
large.
Wide input voltage range: 5V~100V
Constant current output limited only by external
component selection (Note)
No loop compensation required
Internal over-voltage protection
Internal over-temperature protection
Operating temperature range -40C to +85C
(IS31LT3948-GRLS2-TR)
Operating temperature range -40C to +125C
(IS31LT3948-GRLS4-TR)
SOP-8 package
Note: The maximum output current is determined by
VOUT/VIN ratio as well as the external components. If
output current and VOUT/VIN ratio is high, high current
components of inductor and NMOS are needed.
APPLICATIONS





TV monitor backlighting
Notebook
Automotive
Street lamp
LED lighting
TYPICAL APPLICATION CIRCUIT
Figure 1
Typical Application Circuit
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
1
IS31LT3948
PIN CONFIGURATIONS
Package
Pin Configuration (Top View)
SOP-8
PIN DESCRIPTIONS
No.
Pin
Description
1
VCC
Positive power supply input pin. Internally clamped at 5V (Typ.).
2
TOFF
Off time setting pin. An external resistor connected to this pin forms
an RC discharge path to generate a constant minimum off time of
the NMOS.
3
ADJ
Enable and input peak current control pin. Pulled up to 4.5V
internally to set VCS_TH =0.24V when ADJ is floating. If VADJ<0.5V,
NMOS will always shutdown. If 0.5≤VADJ≤2.4V, VCS_TH = VADJ/10. If
VADJ>2.4V, VCS_TH =0.24V.
Note: During the start up (VCC voltage is rising), ADJ must not be
connected to low (recommended floating).
4
GND
Ground.
5
GATE
Driver’s output for the gate of the external NMOS.
6
CS
Current sense input for the boost, peak current control loop.
7
FB
Feedback voltage input pin. Used to regulate the current of LEDs by
keeping VFB=0.3V.
8
OVP
Overvoltage protection input pin, if the voltage of OVP exceed 1V,
gate will always shutdown.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
2
IS31LT3948
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No.
Package
QTY/Reel
IS31LT3948-GRLS2-TR
SOP-8, Lead-free
2500
Part No. Rules
IS (ISSI Prefix)
31 (Product Family) - Analog and mix signal
LT (Product Type) - Lighting LED driver
3948 (Part Number) - 3948
GR (Package Code) - SOP
L (Solder Type) - Lead-free (RoHS compliant)
S2 (Temperature Grade) - Industrial temperature (-40°C ~ +85°C)
TR (Packing Option) - Tape & Reel
Industrial Range: -40°C to +125°C
Order Part No.
Package
QTY/Reel
IS31LT3948-GRLS4-TR
SOP-8, Lead-free
2500
Part No. Rules
IS (ISSI Prefix)
31 (Product Family) - Analog and mix signal
LT (Product Type) - Lighting LED driver
3948 (Part Number) - 3948
GR (Package Code) - SOP
L (Solder Type) - Lead-free (RoHS compliant)
S4 (Temperature Grade) - Industrial temperature (-40°C ~ +125°C)
TR (Packing Option) - Tape & Reel
Copyright © 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
3
IS31LT3948
ABSOLUTE MAXIMUM RATINGS
VCC to GND
CS, ADJ,GATE,TOFF,OVP,FB
VCC Max. input current
Maximum operating junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature, TA = TJ
ESD (HBM)
ESD (CDM)
-0.3V to 6.0V
-0.3V to 6.0V
10mA
150°C
-65°C ~ +150°C
-40°C ~ +85°C, IS31LT3948-GRLS2-TR
-40°C ~ +125°C, IS31LT3948-GRLS4-TR
2kV
1kV
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN=10V, RIN=10k, ADJ floating, TA=25°C.
○
Parameter range based on TA = -40°C ~ +125°C (Note 1)
The symbol in the table means these parameters are only available in the above temperature range.
Symbol
Parameter
Conditions
VIN
Input voltage
Supply voltage
connected to VCC via a
appropriate resistor
(Note 2)
VCC
VCC clamp voltage
RIN=10k
Undervoltage threshold
VCC rising
VUVLO
VUVLO_HYS
Tem.
Min.
Typ.
5
○
○
Max.
Unit
100
V
4.3
5
5.6
4.1
5
5.8
2.2
2.7
3.0
2.0
2.7
3.2
Undervoltage threshold hysteresis
300
V
V
mV
400
500
400
700
50
75
50
145
215
240
265
202
240
275
Quiescent supply current
VCC= VCC clamp voltage
Quiescent supply current when
VCC undervoltage
VCC=2.5V
VCS_TH
Peak current sense threshold
VADJ=5V
tBLANK
Peak current sense blank interval
VCS=VCS_TH+50mV
500
ns
Fixed turn-off interval
REXT=250k
10
µs
ICC
tOFF
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
○
○
○
µA
µA
mV
4
IS31LT3948
ELECTRICAL CHARACTERISTICS (CONTINUE)
Unless otherwise specified, VIN=10V, RIN=10k, ADJ floating, TA=25°C.
○
Parameter range based on TA = -40°C ~ +125°C (Note 1)
The symbol in the table means these parameters are only available in the above temperature range.
Symbol
Parameter
Conditions
Tem.
Min.
Typ.
Max.
Unit
Peak current control low threshold
0.5
V
VADJ
Peak current control high
threshold
2.4
V
TSD
Thermal shutdown threshold
150
°C
TSD_HYS
Thermal shutdown hysteresis
20
°C
IS31LT3948-GRLS2-TR
VFB_TH
Feedback voltage threshold
Overvoltage input threshold
300
310
292
300
310
285
300
315
0.9
1.0
1.1
IS31LT3948-GRLS4-TR
○
VOVP_TH
290
mV
V
Note 1: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over temperature
range, are guaranteed by design, characterization and process control.
Note 2: VIN is the input voltage. When VIN≤5V, connect input voltage directly to VCC. When VIN>5V, input voltage should be connected to VCC
pin via an appropriately valued resistor.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
5
IS31LT3948
TYPICAL PERFORMANCE CHARACTERISTICS
750
400
VOUT = 40V
RCS = 0.06Ω
RFB = 0.425Ω
390
Output Current (mA)
Output Current (mA)
725
700
675
650
380
VOUT = 40V
RCS = 0.12Ω
RFB = 0.857Ω
370
360
350
340
330
320
625
310
600
10
12
14
16
18
20
22
24
26
28
300
10
30
12
14
16
Supply Voltage vs. Output Current
Figure 3
95
VOUT = 40V
RCS = 0.06Ω
RFB = 0.425Ω
95
24
26
28
30
28
30
Supply Voltage vs. Output Current
Efficiency (%)
85
80
85
80
75
75
70
10
VOUT = 40V
RCS = 0.12Ω
RFB = 0.857Ω
90
90
Efficiency (%)
22
100
100
12
14
16
18
20
22
24
26
28
70
10
30
12
14
Figure 4
16
18
20
22
24
26
Supply Voltage (V)
Supply Voltage (V)
Supply Voltage vs. Efficiency
Figure 5
Supply Voltage vs. Efficiency
400
750
VIN = 12V
RCS = 0.06Ω
RFB = 0.425Ω
390
Output Current (mA)
725
Output Current (mA)
20
Supply Voltage (V)
Supply Voltage (V)
Figure 2
18
700
675
650
380
VIN = 12V
RCS = 0.12Ω
RFB = 0.857Ω
370
360
350
340
330
320
625
310
600
20
25
30
35
40
45
300
20
25
Output Voltage vs. Output Current
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
35
40
45
Output Voltage (V)
Output Voltage (V)
Figure 6
30
Figure 7
Output Voltage vs. Output Current
6
IS31LT3948
100
100
VIN = 12V
RCS = 0.06Ω
RFB = 0.425Ω
95
95
90
Efficiency (%)
Efficiency (%)
90
85
80
75
70
VIN = 12V
RCS = 0.12Ω
RFB = 0.857Ω
85
80
75
20
25
30
35
40
70
45
20
25
30
Output Voltage (V)
Figure 8
Output Voltage vs. Efficiency
Figure 9
45
Output Voltage vs. Efficiency
400
VIN = 12V
RCS = 0.06Ω
RFB = 0.68Ω
fPWM = 200Hz,500Hz,1kHz
With external NMOS PWM Dimming
600
500
400
300
300
250
200
150
200
100
100
50
0
0
10
20
30
40
50
VIN = 12V
RCS = 0.12Ω
RFB = 0.32Ω
fPWM = 200Hz,500Hz,1kHz
With external NMOS PWM Dimming
350
Output Current(mA)
700
Output Current(mA)
40
Output Voltage (V)
800
60
70
80
90
0
100
0
10
20
30
Figure 10
PWM Duty Cycle vs. Output Current
Figure 11
500
450
50
60
70
80
90
100
PWM Duty Cycle vs. Output Current
5.5
VIN = 5V
RIN = 0Ω
5.4
5.3
350
5.2
VCC Voltage (V)
400
300
250
200
150
5
4.9
4.8
4.7
50
4.6
-25
-10
5
20
35
50
65
80
95
110 125
VIN = 12V
RIN = 12kΩ
5.1
100
0
-40
40
PWM Duty Cycle(%)
PWM Duty Cycle(%)
Supply Current (µA)
35
4.5
-40
-25
-10
5
Temperature (°C)
Figure 12
Temperature vs. Supply Current
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
20
35
50
65
80
95
110 125
Temperature (°C)
Figure 13
Temperature vs. VCC
7
IS31LT3948
330
fPWM = 500Hz
ILED = 450mA
With external NMOS PWM dimming
VIN = 24V
VFB Voltage (mV)
320
310
ILED
200mA/Div
300
290
280
270
-40
VPWM
2V/Div
-25
-10
5
20
35
50
65
80
95
Temperature (°C)
Figure 14
Temperature vs. VFB
110 125
Time (10µs/Div)
Figure 15
Output Current vs. VPWM on Rising Time
fPWM = 500Hz
ILED = 450mA
With external NMOS PWM dimming
ILED
200mA/Div
VPWM
2V/Div
Time (10µs/Div)
Figure 16
Output Current vs. VPWM on Falling Time
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
8
IS31LT3948
FUNCTIONAL BLOCK DIAGRAM
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
9
IS31LT3948
APPLICATION INFORMATION
INTERNAL 5V REGULATOR
LED CURRENT CONTROL
The IS31LT3948 includes an internal shunt regulator
of 5V (Typ.) connected to the VCC pin. When the
input voltage is higher than 5V, connect VCC to VIN
using an appropriately valued, current limiting
resistor. The regulator maintains a 5V power supply
for the internal NMOS switch gate driver and the
internal control circuitry. In applications where the
input voltage is 5V, connect the input voltage directly
to VCC. When VCC is connected directly to VIN, VIN
may not exceed 5V. Bypass the VCC pin using a low
ESR capacitor (recommended 10µF ceramic
capacitor) to provide a high frequency path to GND.
IS31LT3948 regulates the LED current by sensing
the voltage across an external sense resistor in
series with the LEDs. The voltage is sensed via the
FB pin where the internal feedback reference
voltage is 0.3V (Typ.). The LED current can be set
from following equation easily.
The current required by IS31LT3948 is 0.4mA (Typ.)
plus the switching current of the external switch. The
switching frequency of the external NMOS affects
the amount of current required, as does the NMOS’s
gate charge requirement (found on the NMOS data
sheet).
SETTING THE OVER VOLTAGE PROTECTION
I IN  0.4mA  QG  f S
(1)
Where fS is the switching frequency and QG is the
external NMOS gate charge.
UNDER VOLTAGE LOCKOUT
IS31LT3948 features an under voltage lockout
threshold of 2.7V (Typ.) with a hysteresis of 300mV.
The chip is disabled when VCC is lower than 2.4V
and enabled when VCC exceeds 2.7V.
I OUT 
0.3
RFB
In order to have an accurate LED current, precision
resistors are required (1% is recommended).
The open string protection is achieved through the
over voltage protection (OVP). In some cases, an
LED string failure results in a feedback voltage that
is always zero. If this happens, the part then keeps
boosting the output voltage higher and higher. If the
output voltage reaches the programmed OVP
threshold, the protection will be triggered and stop
the switching action. To make sure that the circuit
functions properly, the OVP setting resistor divider
must be set with an appropriate value. The
recommended VOVP point is about 1.2 times or 5V
(choose the larger one) higher than the output
voltage for normal operation.
VOVP  VOVP _ TH 
STEP-UP CONVERTER
IS31LT3948’s step-up converter uses a peak current
mode topology wherein the CS pin voltage
determines the peak current in the inductor of the
converter and hence the duty cycle of the GATE
switching waveform. The basic loop uses a pulse
from an internal oscillator to set an RS flip-flop and
turn on the external power NMOS. After the blanking
time, the inductor current is sensed during the GATE
on period by a sense resistor, RCS, in the source of
the external power NMOS. The current increases in
the NMOS and inductor until the voltage across the
sense resistor reaches the CS threshold, at which
time NMOS is turned off. Once the NMOS is turned
off, the inductor reverses polarity, providing the
voltage boost, and the current of inductor will
decrease until the FB pin voltage drops below
internal reference voltage and the NMOS is then
turned on again. This operation repeats each cycle.
Note, in the case where the FB pin voltage does not
exceed the FB reference voltage of 0.3V, such as at
start-up, the NMOS will remain off for the
programmed minimum tOFF time, then the NMOS is
switched on again.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
(2)
R4  R5
R5
(3)
Where, VOVP_TH is 1V, and VOVP is the output voltage
OVP level.
DIMMING CONTROL
There are two methods for dimming.
1)
External NMOS PWM dimming:
Figure 17
External PWM Dimming
When the PWM input is high (VH>2.4V), M2 is on
and IS31LT3948 operates normally to regulate the
output current. When PWM is low logic (VL<0.5V),
M2 is off and IS31LT3948 is shutdown. Using a fixed
frequency PWM signal and changing the duty cycle
adjusts the average output current. The
10
IS31LT3948
recommended 5V PWM frequency is between
200Hz and 1kHz. M2 is recommended to use
AP2306. The rising time depends on external
component. The minimum on time of PWM signal is
recommended to be over the rising time to achieve
better dimming rate.
2)
RC filter PWM dimming:
Generally, setting the peak inductor current to 1.5
times the average input current is sufficient to
maintain a good regulation of the output current.
I PEAK _ IN  1.5  I AVG _ IN 
VCS _ TH
(6)
RCS
VCS_TH: If 0.5<VADJ<2.4V, VCS_TH = VADJ/10. If
VADJ>2.4V, VCS_TH =0.24V. ADJ floating,
VCS_TH=0.24V.
INPUT CAPACITOR
The input capacitor of the IS31LT3948 will supply
the transient input current of the power inductor.
Value of 100μF or higher is recommended to prevent
excessive input voltage ripple.
SETTING tOFF_MIN
Figure 18
RC PWM Dimming
A filtered PWM signal can be used as an adjustable
DC voltage for LED dimming control. The filtered
PWM signal becomes DC voltage which is summed
together with the FB voltage to regulate the output
current. Fix the frequency of the PWM signal and
change the duty cycle to adjust the LED current. The
LED current can be calculated by the following
equation:
VFB _ TH  R6  (VPWM  Duty  VFB _ TH ) /( R7  R8 )
tOFF _ MIN  40  10 12  REXT
(7)
10
(4)
8
RFB
The PWM duty cycle is inversely proportional to the
LED current. That is, when the PWM signal is 100%
duty cycle, the output current is minimum, ideally
zero, and when the PWM signal is 0% duty cycle,
the output current is maximum.
Note: When the VOUT/VIN ratio is less than 2, careful
consideration must be given to ensure that VOUT
remains greater than VIN at the minimum dimming
level.
4
0
0
50
IS31LT3948 limits the peak inductor current, and
thus peak input current through the feedback of R3
connected from source of NMOS to ground. The
required average input current is based on the boost
ratio, VOUT/VIN, and the designed value for average
LED current. The required average input current can
be calculated as:
(5)
: assumed power conversion efficiency (the
recommended value is 0.9)
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
100
150
200
250
REXT (kΩ)
Figure 19
INPUT PEAK CURRENT CONTROL
VOUT  I OUT
VIN  
6
2
See details value in the Example section.
I AVG _ IN 
tOFF_MIN (µs)
I OUT 
IS31LT3948 operates in a pulsed frequency
modulation mode. The boost control loop is a
constant off-time architecture. The off time is
programmable and set by an external resistor
connected between the tOFF pin and GND. In most
application, the recommended tOFF_MIN is 1µs. The
governing equation for the off time is:
REXT vs. tOFF_MIN
Note, the minimum tOFF_MIN is 1µs.
INDUCTOR SELECTION
Inductor value directly determines the switching
frequency of the converter. To the fixed condition
and the larger inductor value the lower switching
frequency. The higher frequency will reduce the
value of inductor, but will increase the switching loss
on NMOS.
The switching frequency can be calculated blow.
Switching frequency:
f  1 / tON  tOFF 
(8)
11
IS31LT3948
sufficient. Proportionally lower ripple can be
achieved with higher capacitor values.
The current ripple in the inductor:
I RIPPLE  2  I PEAK _ IN  I AVG _ IN 
(9)
SCHOTTKY RECTIFIER
NMOS on time:
tON 
I RIPPLE  L
VIN  I AVG _ IN  ( RL  RDS _ ON  RCS )
(10)
NMOS off time:
tOFF 
VOUT
I RIPPLE  L
 VD  VIN  I AVG _ IN  RL
(11)
Note, the selection of inductor must ensure that the
tOFF larger than the tOFF_MIN, or else the converter can
not output the required current.
Where:
VIN: Input voltage (V)
VOUT: Output voltage (V)
IRIPPLE: Current ripple in the inductor (A)
L: inductor value (H)
IPEAK_IN: Input peak current (A)
IAVG_IN: Input average current (A)
RL: Inductor DCR ()
RDS_ON: NMOS on resistance ()
VD: diode forward voltage at the required load
current (V)
The recommended switching frequency: 20kHz < f <
200kHz (Lower than 20kHz will cause audio noice of
the inductor and too high frequency will increase the
switching loss on NMOS).
To the fixed VIN, VOUT, IAVG_IN, IPEAK_IN and the
switching frequency is inversely proportional to the
inductor value.
Select an inductor with a rating current over input
average current and the saturation current over the
calculated peak current. To calculate the worst case
inductor peak current, use the minimum input
voltage, maximum output voltage, and maximum
total LED current. Also ensure that the inductor has
a low DCR (copper wire resistance) to minimize I2R
power loss.
The external diode for the IS31LT3948 must be a
Schottky diode, with low forward voltage drop and
fast switching speed. The diode’s average current
rating must exceed the application’s average output
current. The diode’s maximum reverse voltage rating
must exceed the over voltage protection of the
application. For PWM dimming applications, be
aware of the reverse leakage of the Schottky diode.
Lower leakage current will drain the output capacitor
less during PWM low periods, allowing for higher
PWM dimming ratios.
Power NMOS Selection
The power NMOS selected should have a VDS rating
which exceeds the maximum over voltage protection
(OVP) level programmed for the application. The
VGS_TH of NMOS should be not higher than 4V. The
RDS_ON of the NMOS will determine DC power loss.
The DC power loss can be calculated by:
2
Ploss  I M 1  RDS _ ON
2
V  I
 Duty 
  RDS _ ON
  OUT OUT
VIN  


The recommended NMOS rating current is 5 times
(or higher) to the input peak current (IPEAK_IN). Be
aware of the power dissipation within the NMOS and
deciding if the thermal resistance of the NMOS
package causes the junction temperature to exceed
maximum ratings.
PCB LAYOUT CONSIDERATION
As for all switching power supplies, especially those
providing high current and using high switching
frequencies, layout is an important design step. If
layout is not carefully done, the regulator could show
instability as well as EMI problems.


OUTPUT CAPACITOR
The output capacitor holds the output current during
NMOS on. The capacitor directly impacts the line
regulation and the loading regulation.
Low ESR capacitors using at the IS31LT3948
converter output can minimize output ripple voltage
and improve output current regulation. For most
applications, a 220μF low ESR capacitor will be
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
(12)


Wide traces should be used for connection of
the high current loop to minimize the EMI and
unnecessary loss.
The external components ground should be
connected to IS31LT3948 ground as short as
possible. Especially the RFB ground to
IS31LT3948 ground connection should be as
short and wide as possible to have an accurate
LED current.
The capacitor C1, C2, C3 should be placed as
close as possible to IS31LT3948 for good
filtering. Especially the output capacitor C3
connection should be as short and wide as
possible.
NMOS drain is a fast switching node. The
inductor and Schottky diode should be placed as
close as possible to the drain and the connection
12
IS31LT3948
should be kept as short and wide as possible.
Avoid other traces crossing and routing too long
in parallel with this node to minimize the noise
coupling into these traces. The feedback pin (e.g.
CS, FB, OVP) should be as short as possible
and routed away from the inductor, the Schottky
diode and NMOS. The feedback pin and
feedback network should be shielded with a
ground plane or trace to minimize noise coupling
into this circuit.
Figure 20
The thermal pad on the back of NMOS package
must be soldered to the large ground plane for
ideal power dissipation.
External NMOS PWM Dimming
VIN
5V ~ 100V
D1
L1
LED+
R1
C1

1
2
C2
VCC
GATE
TOFF
CS
5
M1
6
C3
R4
R2
4
3
R3
IS31LT3948
GND
ADJ
OVP
FB
8
7
LED-
R5
R6
C4
RFB
R7
R8
PWM
For dimming
Figure 21
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
RC Filter PWM Dimming
13
IS31LT3948
EXAMPLE:
R8  C 4 
Input: VIN=12V~24V
50
2  f PWM
Output: IOUT=350mA, VOUT≈30V~40V (9~12LEDs,
VFB=3.3V)
Assuming fPWM is 200Hz (or higher), and choosing
C4=0.1µF, we find R8≥400kΩ.
To calculate the worst case parameter, use the
minimum input voltage, the maximum output voltage,
and maximum output current. So choose: VIN=12V,
IOUT=350mA, VOUT≈40V (12LEDs, VFB=3.3V)
Choose C4=0.1µF, R8=400kΩ.
Choose a nominal value for R7, then compute R6.
Choose R7=10kΩ, then R6=26.2kΩ
Take Duty=0, VPWM = 5V and IOUT=350mA into the
equation, then we have:
1. R1, C1 and C2
I OUT 
Assume IIN = 2.5mA,
R1 
VIN _ MIN  VCC
I IN

12  5
 2.8k  3k
2 .5
Note: The maximum VCC input current at highest
input voltage must not exceed 10mA.
IIN = (VIN_MAX-VCC)/R1 <10mA
Choose C1 as 220µF/35V, C2 as 10µF/16V.
2. R2 to Set tOFF_MIN
The recommended value is 1µs,

3. RFB to Set Output Current and C3
RFB 
VFB _ TH
I OUT
 0.86
Choose C3 as 220µF/63V (Low ESR electrolytic
capacitor).
4. R6, R7, R8 and C4
R6, R7 and R8 can be calculated by:
I OUT
RFB
0.3  26.2  (5  0%  0.3) /( 400  10)
 0.35 A
RFB
So RFB=0.91 (With the RC filter PWM dimming, the
RFB will be different from the no dimming application.)
4. R3 to Set Input Peak Current
Assume I PEAK _ IN  1.5  I AVG _ IN
I PEAK _ IN  1.5  I AVG _ IN  1.5 
tOFF _ MIN  40  10 12  REXT  1s
Choose R2=24kΩ.
VFB _ TH  R6  (VPWM  Duty  VFB _ TH ) /( R7  R8 )
 1 .5 
VOUT  I OUT
VIN  
40  0.35
 1.95 A
12  0.9
: assumed power conversion efficiency (the
recommended value is 0.9).
RCS 
VCS _ TH
I PEAK _ IN
 0.123
Choose R3=0.123Ω, IPEAK=1.95A
5. L1 to Set Frequency
Input average current is
VFB _ TH  R6  (VPWM  Duty  VFB _ TH ) /( R7  R8 ) I AVG _ IN  VOUT  I OUT  1.3 A

VIN  
R FB
Take Duty=100%, VPWM=5V and IOUT=0A into the
equation, then we have:
The current ripple in the inductor:
I RIPPLY  2  I PEAK _ IN  I AVG _ IN   1.3 A
0.3  R6  (5  100%  0.3) /( R7  R8 )
0
0.86
According to tOFF >tOFF_MIN:
Which simplifies to: 15.66  R 6  R7  R8
tOFF 
The low-pass filter formed by R8 and C4 must have a
corner frequency much lower than the PWM
frequency. As the corner frequency of the filter
decreases, the response time of the LED current to
changes in PWM increases. Choose a corner
frequency 50 times lower than fPWM.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
VOUT
I RIPPLE  L
 1s
 VD  VIN  I AVG _ IN  RL
This gives L>22µH.
Assuming L=22µH and
RL  RDS _ ON  RCS  0.4 .
14
IS31LT3948
tON 
I RIPPLE  L
 2.5s
VIN  I AVG _ IN  ( RL  RDS _ ON  RCS )
Then the assumed switching frequency:
f '  1 / tON  tOFF   285kHz
The recommended switching frequency:
20kHz<f<200kHz, according to the switching
frequency is inversely proportional to the inductor
value, choose L=100µH. Therefore:
f  f '
22
 63kHz
100
The saturation current of the inductor must exceed
the input peak current (IPEAK_IN).
7. NMOS M1 and Diode D1
I1(NMOS) >IPEAK_IN
V1(NMOS) >VOVP
Lower RDS_ON NMOS can improve the converter
efficiency. The recommended NMOS rating current
is 5 times (or higher) to the input peak current
(IPEAK_IN).
Choose 13N10L as M1.
The average and peak current of diode must exceed
the output average current and input peak current.
The diode’s maximum reverse voltage rating must
exceed the over voltage protection of the application.
Choose SS310 as D1.
6. R4, R5 to Set OVP
Set
VOVP  VOUT  5V  45V
VOVP  VOVP _ TH 
R4  R5
R5
Choose R5=10kΩ, then R4 = 470kΩ.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
15
IS31LT3948
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 22 Classification Profile
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
16
IS31LT3948
PACKAGE INFORMATION
SOP-8
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
17
IS31LT3948
LAND PATTERN
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. D, 01/21/2015
18