IS31LT3948 PFM MODE BOOST LED DRIVER WITH THE EXTERNAL NMOS OCTOBER 2011 GENERAL DESCRIPTION FEATURES The IS31LT3948 is a PFM step-up DC-DC converter designed for driving the white LED arrays for large size LCD panel backlighting applications. It can deliver stable constant output current from a few milliamps up to 2A, programmed via an external resistor. • • The IS31LT3948 utilizes a control scheme in which the output is automatically adjusted to the optimum output voltage for the system, maximizing the efficiency. Furthermore, the control scheme is inherently stable removing the need to provide additional loop compensation. • • • • • Wide input voltage range: 5V-100V Constant Current Output limited only by external component selection (Note) No loop compensation required Internal over-voltage protection Internal over-temperature protection Operating temperature range -40°C to 85°C SOP-8 package Note: The maximum output current is determined by Vout/Vin ratio as well as the external components. If output current and Vout/Vin ratio is high, high current components of inductor and NMOS are needed. APPLICATIONS The device features external PWM dimming, which allows the flexible control of the back-lighting luminance. The IS31LT3948 has a wide input voltage range from 5V to 100V (Note). An integrated OVP circuit protects the chip and the system even under no-load conditions. • • • • • TV Monitor Backlighting, Notebook Automotive Street Lamp LED Lighting Note: The IS31LT3948 has an internal 5V shunt regulator connected to the VCC pin. A dropping resistor must be connected between the VCC pin and VIN to limit current flow. VIN voltages above 100V are allowed but care must be taken to ensure that the output voltage remains greater than VIN, and that the NMOS voltage rating is sufficiently large. TYPICAL OPERATING CIRCUIT L1 VIN(5~100V) D1 LED(+) R1 R4 C1 VCC TOFF GATE M1 C2 ADJ OVP GND FB LED(-) C3 CS R2 R3 R5 Rfb Figure 1 Typical Operating Circuit Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 1 IS31LT3948 PIN CONFIGURATIONS Package Top View VCC 1 8 OVP TOFF 2 7 FB ADJ 3 6 CS GND 4 5 GATE SOP-8 PIN DESCRIPTIONS Pin Name 1 VCC 2 TOFF 3 ADJ 4 5 6 GND GATE CS 7 FB 8 OVP Function Positive power supply input pin. Internally clamped at 5V (typical). Off time setting pin. An external resistor connected to this PIN forms an RC discharge path to generate a constant minimum off time of the NMOS Enable and input peak current control pin. Pulled up to 4.5V internally to set VCSTH =0.24V when ADJ is floating. If VADJ<0.5V, NMOS will always shutdown. If 0.5• VADJ• 2.4V, VCSTH = VADJ/10. If VADJ>2.4V, VCSTH =0.24V Ground Driver’s output for the gate of the external NMOS Current sense input for the boost, peak current control loop Feedback voltage input pin. Used to regulate the current of LEDs by keeping VFB=0.3V. Overvoltage protection input pin., if the voltage of OVP exceed 1V, Gate will always shutdown ORDERING INFORMATION Order Part No. Package QTY/Reel IS31LT3948-GRLS2-TR SOP-8, Lead-free 2500 Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 2 IS31LT3948 ABSOLUTE MAXIMUM RATINGS Parameter Value VCC to GND -0.3V to 6V CS, ADJ,GATE,TOFF,OVP,FB -0.3V to 6V VCC Max. Input Current(note) 10mA Junction Temperature Range -40oC to +150oC Storage Temperature Range -65oC to +150oC ESD Human Model 3500V Notes: 1. Exceeding VCC maximum input current may cause the pin not to clamp at 5V. 2. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Vin=10V, Rin=10KΩ, ADJ floating, Tamb=25 oC) Symbol VINDC VCC UVLO Δ UVLO Parameter Conditions Min Input voltage Supply voltage connected to VCC via a appropriate resistor (Note) VCC clamp voltage Rin=10KOhm 4.3 Undervoltage threshold VCC rising 2.0 spec Typ 5 Undervoltage threshold hysteresis Max Unit 100 V 5 5.6 V 2.7 3.0 V 300 mV Quiescent supply current VCC=5V 250 400 uA Quiescent supply current when VCC undervoltage VCC=2.5V 50 75 uA VCSTH Peak current sense threshold ADJ=5V 240 265 mV TBLANK Peak current sense blank interval VCS=VCSTH+50mV 500 ns Fixed turn-off interval Rext=250KΩ 10 us Peak current control low threshold 0.5 V Peak current control high threshold 2.4 V Thermal shutdown threshold 125 o 20 o ISS TOFF 215 VADJ TSD TSD-HYS Thermal shutdown hysteresis C C VfbTH Feedback voltage threshold 0.29 0.3 0.31 V VOVP-TH Overvoltage input threshold 0.9 1 1.1 V Note: VIN is the input voltage. When VIN • 5V, connect input voltage directly to Vcc. When VIN > 5V, input voltage should be connected to Vcc pin via an appropriately valued resistor. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 3 IS31LT3948 400 100 380 90 Efficiency(%) Iout(mA) TYPICAL PERFORMANCE CHARACTERISTICS 360 340 320 Vout=40V,Rfb=0.825Ω,Rcs=0.12Ω L=100uH,Cout=220uF(Low ESR) 300 80 70 60 Vout=40V,Rfb=0.825Ω,Rcs=0.12Ω L=100uH,Cout=220uF(Low ESR) 50 10 12 14 16 18 20 22 24 26 10 Vin(V) 12 14 400 100 380 90 360 340 320 300 38 Vout(V) 42 46 50 30 770 90 Efficiency(%) Iout(mA) 100 740 710 24 28 34 38 Vout(V) 42 46 50 70 Vout=48V,Rfb=0.392Ω,Rcs=0.1Ω Vout=48V,Rfb=0.392Ω,Rcs=0.1 L=100uH,Cout=220uF(Low L=100uH,Cout=220uF(Low ESR) ESR) Ω 50 32 26 80 60 Vout=48V,Rfb=0.392Ω,Rcs=0.1Ω Vout=48V,Rfb=0.392Ω,Rcs=0.1 L=100uH,Cout=220uF(Low L=100uH,Cout=220uF(Low ESR) ESR) Ω 20 24 Figure 5. Vout & Efficiency 800 650 22 Vin=12V,Rfb=0.825Ω,Rcs=0.12Ω L=100uH,Cout=220uF(Low ESR) Figure 4. Vout & Iout 680 20 70 50 34 Vin(V) 80 60 Vin=12V,Rfb=0.825Ω,Rcs=0.12Ω L=100uH,Cout=220uF(Low ESR) 30 18 Figure 3. Vin & Efficiency Efficiency(%) Iout(mA) Figure 2. Vin & Iout 16 36 Vin(V) Figure 6. Vin & Iout Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 40 20 24 28 32 36 40 Vin(V) Figure 7. Vin & Efficiency 4 800 100 770 90 Efficiency(%) Iout(mA) IS31LT3948 740 710 680 40 42 44 46 70 60 Vint=24V,Rfb=0.392Ω,Rcs=0.1Ω Vout=48V,Rfb=0.392Ω,Rcs=0.1 L=100uH,Cout=220uF(Low L=100uH,Cout=220uF(Low ESR) ESR) Ω 650 80 Vout=48V,Rfb=0.392Ω,Rcs=0.1 Vin=24V,Rfb=0.392Ω,Rcs=0.1Ω L=100uH,Cout=220uF(Low L=100uH,Cout=220uF(Low ESR) ESR) Ω 50 48 50 52 Vout(V) Figure 8. Vout & Iout Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 54 40 42 44 46 48 50 52 54 Vout(V) Figure 9.Vout & Efficiency 5 IS31LT3948 APPLICATION INFORMATION Internal 5V Regulator LED Current Control The IS31LT3948 includes an internal shunt regulator of 5V (typ.) connected to the VCC pin. When the input voltage is higher than 5V, connect VCC to VIN using an appropriately valued, current limiting resistor. The regulator maintains a 5V power supply for the internal NMOS switch gate driver and the internal control circuitry. In applications where the input voltage is 5V, connect the input voltage directly to VCC. When VCC is connected directly to VIN, VIN may not exceed 5V. Bypass the VCC pin using a low ESR capacitor (recommended 10µF ceramic capacitor) to provide a high frequency path to GND. IS31LT3948 regulates the LED current by sensing the voltage across an external sense resistor in series with the LEDs. The voltage is sensed via the FB pin where the internal feedback reference voltage is 0.3V. The LED current can be set according to the following equation easily. I out = 0.3 R fb (2) In order to have an accurate LED current, precision resistors are required (1% is recommended). Setting the Over Voltage Protection The current required by IS31LT3948 is 0.25mA (typical) plus the switching current of the external switch. The switching frequency of the external NMOS affects the amount of current required, as does the NMOS’s gate charge requirement (found on the NMOS data sheet). (1) I IN ≈ 0.25mA + QG × f S Where fS is the switching frequency and QG is the external NMOS gate charge. Under Voltage Lockout The open string protection is achieved through the over voltage protection (OVP). In some cases, an LED string failure will set the feedback voltage to always zero. If this happens, the chip will keep boosting the output voltage higher and higher again. If the output voltage reaches the programmed OVP threshold, the protection mechanism will be triggered and stops the switching action. To make sure that the circuit functions properly, the OVP setting resistor divider must be set with an appropriate value. The recommended VOVP point is about 1.25 times or 5V IS31LT3948 features an under voltage lockout threshold of 2.7V (typical) with a hysteresis of 300mV. The chip is disabled when VCC is lower than 2.4V and enabled when VCC exceeds 2.7V. (choose the larger one) higher than the output voltage for normal operation. Step-up Converter Where, VOVP-TH is 1V, and VOVP is the output voltage OVP level. IS31LT3948’s step-up converter uses a peak current mode topology wherein the CS pin voltage determines the peak current in the inductor of the converter and hence the duty cycle of the GATE switching waveform. The basic loop uses a pulse from an internal oscillator to set an RS flip-flop and turn on the external power NMOS. After the blanking time, the inductor current is sensed during the GATE on period by a sense resistor, RCS, in the source of the external power NMOS. The current through the NMOS and inductor increases until the voltage across the sense resistor reaches the CS threshold, at this time, the NMOS is turned off. Once the NMOS is turned off, the inductor reverses polarity, providing the voltage boost, and the current of inductor will decrease until the FB pin voltage drops below an internal reference voltage and the NMOS is then turned on again. This operation repeats in each cycle. Note: In the case where the FB pin voltage does not exceed the FB reference voltage of 0.3V, such as at the start-up, the NMOS will remain off for the programmed minimum TOFF time, then the NMOS is switched on again. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 VOVP = VOVP−TH × R4 + R5 R5 (3) Dimming Control There are two methods for dimming. 1) External NMOS PWM dimming: LED(-) M2 FB IS31LT3948 SN3948 Rfb GND ADJ PWM Figure 10 When the PWM input is high (VH>2.4V), M2 is on and IS31LT3948 operates normally to regulate the output current. When PWM is low (VL<0.5V), M2 is off and IS31LT3948 is shutdown. Using a fixed frequency PWM signal and changing the duty cycle adjusts the average output current. The recommended 5V PWM frequency is between 200Hz and 1KHz. M2 is recommended to use AP2306. 6 IS31LT3948 2) RC filter PWM dimming: Input Capacitor LED(-) SN3948 IS31LT3948 R6 Rfb FB The input capacitor of the IS31LT3948 will supply the transient input current of the power inductor. Value of 100μF or higher is recommended to prevent excessive input voltage ripple. GND Setting TOFF(min) IS31LT3948 operates in a pulsed frequency modulation mode. The boost control loop is a constant off-time architecture. The off time is programmable and set by an external resistor connected between the TOFF pin and GND. In most application, the recommended TOFF (min) is 1µs. The governing equation for the off C4 R8 PWM For dimming Figure 11 A filtered PWM signal can be used as an adjustable DC voltage for LED dimming control. The filtered PWM signal becomes DC voltage which is summed together with the FB voltage to regulate the output current. Fix the frequency of the PWM signal and change the duty cycle to adjust the LED current. The LED current can be calculated by the following equation: V fbTH − R6 × (VPWM × Duty − V fbTH ) /( R7 + R8) (4) Iout = Rfb The PWM duty cycle is inversely proportional to the LED current. That is, when the PWM signal is 100% duty cycle, the output current is minimum, ideally zero, and when the PWM signal is 0% duty cycle, the output current is maximum. See details value in the Example section. Note: When the VOUT/VIN ratio is less than 2, careful consideration must be given to ensure that VOUT remains greater than VIN at the minimum dimming level. Input Peak Current control IS31LT3948 limits the peak inductor current, and thus the peak input current through the feedback of R3 connected from source of NMOS to ground. The required average input current is based on the boost ratio, Vout/Vin, and the designed value for average LED current. The required average input current can be calculated as: I avg ( IN ) = Vout × I out Vin ×η TOFF (min) = 40 × 10 −12 × REXT (7) 10 8 6 4 2 0 0 25 50 75 100 125 R 150 175 200 225 250 (KΩ) Note: The minimum TOFF (min) is 1µs. Inductor Selection Inductor value directly determines the switching frequency of the converter. To the fixed condition and the larger the inductor’s value, the lower the switching frequency is. The higher frequency will reduce the value of inductor, but will increase the switching loss on NMOS. The switching frequency can be calculated blow. (8) Switching frequency: f = 1 / (TON + TOFF ) The current ripple in the inductor: I Ripple = 2 × (I peak ( IN ) − I avg ( IN ) ) (5) η: assumed power conversion efficiency (the recommended value is 0.9) Generally, setting the peak inductor current to 1.5 times the average input current is sufficient to maintain a good regulation of the output current. I peak ( IN ) = 1.5 × I avg ( IN ) = time is: TOFF(min) (us) R7 VCSTH RCS (6) VCSTH: If 0.5<VADJ<2.4V, VCSTH = VADJ/10. If VADJ>2.4V, VCSTH =0.24V. ADJ floating, VCSTH=0.24V. (9) NMOS on time: TON = I Ripple × L Vin − I avg ( IN ) × ( RL + RDS (ON ) + RCS ) (10) NMOS off time: TOFF = I Ripple × L Vout + VD − Vin − I avg ( IN ) × RL (11) Note: the selection of inductor must ensure the TOFF larger than the TOFF (min) , otherwise, the converter cannot output the required current. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 7 IS31LT3948 Where: Vin: Input voltage (V) Vout: Output voltage (V) IRipple: Current ripple in the inductor (A) L: inductor value (H) Ipeak(IN): Input peak current (A) Iavg(IN): Input average current (A) RL: Inductor DCR (Ω) RDS(ON): NMOS on resistance (Ω) VD: diode forward voltage at the required load current (V) The recommended switching frequency: 20KHz < f < 200KHz (Lower than 20KHz will cause audio noise of the inductor and too high frequency will increase the switching loss on NMOS). With fixed Vin, Vout, Iavg(IN), and Ipeak(IN), the switching frequency is inversely proportional to the inductor value. Select an inductor with a rating current higher than the input average current and the saturation current over the calculated peak current. To calculate the worst case inductor peak current, use the minimum input voltage, maximum output voltage, and maximum total LED current. Also ensure that the inductor has a low DCR (copper wire resistance) to minimize I2R power loss. Output Capacitor The output capacitor holds the output current during NMOS turns ON. The capacitor directly impacts the line regulation and the loading regulation. Low ESR capacitors using at the IS31LT3948 converter output can minimize output ripple voltage and improve output current regulation. For most applications, a 220μF low ESR capacitor will be sufficient. Proportionally lower ripple can be achieved with higher capacitor values. Schottky Rectifier The external diode for the IS31LT3948 must be a Schottky diode with low forward voltage drop and fast switching speed. The diode’s average current rating must exceed the application’s average output current. The diode’s maximum reverse voltage rating must exceed the over voltage protection of the application. For PWM dimming applications, be aware of the reverse leakage of the Schottky diode. Lower leakage current will drain the output capacitor less during PWM low periods, allowing for higher PWM dimming ratios. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 Power NMOS Selection The power NMOS selected should have a VDS rating which exceeds the maximum over voltage protection (OVP) level programmed for the application. The VGS(th) of NMOS should be not higher than 4V. The RDS (ON) of the NMOS will determine DC power loss. The DC power loss can be calculated by: Ploss = I M 1 × RDS (ON ) 2 2 V × I × Duty × RDS (ON ) = out out Vin ×η (12) The recommended NMOS rating current is 5 times (or higher) to the input peak current ( I peak ( IN ) ). Be aware of the power dissipation within the NMOS and deciding if the thermal resistance of the NMOS package causes the junction temperature to exceed maximum ratings. PCB layout consideration As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. • Wide traces should be used for connection of the high current loop to minimize the EMI and unnecessary loss. • The external components ground should be connected to IS31LT3948 ground as short as possible. Especially the Rfb ground to IS31LT3948 ground connection should be as short and wide as possible to have an accurate LED current. • The capacitor C1, C2, C3 should be placed as close as possible to IS31LT3948 for good filtering. Especially the output capacitor C3 connection should be as short and wide as possible. • NMOS drain is a fast switching node. The inductor and Schottky diode should be placed as close as possible to the drain and the connection should be kept as short and wide as possible. Avoid other traces crossing and routing too long in parallel with this node to minimize the noise coupling into these traces. The feedback pin (e.g. CS, FB, OVP) should be as short as possible and routed away from the inductor, the Schottky diode and NMOS. The feedback pin and feedback network should be shielded with a ground plane or trace to minimize noise coupling into this circuit. • The thermal pad on the back of NMOS package must be soldered to the large ground plane for ideal power dissipation. 8 IS31LT3948 L1 VIN(5~100V) D1 LED(+) R1 R4 C1 VCC M1 GATE TOFF R2 C2 ADJ OVP GND FB LED(-) C3 CS R3 R5 M2 Rfb PWM Figure.12 External NMOS PWM dimming L1 VIN(5~100V) D1 LED(+) R1 C3 C1 VCC TOFF LED(-) CS R2 C2 R4 M1 GATE ADJ OVP GND FB R3 R5 R6 R7 Rfb C4 R8 PWM For dimming Figure.13 RC filter PWM dimming Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 9 IS31LT3948 Example Input: Vin = 12~24V Output: Iout = 350mA, Vout≈ 30~40V (9~12LEDs, Vf=3.3V) To calculate the worst case parameter, use the minimum input voltage, the maximum output voltage, and maximum output current. i.e. Vin = 12V, Iout = 350mA and Vout≈ 40V (12LEDs, Vf=3.3V) Iout = V fbTH − R6 × (VPWM × Duty − V fbTH ) /( R7 + R8) Rfb 0.3 − 26.2 × (5 × 0% − 0.3) /(400 + 10) = = 0.35 A Rfb So, Rfb=0.91Ω (With the RC filter PWM dimming, the Rfb will be different from the no dimming application.) 1. R1, C1 and C2 Assume Iin = 2.5mA 4. R3 to set input peak current Assume: I peak ( IN ) = 1.5 × I avg ( IN ) R1 = I peak ( IN ) = 1.5 × I avg ( IN ) = 1.5 × Vin − Vcc ≈ 3kΩ Iin Vout × I out Vin × η Choose C1 as 220µF/35V C2 as 10µF/16V = 1.5 × 2. R2 to set minimal-TOFF The recommended value is 1µs η: assumed power conversion efficiency (the recommended value is 0.9) TOFF (min) = 40 × 10 −12 × REXT = 1µs Rcs = Choose R2 = 24kΩ 40 × 0.35 ≈ 1.95 A 12 × 0.9 VCSTH = 0.123Ω I peak ( IN ) Choose R3=0.123Ω , Ipeak=1.95A 3. Rfb to set output current and C3 Rfb = V fbTH Iout 5. L1 to set frequency ≈ 0.86Ω Choose C3 = 220µF/63V (Low ESR electrolytic capacitor) 4. R6, R7, R8 and C4 R6、R7、R8 can be obtained by: Iout = V fbTH − R6 × (VPWM × Duty − V fbTH ) /( R7 + R8) Rfb Put Duty=100%, VPWM = 5V and Iout=0 into the equation, we have: 0= 0.3 − R6 × (5 ×100% − 0.3) /( R 7 + R8) 0.86 which can be simplified to: 15.66 × R6 = R7 + R8 The low pass filter formed by R8 & C4 must have a corner frequency much lower than the PWM frequency. As the corner frequency of the filter decreases, the response time of the LED current to changes in PWM increases. Choose a corner frequency 50 times lower than fPWM. R8 × C 4 ≥ 50 2πf PWM Assume fPWM is 200Hz (or higher), and choose C4 = 0.1µF, we have R8 ≥ 400kΩ . Choose C4 = 0.1µF, R8 = 400kΩ . Choose a nominal value for R7, then, we calculate R6. Choose R7 = 10kΩ , then R6 = 26.2kΩ Put Duty=0, VPWM = 5V and Iout=350mA into the equation, then we have: Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 Input average current: I avg ( IN ) = Vout × I out = 1.3 A Vin ×η The current ripple in the inductor: I Ripple = 2 × (I peak ( IN ) − I avg ( IN ) ) = 1.3 A According to Toff > TOFF (min) : TOFF = I Ripple × L Vout + VD − Vin − I avg ( IN ) × RL > 1µs This gives L>22µH. Assume L=22µH and RL + RDS ( ON ) + RCS = 0.4Ω . TON = I Ripple × L Vin − I avg ( IN ) × ( RL + RDS (ON ) + RCS ) ≈ 2.5µs Then the assumed switching frequency: f ' = 1 / (TON + TOFF ) ≈ 285 KHz The recommended switching frequency: 20KHz < f < 200KHz, according to the switching frequency is inversely proportional to the inductor value, choose L=100 µH. Therefore: f = f '× 22 ≈ 63KHz 100 The saturation current of the inductor must exceed the input peak current ( I peak ( IN ) ). 10 IS31LT3948 6. R4, R5 to set OVP Set VOVP = Vout+5V = 45V VOVP = VOVP−TH × R4 + R5 R5 Choose R5=10kΩ , then R4 = 470kΩ . 7. NMOS M1 and diode D1 I1(NMOS) >Ipeak（IN） V1(NMOS) >VOVP Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 NMOS with RDS(on) can improve the converter efficiency. The recommended NMOS rating current is 5 times (or higher) to the input peak current ( I peak ( IN ) ). Choose 13N10L as M1 The average and peak current of diode must exceed the output average current and input peak current. The diode’s maximum reverse voltage rating must exceed the over voltage protection of the application. Choose SS310 as D1 11 IS31LT3948 CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 12 IS31LT3948 TAPE AND REEL INFORMATION Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 13 IS31LT3948 PACKAGE INFORMATION Package Outline Drawing #D08 0.25 0.17 5.10 4.70 1.27 0.40 6.20 4.00 5.80 3.80 8 0 1.27BSC 0.51 0.33 0.25 0.10 1.55 1.35 Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 8/31/2011 1.75 1.35 14