LS843, LS844, LS845

LS843 LS844 LS845
ULTRA LOW NOISE LOW DRIFT
MONOLITHIC DUAL N-CHANNEL
JFET AMPLIFIER
FEATURES
ULTRA LOW NOISE
en=3nV/Hz TYP.
LOW LEAKAGE
IG=15pA TYPs.
LOW DRIFT
I VGS1-2/TI=5µV/ºC max.
ULTRA LOW OFFSET VOLTAGE
ABSOLUTE MAXIMUM
IVGS1-2I=1mV max.
RATINGS1
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
-55º to +150°C
Operating Junction Temperature
-55º to +150°C
Maximum Voltage and Current for Each Transistor1
-VGSS
Gate Voltage to Drain or Source 60V
IG(f)
Gate Forward Current
50mA
Maximum Power Dissipation2
Device Dissipation2 @ Free Air - Total
400mW TA=+25°C
ELECTRICAL CHARACTERISTICS @ 25ºC (unless otherwise noted)
SYMBOL
CHARACTERISTIC
I VGS1-2 / TI max.
Drift vs. Temperature
LS843 LS844 LS845 UNITS
5
10
25
µV/ºC
CONDITIONS
VDG= 10V
ID= 500µA
TA= -55ºC to +125ºC
IVGS1-2I max.
Offset Voltage
1
5
15
mV
SYMBOL
CHARACTERISTIC3
BVGSS
BVGGO
VGS= 10V
ID= 500µA
MIN.
TYP.
MAX.
UNITS
Breakdown Voltage
-60
--
--
V
VDS= 0
Gate-to-Gate Breakdown
±60
--
--
V
IGGO= ±1µA ID= 0
IS= 0
f = 1kHz
CONDITIONS
ID= -1nA
TRANSCONDUCTANCE
Gfss
Full Conduction
1500
--
--
µS
VDS= 15V
VGS= 0
Gfs
Typical Conduction
1000
1500
--
µS
VDS= 15V
ID= 500µA
│Gfs1-2/Gfs1│
Mismatch
--
0.6
3
%
1.5
5
15
mA
VDS= 15V
VGS= 0
--
1
5
%
DRAIN CURRENT
IDSS
Full Conduction
│IDSS1-2/IDSS│
Mismatch at Full Conduction
GATE VOLTAGE
VGS(off)
Pinchoff Voltage
-1
--
-3.5
V
VDS= 15V
ID= 1nA
VGS
Operating Range
-0.5
--
-3.5
V
VDS= 15V
ID= 500µA
GATE CURRENT
-IG
Operating
--
15
50
pA
VDG= 15V
ID= 500µA
-IG
High Temperature
--
--
50
nA
VDG= 15V
ID= 500µA TA=+125ºC
-IG
Reduced VDG
--
5
30
pA
VDG= 3V
ID= 500µA
-IGSS
At Full Conduction
--
--
100
pA
VGS= 15V
VGS= 0
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201144 04/07/2014 Rev#A12 ECN# LS843 LS844 LS845
SYMBOL
CHARACTERISTIC
MIN.
TYP.
MAX.
UNITS
CONDITIONS
--
40
µS
VDS= 15V
VGS= 0
VDS= 15V
ID= 200µA
OUTPUT CONDUCTANCE
GOSS
Full Conduction
--
GOS
Operating
--
2.0
2.7
µS
│GOS 1-2│
Differential
--
0.02
0.2
µS
90
100
--
dB
VDS= 10 to 20V
ID= 500µA
--
85
--
dB
VDS= 5 to 10V
ID= 500µA
VDS= 15V
VGS= 0
f= 100Hz
NBW= 6Hz
VDS= 15V
ID= 500µA f= 1kHz
COMMON MODE REJECTION
CMRR
CMRR
-20 log │∆V GS1-2/ ∆V DS│
NOISE
NF
Figure
--
--
0.5
dB
en
Voltage
--
--
7
nV/Hz
RG= 10MΩ
NBW= 1Hz
en
Voltage
--
--
11
nV/Hz
VDS= 15V
ID= 500µA f= 10Hz
NBW= 1Hz
CAPACITANCE
CISS
Input
--
--
8
pF
CRSS
Reverse Transfer
--
--
3
pF
CDD
Drain-to-Drain
--
0.5
--
pF
VDS= 15V
ID= 500µA f= 1mHz
VDD= 15V
ID= 500µA f= 1mHz
NOTES:
1.
2.
3.
These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
Derate 4mW/ºC above 25ºC
All MIN/TYP/MAX limits are absolute numbers. Negative signs indicate electrical polarity only.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201144 04/07/2014 Rev#A12 ECN# LS843 LS844 LS845