MX65U28F64/MX65U64F32 1.8V MXSMIO (SERIAL MULTI I/O) FLASH MEMORY MCP WITH MULTIPLEXED, BURST MODE, PSEUDO SRAM MX65U28F64 MX65U64F32 DATASHEET P/N:PM1730 REV. 1.0, JUL. 22, 2013 1 MX65U28F64/MX65U64F32 128M-BIT/64M-BIT [x 1/x 2/x 4] 1.8V CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY MCP SERIAL FLASH PSEUDO SRAM FEATURES • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 128Mb/64Mb MXSMIO Serial Flash • Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually • Single Power Supply Operation - 1.65 to 2.0 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V • Low Vcc write inhibit is from 1.0V to 1.4V • High Performance - Fast read for SPI mode - 1 I/O: 104MHz with 8 dummy cycles - 2 I/O: 84MHz with 4 dummy cycles, equivalent to 168MHz - 4 I/O: 104MHz with 2+4 dummy cycles, equivalent to 416MHz - Fast read for QPI mode - 4 I/O: 84MHz with 2+2 dummy cycles, equivalent to 336MHz - 4 I/O: 104MHz with 2+4 dummy cycles, equivalent to 416MHz - Fast program time: 1.4ms (E-ver. typ.), 1.2ms (Fver. typ.) and 5ms (E-ver. max.)/page, 3ms (F-ver. max.)/page (256-byte per page) - Byte program time: 8us (E-ver. typ.), 12us (F-ver. typ.) - 8/16/32/64 byte Wrap-Around Burst Read Mode - Fast erase time: 60ms (typ.)/sector (4K-byte per sector); 250ms(typ.)/block (32K-byte per block), 500ms(typ.)/block (64K-byte per block); 50s/chip (typ.) (64Mb)/72s/chip (typ.) (128Mb) • Low Power Consumption - Low active read current: 20mA(typ.) at 104MHz, 15mA(typ.) at 84MHz - Low active erase/programming current: 20mA (typ.) - Standby current: 30uA (typ.) • Deep Power Down: 5uA(typ.) • Typical 100,000 erase/program cycles • 10 years data retention • Operating Temperature Range - Wireless Grade: -25°C~85°C • Package - MCP BGA: 0.5mm ball pitch - 6.2x7.7mm, 56 ball FEATURES • Single device supports asynchronous and burst operation • Mixed Mode supports asynchronous write and synchronous read operation • Dual voltage rails for optional performance - VDD: 1.7V~1.95V - VDDQ: 1.7V~1.95V • Multiplexed address and data bus - ADQ0~ADQ15 • Asynchronous mode read access : 70ns • Burst mode for Read and Write operation - 4, 8, 16 Words (or 8,16,32 Bytes) or Continuous • Low Power Consumption - Asynchronous Operation < 25mA - Burst operation < 45mA (@133MHz) - Standby < 250uA (max.) • Low Power Feature - Reduced Array Refresh - Temperature Controlled Refresh • Operation Frequency up to 133MHz • Operating Temperature Range - Wireless Grade: -25°C~85°C P/N:PM1730 REV. 1.0, JUL. 22, 2013 2 MX65U28F64/MX65U64F32 Product Selection Guide Device MX65U64F32EXJW Flash 64Mb MX65U28F64EXJW 128Mb Density pSRAM 32Mb Flash 104MHz 64Mb 104MHz P/N:PM1730 Speed Package Type pSRAM 133MHz 6.2x7.7 56-TFBGA 133MHz 6.2x7.7 56-TFBGA REV. 1.0, JUL. 22, 2013 3 MX65U28F64/MX65U64F32 BLOCK DIAGRAM F-CS# CS# CLK CLK R-OE# OE# R-WE# WE# AVD # AVD # R-CE # CLK CE # R-CRE R-UB# CRE UB# R-LB # LB# Amax-A4 Serial Flash SI/SIO0; SO/SIO1; SIO2; SIO3 pSRAM WAIT AQ0/SI/SIO0; AQ1/SO/SIO1; AQ2/SIO2; AQ3/SIO3 R-WAIT A3-A0 Amax-A4 P/N:PM1730 REV. 1.0, JUL. 22, 2013 4 MX65U28F64/MX65U64F32 PIN CONFIGURATIONS pSRAM Based Pinout, 56-Ball, TFBGA (Top View, Balls Facing Down) Legend A1 A14 NC NC C3 NC C4 C7 C8 C11 C12 NC R- LB# R- UB# NC NC D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 R-WAIT A21 GND CLK VCC WE# NC A19 A17 NC E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 VCC A16 A20 AVD# NC NC NC A18 F-CS# GND F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 GND A/Q7 A/Q6 A/Q13 A/Q12 R-A/Q3 F-SIO3 R-A/Q2 F-SIO2 A/Q9 A/Q8 OE# G11 G12 G3 G4 G5 G6 G7 G8 G9 G10 A/Q15 A/Q14 GND A/Q5 A/Q4 A/Q11 A/Q10 VCC H8 H3 H4 H7 NC NC R-CE# R-CRE Flash/RAM Shared Only Flash Only R-A/Q1 R-A/Q F-SO/SIO1 F-SI/SIO0 H11 H12 NC NC No Connect (Distance between outer NC balls is 2x pitch) RAM Only K1 K14 NC NC Notes 1. A0~A3 Addresses are shared between Flash and RAM. 2. A21 only for 64Mb pSRAM. P/N:PM1730 REV. 1.0, JUL. 22, 2013 5 MX65U28F64/MX65U64F32 PIN DESCRIPTION SYMBOL Amax-A16 SI/O ; A/Q15~A/Q0 OE# WE# VCC GND NC RDY WAIT CLK AVD# R-CE# F-CS# R-CRE R-UB# R-LB# DESCRIPTION Address Inputs Multiplexed Data Inputs/Outputs Output Enable Input Write Enable Input Device Power Supply (1.70V~1.95V) Device Ground No Connection Ready output, the status of the Burst Read Wait Clock Address Valid Data input. Chip-enable input for pSRAM. Chip-select input for Flash. Control Register Enable (pSRAM). Upper Byte Control (pSRAM). Lower Byte Control (pSRAM). P/N:PM1730 Flash V V V V V V RAM V V V V V V V V V V V V V V V V REV. 1.0, JUL. 22, 2013 6 MX65U28F64/MX65U64F32 PART NAME DESCRIPTION MX 65U 28 F 64 E XJ W TEMPERATURE RANGE: W: Wireless (-25° C to 85° C) PACKAGE: XJ: TFBGA with 56-ball (6.2x7.7mm) pSRAM pSRAM DENSITY : 64: 64Mb 32: 32Mb REVISION: F Flash DENSITY : 28: 128Mb 64: 64Mb DEVICE: 65U : Serial Flash Multi-Chip Product (MCP) 1.8Volt Serial Flash Memory and AD-Mux Burst Mode RAM P/N:PM1730 REV. 1.0, JUL. 22, 2013 7 MX65U28F64/MX65U64F32 PACKAGE INFORMATION P/N:PM1730 REV. 1.0, JUL. 22, 2013 8 MX65U28F64/MX65U64F32 REVISION HISTORY Revision No. Description 0.01 1. Modified Fast program time & Byte program time Page P2 Date MAY/10/2012 1.0 P1,2 P2 P3 JUL/22/2013 1. Removed "Advanced Information" 2. Modified chip erase time: 50s(typ.) (64Mb)/72s(typ.) (128Mb) 3. Removed MX65U64E32EXJW P/N:PM1730 REV. 1.0, JUL. 22, 2013 9 MX65U28F64/MX65U64F32 Except for customized products which has been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright© Macronix International Co., Ltd. 2012~2013. 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