Preliminary Datasheet M62354P/FP/GP R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 8-bit 6ch D/A Converter with Buffer Amplifiers Description The M62354 is an integrated circuit semiconductor of CMOS structured with 6 channels of built-in D/A converters with output buffer operational amplifiers. The 3-wire serial interface method is used for the transfer format of digital data to allow connection with microcomputer with minimum wiring. It is able to cascading serial use with DO terminal. The output buffer operational amplifier operates in the whole voltage range from power supply to ground for both input/output. Features 12-bit serial data input (3-wire serial data transfer method) Highly stable output buffer operational amplifier allow operation in the all voltage range from power supply to ground. Application Adjustment/control of industrial or home-use electronic equipment, such as VTR camera, VTR set, TV, and CRT display. Block Diagram VCC VDD AO6 AO5 AO4 AO3 14 13 12 11 10 9 VSS 8 + − + − + − + − Buffer OP Amp D/A D/A D/A 8-bit R-2R segment D/A converter Ch6 5 L 4 L 3 8-bit latch L (6) (6) ...... .... Address decoder 8-bit latch L 2 D/A + − D11 10 9 8 D7 6 5 4 3 2 1 0 12-bit shift register 8-bit R-2R segment D/A converter + − Ch1 Buffer OP Amp 1 2 3 4 5 6 7 DO LD CLK DI AO1 AO2 GND R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Page 1 of 9 M62354P/FP/GP Preliminary Pin Arrangement M62354P/FP M62354GP VCC DO 1 16 13 VDD LD 2 15 VDD 12 AO6 CLK 3 14 AO6 4 11 AO5 DI 4 13 AO5 AO1 5 10 AO4 AO1 5 12 AO4 AO2 6 9 AO3 AO2 6 11 AO3 VSS NC 7 10 NC GND 8 9 VSS DO 1 14 LD 2 CLK 3 DI GND 7 8 (Top view) Outline: 14P4 [P] (not recommend for new design) PRSP0014DD-A (14P2N-A) [FP] VCC NC: No connection (Top view) Outline: PLSP0016JA-A (16P2E-A) [GP] Pin Description Pin No. 4 (4) 1 (1) 3 (3) 2 (2) 5 (5) 6 (6) 9 (11) 10 (12) 11 (13) 12 (14) 14 (16) 7 (8) 13 (15) 8 (9) Note: Pin Name DI DO CLK LD AO1 AO2 AO3 AO4 AO5 AO6 VCC GND VDD VSS Function Serial data input terminal Serial data output terminal Serial clock input terminal LD terminal input high level then latch circuit data load 8-bit D/A converter output terminal Power supply terminal Digital and analog common GND D/A converter upper reference voltage input terminal D/A converter lower reference voltage input terminal ( ) : M62354GP R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Page 2 of 9 M62354P/FP/GP Preliminary Block Diagram for Explanation of Terminals VCC GND 14 7 DI 4 CLK 3 12-bit shift register D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 Address decoder (8) (6) D0 1 ..... 8-bit latch D7 8-bit R-2R segment D/A converter ......................................... 5 ..... 8-bit latch LD D7 8-bit R-2R segment D/A converter 12 AO6 AO1 VDD (VrefU) 2 + − + − 13 ............................... DO 1 2 3 4 5 6 D0 ............................... 6 1 8 VSS (VrefL) Absolute Maximum Ratings Item Supply voltage D/A converter upper reference voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Symbol VCC VDD VIN VO Pd Topr Tstg Ratings –0.3 to +7.0 –0.3 to +7.0 –0.3 to VCC + 0.3 –0.3 to VCC + 0.3 440 (P) / 250 (FP) / 150 (GP) –20 to +85 –40 to +125 Unit V V V V mW C C Page 3 of 9 M62354P/FP/GP Preliminary Electrical Characteristics <Digital Part> (VCC, VrefU = 5 V 10%, VCC VrefU, GND, VrefL = 0 V, Ta = –20 to +85C, unless otherwise noted.) Min Limits Typ Max Unit Supply voltage Circuit current VCC ICC 4.5 — 5.0 0.7 5.5 2.5 V mA Input leak current Input low voltage Input high voltage Output low voltage Output high voltage IILK VIL VIH VOL VOH –10 — 0.8 VCC — VCC – 0.4 — — — — — 10 0.2 VCC — 0.4 — A V V V V Item Symbol Conditions CLK = 1 MHz operation VCC = 5 V, IAO = 0 A VIN = 0 to VCC IOL = 2.5 mA IOH = –400 A <Analog Part> (VCC, VrefU = 5 V 10%, VCC VrefU, Ta = –20 to +85C, unless otherwise noted.) Min Limits Typ Max Unit Current dissipation IDD — 0.7 1.3 mA D/A converter upper reference voltage range VDD 3.5 — VCC V D/A converter lower reference voltage range VSS GND — VCC – 3.5 V Buffer amplifier output voltage range VAO IAO — — — VCC – 0.1 VCC – 0.2 1 V Buffer amplifier output drive range 0.1 0.2 –1 mA Differential nonlinearity error Nonlinearity error Zero code error Full scale error Output capacitive load SDL –1.0 — 1.0 LSB SL SZERO SFULL CO –1.5 –2 –2 — — — — — — 5 1.5 2 2 0.1 — LSB LSB LSB F Item Buffer amplifier output impedance Symbol RO R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Conditions VrefU = 5 V, VrefL = 0 V Data condition: at maximum current The output does not necessarily be the value within the reference voltage setting range. The output value is determined by the buffer amplifier output voltage range (VAO). IAO = 100 A IAO = 500 A Upper side saturation voltage = 0.3 V Lower side saturation voltage = 0.2 V VrefU = 4.79 V VrefL = 0.95 V VCC = 5.5 V (15 mV/LSB) Without load (IAO = 0 A) Page 4 of 9 M62354P/FP/GP Preliminary AC Characteristics (VCC, VrefU = 5 V 10%, VCC VrefU, GND, VrefL = 0 V, Ta = –20 to +85C, unless otherwise noted.) Item Clock "L" pulse width Clock "H" pulse width Clock rise time Clock fall time Data setup time Data hold time LD setup time LD hold time LD "H" pulse width Data output delay time D/A output setting time Symbol tCKL tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tDO tLDD Min Limits Typ Max Unit 200 200 — — 30 60 200 100 100 70 — — — — — — — — — — — — — — 200 200 — — — — — 350 300 ns ns ns ns ns ns ns ns ns ns s Conditions CL 100 pF CL 100 pF, VAO: 0.5 4.5 V The time until the output becomes the final value of 1/2 LSB Timing Chart tCR tCKH tCF CLK tCKL tLDC DI tLDH tDCH tCHD tCHL LD tLDD D/A output tDO DO output R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Page 5 of 9 M62354P/FP/GP Preliminary Digital Data Format First MSB Last LSB D0 D1 D2 D3 D4 D5 D6 D7 DAC data D8 D9 D10 D11 DAC select data DAC Data D0 0 1 0 1 : 0 1 D1 0 0 1 1 : 1 1 Note: D2 0 0 0 0 : 1 1 D3 0 0 0 0 : 1 1 D4 0 0 0 0 : 1 1 D5 0 0 0 0 : 1 1 D6 0 0 0 0 : 1 1 D7 0 0 0 0 : 1 1 D/A Output (VrefU – VrefL) / 256 1 + VrefL (VrefU – VrefL) / 256 2 + VrefL (VrefU – VrefL) / 256 3 + VrefL (VrefU – VrefL) / 256 4 + VrefL : (VrefU – VrefL) / 256 255 + VrefL VrefU VrefU = VDD, VrefL = VSS DAC Select Data D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DAC Selection Don't care AO1 selection AO2 selection AO3 selection AO4 selection AO5 selection AO6 selection Don't care Don't care Don't care Don't care Don't care Don't care Don't care Don't care Don't care Timing Chart (Model) MSB DI D11 CLK LSB D10 D9 D8 ............. D2 D1 D0 .................. LD D/A output R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Page 6 of 9 M62354P/FP/GP Preliminary Typical Characteristics Upper Side Saturation Voltage vs. Output Source Current Lower Side Saturation Voltage vs. Output Sink Current 150 Lower Side Saturation Voltage VAOSATL (mV) Upper Side Saturation Voltage VCC-VAOSATU (mV) 150 100 50 100 50 0 0 0 200 400 600 800 1000 Output Source Current IAOD (µA) R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 0 200 400 600 800 1000 Output Sink Current IAOS (µA) Page 7 of 9 M62354P/FP/GP Preliminary Package Dimensions 14P4 Plastic 14pin 300mil DIP Weight(g) 1.0 Lead Material Alloy 42/Cu Alloy 8 1 7 E 14 c JEDEC Code — e1 EIAJ Package Code DIP14-P-300-2.54 D A2 Symbol e JEITA Package Code P-SOP14-5.3x10.1-1.27 RENESAS Code PRSP0014DD-A b1 Previous Code 14P2N-A b MASS[Typ.] 0.2g 8 *1 E 14 HE A A1 A2 b b1 c D E e e1 L A1 LA SEATING PLANE Dimension in Millimeters Min Nom Max 4.5 — — 0.51 — — 3.3 — — 0.4 0.5 0.6 1.4 1.5 1.8 0.22 0.27 0.34 19.0 19.2 18.8 6.15 6.3 6.45 2.54 — — 7.62 — — 3.0 — 15° 0° — F NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1 7 Index mark c *2 D A1 e y *3 L A A2 bp Detail F R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Reference Symbol D E A2 A1 A bp c HE e y L Dimension in Millimeters Min Nom Max 10.0 10.1 10.2 5.2 5.3 5.4 1.8 0.1 0.2 0 2.1 0.35 0.4 0.5 0.18 0.2 0.25 0° 8° 7.5 7.8 8.1 1.12 1.27 1.42 0.1 0.4 0.6 0.8 Page 8 of 9 M62354P/FP/GP Preliminary JEITA Package Code P-LSSOP16-4.4x5-0.65 RENESAS Code PLSP0016JA-A MASS[Typ.] 0.06g 9 E 16 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. *1 HE Previous Code 16P2E-A F 1 8 Index mark c A2 A1 Reference Dimension in Millimeters Symbol *2 A L D *3 e y bp Detail F D E A2 A A1 bp c HE e y L R03DS0043EJ0400 Rev.4.00 Jun 03, 2011 Min 4.9 4.3 Nom Max 5.0 5.1 4.4 4.5 1.15 1.45 0 0.1 0.2 0.17 0.22 0.32 0.13 0.15 0.2 0° 10° 6.2 6.4 6.6 0.53 0.65 0.77 0.10 0.3 0.5 0.7 Page 9 of 9 Notice 1. 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