Datasheet

Data Sheet No. PD60245
IR21363(J&S)PbF
3-PHASE BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
•
•
•
Packages
Fully operational to +600V
Tolerant to negative transient voltage - dV/dt immune
Gate drive supply range from 12 to 20V
Undervoltage lockout for all channels
Over-current shutdown turns off all six drivers
Independent 3 half-bridge drivers
Matched propagation delay for all channels
Cross-conduction prevention logic
Lowside outputs out of phase with inputs. High side
outputs out of phase
3.3V logic compatible
Lower di/dt gate driver for better noise immunity
Externally programmable delay for automatic fault clear
28-Lead SOIC
28-Lead PDIP
44-Lead PLCC w/o 12 leads
Description
The IR21363(J&S) are high votage, high speed power MOSFET and IGBT drivers with three independent high and
low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized
monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 3.3V logic. A
current trip function which terminates all six outputs can be derived from an external current sense resistor. An
enable function is available to terminate all six outputs simultaneously. An open-drain FAULT signal is provided
to indicate that an overcurrent or undervoltage shutdown has occurred. Overcurrent fault conditions are cleared
automatically after a delay programmed externally via an RC network connected to the RCIN input. The output
drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation
delays are matched to simplify use in high frequency applications. The floating channel can be used to drive Nchannel power MOSFETs or IGBTs in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
VCC
HIN1,2,3
HIN1,2,3
LIN1,2,3
VCC
HIN1,2,3 / HIN1,2,3
VB1,2,3
LIN1,2,3
HO1,2,3
FAULT
EN
FAULT
EN
VS1,2,3
TO
LOAD
RCIN
ITRIP
VSS
LO1,2,3
COM
IR2136(2)(3)(5)(6)(7)(8)
GND
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR21363(J&S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
VS
VBS
VHO
VCC
VSS
VLO1,2,3
VIN
Definition
High side offset voltage
High side floating supply voltage
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
Low side output voltage
Input voltage LIN,HIN,ITRIP, EN, RCIN
VFLT
dV/dt
PD
FAULT output voltage
Allowable offset voltage slew rate
Package power dissipation @ TA ≤ +25°C
RthJA
(44
Thermal resistance, junction to ambient
TJ
TS
TL
(28 lead PDIP)
(28 lead SOIC)
lead
PLCC)
(28 lead PDIP)
(28 lead SOIC)
(44 lead PLCC)
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Min.
Max.
VB1,2,3 - 25
-0.3
VS1,2,3 - 0.3
-0.3
VCC - 25
-0.3
VSS - 0.3
VB1,2,3 + 0.3
625
VB1,2,3 + 0.3
25
VCC + 0.3
VCC + 0.3
lower of
(VSS + 15) or
VCC + 0.3)
VCC + 0.3
50
1.5
1.6
2.0
83
78
63
150
150
300
VSS - 0.3
—
—
—
—
—
—
—
—
-55
—
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute referenced to COM. The VS offset rating is tested with all supplies
biased at 15V differential.
Symbol
VB1,2,3
VS1,2,3
VHO1,2,3
VLO1,2,3
VCC
VSS
VFLT
VRCIN
VITRIP
VIN
TA
Definition
High side floating supply voltage
High side floating supply offset voltage
High side output voltage
Low side output voltage
Low side and logic fixed supply voltage
Logic ground
FAULT output voltage
RCIN input voltage
ITRIP input voltage
Logic input voltage , HIN
Ambient temperature
Min.
Max.
VS1,2,3 +12
Note 1
VS1,2,3
0
12
-5
VSS
VSS
VSS
VSS
VS1,2,3 +20
600
VB1,2,3
VCC
20
5
VCC
VCC
VSS +5
VSS +5
-40
125
Units
V
o
C
Note 1: Logic operational for VS of COM -5V to COM +600V. Logic state held for VS of COM -5V to COM -VBS.
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
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2
IR21363(J&S)PbF
Static Electrical Characteristics
VBIAS (VCC, VBS1,2,3) = 15V unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and
are applicable to all six channels (HS1,2,3 and LS1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3
and are applicable to the respective output leads: HO1,2,3 and LO1,2,3.
Symbol
VIH
VIL
VEN,TH+
VEN,THVIT,TH+
VIT,HYS
VRCIN,TH+
VRCIN,HYS
VOH
VOL
VCCUV+
VBSUV+
VCCUVVBSUVVCCUVH
VBSUVH
ILK
IQBS
IQCC
VIN, CLAMP
ILIN+
Definition
Logic “0” input voltage LIN1,2,3, HIN1,2,3
Logic “1” input voltage LIN1,2,3, HIN1,2,3
EN positive going threshold
EN negative going threshold
ITRIP positive going threshold
ITRIP input hysteresis
RCIN positive going threshold
RCIN input hysteresis
High level output voltage, VBIAS - VO
Low level output voltage, VO
VCC and VBS supply undervoltage
positive going threshold
VCC and VBS supply undervoltage
negative going threshold
VCC and VBS supply undervoltage
lockout hysteresis
Offset supply leakage current
Quiescent VBS supply current
Quiescent VCC supply current
Input clamp voltage (HIN, LIN, ITRIP and EN)
Input bias current (LOUT = HI)
Min. Typ. Max. Units Test Conditions
3.0
—
—
0.8
0.37
—
—
—
—
—
10.6
—
—
—
—
0.46
0.07
8
3
0.9
0.4
11.1
—
0.8
3
—
0.55
—
—
—
1.4
0.6
11.6
10.4
10.9
11.4
—
0.2
—
—
—
—
4.9
—
—
70
3.3
5.2
200
50
120
—
5.5
300
ILIN-
Input bias current (LOUT = LO)
—
100
220
IHIN+
Input bias current (HOUT = HI)
—
200
300
IHIN-
Input bias current (HOUT = LO)
—
100
220
IITRIP+
“high” ITRIP input bias current
—
30
100
IITRIP-
V
IO = 20 mA
IO = 20 mA
µA
VB1,2,3=VS1,2,3=600V
mA
V
VIN = 0V or 5V
IIN =100µA
VLIN = 5V
VLIN = 0V
VHIN = 5V
µA
VHIN = 0V
VITRIP = 5V
“low” ITRIP input bias current
—
0
1
VITRIP = 0V
IEN+
“high” ENABLE input bias current
—
30
100
VENABLE= 5V
IEN-
“low” ENABLE input bias current
—
0
1
VENABLE = 0V
IRCIN
RCIN input bias current
—
0
1
VRCIN = 0V or 15V
IO+
Output high short circuit pulsed current
120
200
—
IO-
Output low short circuit pulsed current
250
350
—
RON,RCIN
RCIN low on resistance
—
50
100
RON,FLT
FAULT low on resistance
—
50
100
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mA
VO=0V, PW ≤ 10 µs
VO=15V, PW ≤10 µs
Ω
3
IR21363(J&S)PbF
Dynamic Electrical Characteristics
VCC = VBS = VBIAS = 15V, VS1,2,3 = VSS = COM, TA = 25oC and CL = 1000 pF unless otherwise specified.
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
370
525
680
toff
Turn-off propagation delay
310
500
690
tr
Turn-on rise time
—
125
190
tf
Turn-off fall time
—
50
75
ENABLE low to output
300
450
600
tEN
VIN = 0 & 5V
VIN, VEN = 0V or 5V
shutdown propagation delay
tITRIP
tbl
ITRIP to output shutdown propagation delay
500
750
1000
ITRIP blanking time
100
150
—
ITRIP to FAULT propagation delay
400
600
800
VIN = 0V or 5V
Input filter time (HIN, LIN)
—
310
—
VIN = 0 & 5V
100
200
—
FAULT clear time RCIN: R=2meg, C=1nF
1.3
1.65
2
Deadtime
220
290
360
nS
VITRIP = 5V
VIN = 0V or 5V
VITRIP = 5V
t FLT
VITRIP = 5V
tFILIN
(EN)
tFLTCLR
mS
VIN = 0V or 5V
VITRIP = 0V
DT
MT
MDT
PM
Matching delay ON and OFF
—
40
75
Matching delay, max (ton,toff) - min (ton,toff),
(ton,toff are applicable to all 3 channels)
—
25
70
Output pulse width matching, PWin -PWout (fig.2)
—
40
75
VIN = 0 & 5V
nS
External dead
time
>400nsec
NOTE: For high side PWM, HIN pulse width must be ≥ 1µsec
VCC
<UVCC
VBS
X
ITRIP
X
ENABLE
X
FAULT
0 (note 1)
LO1,2,3
0
HO1,2,3
0
15V
<UVBS
0V
5V
high imp
LIN1,2,3
0
15V
15V
0V
5V
high imp
LIN1,2,3
15V
15V
5V
0 (note 2)
0
0
15V
15V
>VITRIP
0V
0V
high imp
0
0
HIN1,2,3
Note: A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously.
Note 1: UVCC is not latched, when VCC>UVCC, FAULT returns to high impedance.
Note 2: When ITRIP <VITRIP, FAULT returns to high-impedance after RCIN pin becomes greater than 8V (@ VCC = 15V)
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4
IR21363(J&S)PbF
Functional Block Diagram
INPUT
NOISE
FILTER
HIN1
LIN1
INPUT
NOISE
FILTER
HIN2
INPUT
NOISE
FILTER
LIN2
INPUT
NOISE
FILTER
HIN3
INPUT
NOISE
FILTER
IR2136/21363/21365
DEADTIME &
SHOOT-THROUGH
PREVENTION
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
VB1
SET
RESET
LATCH
DRIVER
UV
DETECT
HO1
VS1
VB2
DEADTIME &
SHOOT-THROUGH
PREVENTION
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
SET
RESET
LATCH
DRIVER
UV
DETECT
HO2
VS2
VB3
INPUT
NOISE
FILTER
LIN3
DEADTIME &
SHOOT-THROUGH
PREVENTION
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
SET
RESET
LATCH
DRIVER
UV
DETECT
VS3
VSS
VCC
INPUT
NOISE
FILTER
EN
ITRIP
HO3
+
-
0.5V
UV
DETECT
VSS/COM
LEVEL
SHIFTER
DELAY
DRIVER
LO1
VSS/COM
LEVEL
SHIFTER
DELAY
DRIVER
LO2
VSS/COM
LEVEL
SHIFTER
DELAY
DRIVER
LO3
INPUT
NOISE
FILTER
S
Q
SET
R DOMINANT
LATCH
RCIN
FAULT
COM
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5
IR21363(J&S)PbF
Lead Definitions
Symbol Description
VCC
Low side and logic fixed supply
VSS
Logic Ground
HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase
LIN1,2,3
FAULT
Logic inputs for low side gate driver outputs (LO1,2,3), out of phase
Indicates over-current (ITRIP) or low-side undervoltage lockout has occured. Negative logic,
open-drain output
EN
COM
Logic input to enable I/O functionality. Positive logic, i.e. I/O logic functions when ENABLE is
high. No effect on FAULT and not latched
Analog input for overcurrent shutdown. When active, ITRIP shuts down outputs and activates
FAULT and RCIN low. When ITRIP becomes inactive, FAULT stays active low for an externally
set time TFLTCLR, then automatically becomes inactive (open-drain high impedance).
External RC network input used to define FAULT CLEAR delay, TFLTCLR, approximately equal
to R*C. When RCIN>8V, the FAULT pin goes back into open-drain high-impedance
Low side gate driver return
VB1,2,3
HO1,2,3
High side floating supply
High side gate driver outputs
VS1,2,3
LO1,2,3
High voltage floating supply returns
Low side gate driver output
ITRIP
RCIN
Note: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
VS1 26
HIN3
25
5
LIN1
VB2 24
6
LIN2
HO2 23
7
LIN3
VS2 22
8
FAULT
9
ITRIP
VB3 20
10
EN
HO3 19
11
RCIN
VS3 18
12
VSS
13
COM
LO1 16
14
LO3
LO2 15
VS1
HIN2
4
HO1
3
VB1
HO1 27
VCC
VB1 28
HIN1
HIN1
VCC
HIN2
1
2
HIN3
Lead Assignments
6
5
4
3
43
42
41
7
LIN1
8
LIN2
9
37
VB2
LIN3
10
36
HO2
IR2136
11
21
FAULT
12
13
ITRIP
35
14
EN
31
16
30
28 Lead PDIP
IR21363
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21
22
23
24
25
LO2
20
LO1
19
VSS
18
LO3
29
COM
17
44 Lead PLCC w/o 12 leads
IR21363(J)
VB1 28
HIN1
HO1 27
3
HIN2
VS1 26
4
HIN3
25
5
LIN1
VB2 24
6
LIN2
HO2 23
7
LIN3
8
FAULT
9
ITRIP
VS2 22
IR2136
21
VB3 20
10 EN
HO3 19
11 RCIN
VS3 18
VB3
HO3
17
RCIN
VCC
VS2
IR2136
44 LEAD PLCC w/o 12 LEADS
15
1
2
VS3
12 VSS
17
13 COM
LO1 16
14 LO3
LO2 15
28 lead SOIC (wide body)
IR21363(S)
6
IR21363(J&S)PbF
HIN1,2,3
HIN1,2,3
LIN1,2,3
EN
ITRIP
FAULT
RCIN
HO1,2,3
LO1,2,3
Figure 1. Input/Output Timing Diagram
LIN1,2,3
50%
50%
50%
HIN1,2,3
EN
PW IN
ten
LIN1,2,3
50%
50%
HIN1,2,3
90%
HO1,2,3
ton
tr
toff
tf
PW OUT
HO1,2,3
LO1,2,3
90%
10%
10%
Figure 2. Switching Time Waveforms
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LO1,2,3
90%
Figure 3. Output Enable Timing Waveform
7
IR21363(J&S)PbF
LIN1,2,3
HIN1,2,3
LIN1,2,3
50%
50%
50%
50%
HIN1,2,3
50%
LO1,2,3
50%
DT
HO1,2,3
DT
50%
50%
Figure 4. Internal Deadtime Timing Waveforms
Vrcin,th+
RCIN
ITRIP
FAULT
50%
50%
50%
tflt
50%
90%
tfltclr
Any
output
titrip
Figure 5. ITRIP/RCIN Timing Waveforms
HIN/LIN
on off
t in,fil
on
off
U
t in,fil
on off
high
HO/LO
low
Figure 5.5 Input Filter Function
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8
IR21363(J&S)PbF
400
Turn-on Rise Time (ns)
Turn-on Rise Time (ns)
400
300
200
M ax.
100
300
M ax.
200
Typ.
100
Typ.
0
0
-50
-25
0
25
50
75
100
10
125
12
Temperature ( C)
Figure 6A. Turn-on Rise Time vs. Temperature
16
18
20
Figure 6B. Turn-on Rise Time vs. Supply Voltage
200
200
150
150
Turn-off Fall Time (ns)
Turn-off Fall Time (ns)
14
Supply Voltage (V)
o
100
M ax.
50
100
M ax.
Typ.
50
Typ.
0
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 7A. Turn-off Fall Time vs. Temperature
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10
12
14
16
18
20
Supply Voltage (V)
Figure 7B. Turn-off Fall Time vs. Supply Voltage
9
IR21363(J&S)PbF
1000
EN to Output Shutdown Time (ns)
EN to Output Shutdown Time (ns)
1000
800
600
M ax.
Typ.
400
M in.
200
800
M ax.
600
Typ.
400
M in.
200
0
0
-50
-25
0
25
50
75
100
10
125
12
14
Figure 8A. EN to Output Shutdown Time
vs. Temperature
18
20
Figure 8B. EN to Output Shutdown Time
vs. Supply Voltage
1000
1500
ITRIP to Output Shutdown Time (ns)
EN to Output Shutdown Time (ns)
16
Supply Voltage (V)
Temperature (oC)
800
M ax.
600
Typ.
400
M in.
200
0
3
3.5
4
4.5
EN Voltage (V)
Figure 8C. EN to Output Shutdown Time
vs. EN Voltage
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5
1200
M ax.
900
Typ.
600
M in.
300
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 9A. ITRIP to Output Shutdown Time
vs. Temperature
10
1500
ITRIP to FAULT Indication Time (ns)
ITRIP to Output Shutdown Time (ns)
IR21363(J&S)PbF
1200
M ax.
900
Typ.
600
M in.
300
0
1200
1000
800
M ax.
600
Typ.
400
M in.
200
0
10
12
14
16
18
20
-50
-25
0
Supply Voltage (V)
50
75
100
125
o
Temperature ( C)
Figure 9B. ITRIP to Output Shutdown
Time vs. Supply Voltage
Figure 10A. ITRIP to FAULT Indication Time
vs. Temperature
1200
3.0
FAULT Clear Time (ms)
1000
Fault Indication Time (ns)
25
M ax.
800
Typ.
600
M in.
400
200
2.5
M ax.
2.0
Typ.
1.5
M in.
1.0
0.5
0
10
12
14
16
18
Supply Voltage (V)
Figure 10B. ITRIP to FAULT Indication
Time vs. Supply Voltage
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20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 11A. FAULT Clear Time
vs. Temperature
11
IR21363(J&S)PbF
3.0
600
500
2.0
Dead Time (ns)
Fault Clear Time (ms)
2.5
M ax.
Typ.
1.5
M in.
1.0
400
M ax.
300
Typ.
M in.
200
100
0
0.5
10
12
14
16
18
-50
20
-25
0
75
100
125
100
125
Figure 12A. Dead Time
vs. Temperature
600
Logic "0" Input Threshold (V)
6
500
M ax.
Dead Time (ns)
50
Temperature ( C)
Figure 11B. FAULT Clear Time
vs. Supply Voltage
400
Typ.
300
25
o
Supply Voltage (V)
M in.
200
100
5
4
M ax.
3
2
1
0
0
10
12
14
16
18
Supply Voltage (V)
Figure 12B. Dead Time vs. Supply Voltage
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20
-50
-25
0
25
50
75
o
Temperature ( C)
Figure 13A. Logic “0” Input Threshold
vs. Temperature
12
IR21363(J&S)PbF
6
Logic "1" Input Threshold (V)
Logic "0" Input Threshold (V)
6
5
4
3
M ax.
2
1
0
5
4
3
2
M in.
1
0
10
12
14
16
18
20
-50
-25
0
25
Supply Voltage (V)
Figure 14A.
ITRIP Positive Going Threshold (mV
Logic "1" Input Threshold (V)
6
5
4
3
2
M in.
1
0
12
14
16
18
Supply Voltage (V)
Figure 14B. Logic “1” Input Threshold
vs. Supply Voltage
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75
100
125
o
Figure 13B. Logic “0” Input Threshold
vs. Supply Voltage
10
50
Temperature ( C)
20
Logic “1” Input Threshold
vs. Temperature
800
700
600
M ax.
500
Typ.
400
M in.
300
200
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 15A. ITRIP Positive Going Threshold
vs. Temperature
13
3.0
800
High Level Output Voltage (V)
ITRIP Positive Going Threshold (mV
IR21363(J&S)PbF
700
600
M ax.
500
Typ.
400
M in.
300
200
2.5
2.0
1.5
M ax.
1.0
Typ.
0.5
0.0
10
12
14
16
18
20
-50
-25
0
50
75
100
125
o
Supply Voltage (V)
Temperature ( C)
Figure 15B. ITRIP Positive Going
Threshold vs. Supply Voltage
Figure 16A. High Level Output
vs. Temperature
3.0
1.2
Low Level Output Voltage (V)
High Level Output Voltage (V)
25
2.5
2.0
M ax.
1.5
Typ.
1.0
0.5
0.0
1.0
0.8
0.6
M ax.
0.4
Typ.
0.2
0.0
10
12
14
16
Supply Voltage (V)
Figure 16B. High Level Output
vs. Supply Voltage
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18
20
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 17A. Low Level Output
vs. Temperature
14
Low Level Output Voltage (V)
1.2
1.0
0.8
M ax.
0.6
0.4
Typ.
0.2
0.0
10
12
14
16
18
20
Supply Voltage (V)
V CC or V BS Undervoltage Lockout (+) (V)
IR21363(J&S)PbF
13
12
M ax.
M in.
10
-50
Offset Supply Leakage Current ( µA)
V CC or V BS Undervoltage Lockout (-) (V)
12
M ax.
Typ.
M in.
10
-25
0
25
50
75
100
o
Temperature ( C)
Figure 19. VCC or VBS Undervoltage (-)
vs. Temperature
www.irf.com
0
25
50
75
100
125
Figure 18. VCC or VBS Undervoltage (+)
vs. Temperature
13
9
-50
-25
Temperature (oC)
Figure 17B. Low Level Output
vs. Supply Voltage
11
Typ.
11
125
500
400
300
200
100
M ax.
0
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 20A. Offset Supply Leakage Current
vs. Temperature
15
500
250
400
200
VBS Supply Current (µA)
µA)
Offset Supply Leakage Current (µ
IR21363(J&S)PbF
300
200
100
150
M ax.
100
50
Typ.
M ax.
0
0
100
200
300
400
500
-50
600
-25
0
75
100
125
100
125
Figure 21A. VB Supply Current
vs. Temperature
800
Logic "1" Input Current ( µA)
250
µ A)
V BS Supply Current ((µ
50
o
Figure 20B. Offset Supply Leakage Current
vs. VB Boost Voltage
200
150
100
25
Temperature ( C)
V B Boost Voltage (V)
M ax.
50
Typ.
600
400
200
M ax.
Typ.
0
0
10
12
14
16
18
VBS Floating Supply Voltage (V)
Figure 21B. VBS Supply Current
vs. VBS Floating Supply Voltage
www.irf.com
20
-50
-25
0
25
50
75
o
Temperature ( C)
Figure 22A. Input Current vs. Temperature
16
IR21363(J&S)PbF
600
Logic "0" Input Current ( µA)
Logic "1" Input Current ((µ
µA)
A)
800
600
400
M ax.
200
500
400
300
200
M ax.
100
Typ.
Typ.
0
0
10
12
14
16
18
-50
20
-25
0
50
75
100
125
o
Figure 22B. Logic “1” Input Current
vs. Supply Voltage
Figure 23A. Logic “0” Input Current
vs. Temperature
250
600
500
"High" ITRIP Current ( µA)
A)
Logic "0" Input Current ( (µµA)
25
Temperature ( C)
Supply Voltage (V)
400
300
200
M ax.
100
Typ.
150
100
M ax.
50
Typ.
0
0
10
200
12
14
16
18
20
-50
-25
0
25
50
75
100
125
o
Supply Voltage (V)
Figure 23B. Logic “0” Input Current
vs. Supply Voltage
www.irf.com
Temperature ( C)
Figure 24A. High ITRIP Current
vs. Temperature
17
IR21363(J&S)PbF
4
"Low" ITRIP Current (µA)
"High" ITRIP Current ( (µA)
A)
250
200
150
M ax.
100
50
Typ.
3
2
M ax.
1
Typ.
0
0
10
12
14
16
18
20
-50
-25
0
Supply Voltage (V)
50
75
100
125
o
Figure 24B. “High” ITRIP Current
vs. Supply Voltage
Figure 25A. “Low” ITRIP Current
vs. Temperature
200
"High" IEN Current (µA)
4
A)
"Low" ITRIP Current ((µµA)
25
Temperature ( C)
3
2
M ax.
1
150
100
M ax.
50
Typ.
Typ.
0
0
10
12
14
16
Supply Voltage (V)
Figure 25B. ITRIP Current
vs. Supply Voltage
www.irf.com
18
20
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 26A. “High” IEN Current
vs. Temperature
18
IR21363(J&S)PbF
4
200
"Low" IEN Current (µA)
"High" IEN Current (µA)
( A)
250
150
M ax.
100
50
3
2
M ax.
1
Typ.
Typ.
0
0
10
12
14
16
18
-50
20
-25
0
25
125
4
RCIN Input Bias Current ( A)
"Low" IEN Current(µ
(µ A)
A)
100
Figure 27A. “Low” IEN Current
vs. Temperature
4
3
2
0
75
o
Figure 26B. “High” IEN Current
vs. Supply Voltage
1
50
Temperature ( C)
Supply Voltage (V)
M ax.
3
2
M ax.
1
Typ.
Typ.
0
10
12
14
16
Supply Voltage (V)
Figure 27B. IEN Current
vs. Supply Voltage
www.irf.com
18
20
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 28A. RCIN Input Bias Current
vs. Temperature
19
IR21363(J&S)PbF
400
Output Source Current (mA)
RCIN Input Bias Current ( (µA)
A)
4
3
2
M ax.
1
300
Typ.
200
M in.
100
Typ.
0
0
10
12
14
16
18
20
-50
-25
0
Supply Voltage (V)
50
75
100
125
o
Figure 28B. RCIN Input Bias Current
vs. Supply Voltage
Figure 29A. Output Source Current
vs. Temperature
500
Output Sink Current (mA)
500
Output Source Current (mA)
25
Temperature ( C)
400
300
200
Typ.
100
400
Typ.
300
M in.
200
100
M in.
0
0
10
12
14
16
18
Supply Voltage (V)
Figure 29B. Output Source Current
vs. Supply Voltage
www.irf.com
20
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 30A. Output Sink Current
vs. Temperature
20
IR21363(J&S)PbF
250
RCIN Low On-resistance (Ω )
600
Output Sink Current (mA)
500
400
300
Typ.
200
M in.
100
200
150
100
M ax.
50
Typ.
0
0
10
12
14
16
18
20
-50
-25
0
Supply Voltage (V)
50
75
100
125
o
Figure 30B. Output Sink Current
vs. Supply Voltage
Figure 31A. RCIN Low On-resistance
vs. Temperature
250
250
FAULT Low On-resistance ( Ω )
RCIN Low On-resistance ( )
25
Temperature ( C)
200
150
M ax.
100
Typ.
50
200
150
100
M ax.
50
Typ.
0
0
10
12
14
16
18
Supply Voltage (V)
Figure 31B. RCIN Low On-resistance
vs. Supply Voltage
www.irf.com
20
-50
-25
0
25
50
75
100
125
o
Temperature ( C)
Figure 32A. FAULT Low On-resistance
vs. Temperature
21
IR21363(J&S)PbF
0
VS Offset Supply Voltage (V)
FAULT Low On-resistance ( )
250
200
150
M ax.
100
Typ.
50
0
-3
Typ.
-6
-9
-12
-15
10
12
14
16
18
Supply Voltage (V)
Figure 32B. FAULT Low On-resistance
vs. Supply Voltage
www.irf.com
20
10
12
14
16
18
20
Supply Voltage (V)
Figure 33. Maximum VS Negative Offset
vs. VBS Supply Voltage
22
120
120
100
100
80
60
40
300V
200V
100V
0V
Junction Temperature (oC)
Junction Temperature o(C)
IR21363(J&S)PbF
20
60
300V
200V
100
V
0V
40
20
0.1
1
10
Frequency (KHz)
100
0.1
Figure 34. IR21363 vs.
Ω, Vcc=15V
Frequency (IRG4BC20W), Rgate=33Ω
120
120
100
100
80
60
300V
200V
100
0V
V
40
1
10
Frequency (KHz)
100
Figure 35. IR21363 vs.
Ω, Vcc=15V
Frequency (IRG4BC30W), Rgate=15Ω
Junction Temperature (oC)
Junction Temperature (oC)
80
80
300V
60
200V
100
V
0V
40
20
20
0.1
1
10
Frequency (KHz)
100
Figure 36. IR21363 vs.
Ω, Vcc=15V
Frequency (IRG4BC40W), Rgate=10Ω
www.irf.com
0.1
1
10
Frequency (KHz)
100
Figure 37. IR21363 vs.
Ω, Vcc=15V
Frequency (IRG4PC50W), Rgate=5Ω
23
120
120
100
100
80
60
300V
200V
100V
0V
40
Junction Temperature (oC)
Junction Temperature (oC)
IR21363(J&S)PbF
20
60
300V
200V
100V
0V
40
20
0.1
1
10
Frequency (KHz)
100
0.1
Figure 38. IR21363 (J) vs.
Ω, Vcc=15V
Frequency (IRG4BC20W), Rgate=33Ω
120
120
100
100
80
60
300V
200V
100V
0V
40
1
10
Frequency (KHz)
100
Figure 39. IR21363 (J) vs.
Ω, Vcc=15V
Frequency (IRG4BC30W), Rgate=15Ω
Junction Temperature (oC)
Junction Temperature (oC)
80
80
60
300V
200V
100V
40
0V
20
20
0.1
1
10
Frequency (KHz)
100
Figure 40. IR21363 (J) vs.
Ω, Vcc=15V
Frequency (IRG4BC40W), Rgate=10Ω
www.irf.com
0.1
1
10
Frequency (KHz)
100
Figure 41. IR21363 (J) vs.
Ω, Vcc=15V
Frequency (IRG4PC50W), Rgate=5Ω
24
120
120
100
100
80
60
300V
200V
100
V0V
40
Junction Temperature (oC)
Junction Temperature (oC)
IR21363(J&S)PbF
80
60
300V
200V
100
0V
V
40
20
20
0.1
1
10
Frequency (KHz)
0.1
100
Figure 42. IR21363 (S) vs.
Ω, Vcc=15V
vs. Frequency (IRG4BC20W), Rgate=33Ω
1
10
Frequency (KHz)
100
Figure 43. IR21363 (S) vs.
Ω, Vcc=15V
vs. Frequency (IRG4BC30W), Rgate=15Ω
120
120
100
100
80
60
300V
200V
100
V0V
40
Junction Temperature ( oC)
Junction Temperature (oC)
300V
200V
80
100
V
60
0V
40
20
20
0.1
1
10
Frequency (KHz)
100
Figure 44. IR21363 (S) vs.
Ω, Vcc=15V
vs. Frequency (IRG4BC40W), Rgate=10Ω
www.irf.com
0.1
1
10
Frequency (KHz)
100
Figure 45. IR21363 (S) vs.
Ω, Vcc=15V
vs. Frequency (IRG4PC50W), Rgate=5Ω
25
IR21363(J&S)PbF
Case outlines
28-Lead PDIP (wide body)
28-Lead SOIC (wide body)
www.irf.com
01-6011
01-3024 02 (MS-011AB)
01-6013
01-3040 02 (MS-013AE)
26
IR21363(J&S)PbF
NOTES
44-Lead PLCC w/o 12 leads
01-6009 00
01-3004 02(mod.) (MS-018AC)
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
http://www.irf.com/ Data and specifications subject to change without notice.
11/3/2005
www.irf.com
27