Depletion-Mode Power MOSFETs and Applications Abdus Sattar, IXYS Corporation Applications like constant current sources, solid-state relays, telecom switches and high voltage DC lines in power systems require N-channel Depletion-mode power MOSFET that operates as a normally “on” switch when the gate-to-source voltage is zero (VGS=0V). This paper will describe IXYS latest N-Channel Depletion power MOSFETs and their application advantages to help designers to select these devices in many industrial applications. Figure 1: An N-channel Depletion-mode power MOSFET A circuit symbol for N-channel Depletion-mode power MOSFET is given in Figure 1. The terminals are labeled as G (gate), S (source) and D (drain). IXYS Depletion-mode power MOSFETs are built with structure called vertical double-diffused MOSFET or DMOSFET and have better performance characteristics compare to other depletion-mode power MOSFETs on the market such as high VDSX, high current and high forwardbiased safe operating area (FBSOA). Figure 2 shows a typical drain current (ID) versus the drain-to-source voltage (VDS) characteristics called the output characteristic. It’s a similar plot to that of an N-channel Enhancement-mode power MOSFET except that it has current lines at VGS of -2V, -1V, and 0V. Figure 2: Output characteristics of N-channel Depletion-mode power MOSFET The on-state drain current, ID(on), a parameter defined in the datasheet, is the current that flows between the drain and the source at a particular drain-to-source voltage (VDS), when the gate-to-source voltage (VGS) is zero (or short-circuited). By applying positive gate-to-source (VGS) voltage, the device increases the current conduction level. On the other hand, the negative gate-to-source (VGS) voltage reduces the drain current. As shown in Figure 2, the device stops conducting the drain current at VGS= -3V. This -3V is called the gate-to-source cutoff voltage or threshold voltage (VGS(off)) of the device. In order to ensure proper turn on, the applied gate-to-source (VGS) voltage should be close to 0V and to proper turn off, a more negative VGS voltage than the cutoff voltage (VGS(off)) should be applied. Theoretically, the on-state drain current, ID(on), can be defined as, ⎛ ⎞ V I D = I D ( on ) ⎜1 − GS ⎟ ⎜ V ⎟ GS ( off ) ⎠ ⎝ 2 (1) Note that the equation (1) is a theoretical formula, which in most cases would not estimate an accurate value of the drain current. VGS(off) has a range of -4V to -2V and ID(on) depends both on VGS(off) and the temperature. A list of IXYS N-channel discrete Depletion-mode power MOSFETs is given in Table 1. The table shows the device’s four main parameters: the drain-to-source breakdown voltage (VDSX), the on-state drain current (ID(on)), the on-state resistance (RDS(on)) and the gate-to-source cutoff voltage (-VGS(off))) along with standard discrete package options such TO-263 (D2-PAC), TO-220, TO-247, TO-252 (D-PAC) and TO-251 (I-PAC). Table 1: IXYS N-channel Depletion-mode power MOSFETs Part No IXTH16N10D2 IXTT16N10D2 IXTH16N20D2 IXTT16N20D2 IXTA6N50D2 IXTH6N50D2 IXTP6N50D2 IXTT6N50D2 IXTA3N50D2 IXTP3N50D2 IXTH3N50D2 IXTA1R6N50D2 IXTP1R6N50D2 IXTY1R6N50D2 IXTA08N50D2 IXTP08N50D2 IXTY08N50D2 IXTA02N100D2 VDSX (V) 100 100 200 200 500 500 500 500 500 500 500 500 500 500 500 500 500 1000 ID(on) (A) 16 16 16 16 6 6 6 6 3 3 3 1.6 1.6 1.6 0.8 0.8 0.8 0.2 RDS(on) (Ohm) 0.064 0.064 0.073 0.073 0.5 0.5 0.5 0.5 1.5 1.5 1.5 2.3 2.3 2.3 4.6 4.6 4.6 75 VGS(off) (V) -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -4.0 -5.0 Package Type TO-247 TO-268 TO-247 TO-268 TO-263 TO-247 TO-220 TO-268 TO-263 TO-220 TO-247 TO-263 TO-220 TO-252 TO-263 TO-220 TO-252 TO-263 IXTP02N100D2 IXTU02N100D2 IXTY02N100D2 IXTA6N100D2 IXTH6N100D2 IXTP6N100D2 IXTA3N100D2 IXTP3N100D2 IXTA1R6N100D2 IXTP1R6N100D2 IXTY1R6N100D2 IXTA08N100D2 IXTP08N100D2 IXTY08N100D2 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 1000 0.2 0.2 0.2 6 6 6 3 3 1.6 1.6 1.6 0.8 0.8 0.8 75 75 75 2.2 2.2 2.2 5.5 5.5 10 10 10 21 21 21 -5.0 -5.0 -5.0 -4.5 -4.5 -4.5 -4.5 -4.5 -4.5 -4.5 -4.5 -4.0 -4.0 -4.0 TO-220 TO-251 TO-252 TO-263 TO-247 TO-220 TO-263 TO-220 TO-263 TO-220 TO-252 TO-263 TO-220 TO-252 Selecting a Depletion-mode Power MOSFET The depletion-mode power MOSFET will function in those applications requiring a normally on-switch. The main selection criteria for a Depletion-mode MOSFET based on the application are as follows: 1. Pick the package first and look at the products available that meet the application requirements. 2. Select the breakdown voltage meeting the margin for reliable operation ~ BVDSX, the drain-to-source breakdown voltage The application voltage must be lower that the drain-to-source breakdown voltage of the device. BVDSX needs to be selected to accommodate the voltage swing between the bus positive and the bus negative as well as any voltage peaks caused by voltage ringing due to transients. 3. Identify the current requirement and pick a package capable of handling that current ~ ID(on), the on-state drain current The application current must be lower that the on-state drain current of the device. It is the maximum current that can flow between the drain and source, which occurs at a particular drain-to-source voltage (VDS) and when the gate-to-source voltage (VGS) is zero. 4. VGS(off), the gate-to-source cutoff voltage N-Channel Depletion-mode MOSFET has negative channel cutoff voltage, which is designated as VGS(off). A designer has to know well the magnitude of the negative cutoff voltage (or threshold voltage). A negative gate-to-source voltage (VGS) will reduce the drain current until the device’s cutoff voltage level is reached and the conduction ceases. Applications Figure 3 shows a very precise current source to the load RL1. TL431 is a programmable voltage reference IC. The feedback voltage from the sense resistor RS1 is controlled to be 2.5V. It will operate as a current source at any current level below the device’s rated current rating, Id(on). M1 IXTH16N10D2 RB 10k V1 0Vdc U1 25 RL1 25 RS1 TL431/TO 0 Figure 3: Depletion-mode MOSFET current source and the current waveform The theoretical sense resistor value is given by RS = VGS ( off ) ID [1 − ID I D ( on ) ] (2) Note that the equation (2) is a theoretical formula which mostly would not estomate the practical values of Rs. In most cases, it’s convenient to use a potentiometer to set the desired current level. Design example, IXTA1R6N50D2 with ID(on) of 1.6A, a VGS(off) of -4.0V, VDSX of 500V. Design a current source of 100mA. The required value of Rs would be equal ~ 40 ohms. Choose a wide range of +V, for example from 20V-400V. Figure 4 shows another constant current source with Depletion-mode MOSFET, Q1 and the gate-to-source Zener diode DZ1. The required VGS1 will determine the necessary resistor value for R1 using the same formula (2). This design may useful in higher voltage circuits. The voltage limit on V+ will be determined by the VDSS rating of the devices. Figure 4: An N-Channel Depletion-mode MOSFET (Q1) as a current source [1] Figure 5 shows a current source example with a voltage reference IC and a Depletionmode MOSFET (Q1), which compensates the supply voltage fluctuations. The current source provides a total current to the load comprising the set current through the resistor (Rs) and the IC quiescent current (IQ). This circuit provides precision current and ultrahigh output impedance. Figure 5: An N-Channel Depletion-mode MOSFET with a voltage reference to provide a precise current source [1] Figure 6 shows an NMOS inverter circuit that uses a depletion-mode MOSFET as a load. The depletion-mode MOSFET (Q1) acts as a load for the enhancement-mode MOSFET (Q2), which acts as a switch. Figure 6: A NMOS Inverter with Depletion-mode device is used as a load [2] Many applications in industrial and consumer electronics require off-line switch-mode power supplies that operate from wide voltage variations of 110 VAC to 260 VAC. Figure 7 shows such a power supply that uses a depletion-mode MOSFET (Q1) to kickstart the off-line operation by providing initial power to the IC (U1) through the source of Q1. Figure 7: Power Supply start-up circuit using Depletion-mode MOSFET Q1 provides initial power from the output (Vo). R3 and R4 setup a working point to obtain the minimum required current from Q1. The Zener diode DZ1 limits the voltage across the IC (U1) to +15V. After the start-up, the secondary winding of boost inductor L1 generates the supply voltage for the IC through D1, D2 and C3 and enough current through D3 and R1 for the base of Q3 that turns-on and clamps the gate of Q1 to ground. Depletion-mode MOSFET can be used to design an off-line LED array driver circuit as shown in Figure 8. The light output from the LED array is proportional to the current through it. The LED arrays has low forward voltage of 3 to 4V and require constantcurrent drive for optimal operation. They are typically low power devices (1W to 3W) with drive currents in the range of 350mA to 700mA. Figure 8: An off-line LED lighting application using Depletion-mode MOSFET Applications such as high voltage sweeping and automatic test equipment require high voltage ramp with a linear relationship between output voltage and time. Figure 9 utilizes one Depletion-mode MOSFET to design a voltage-ramp generator circuit. Figure 9: A high voltage ramp generator using one Depletion-Mode (Q1) and one Enhancement-Mode (Q2) N-Channel MOSFETs [2] Q1 is configured as a constant current source charging a capacitor, C1, and R1 provides negative feedback to regulate and set the desired current value. The constant current source charges the capacitor C1 and generates a voltage ramp, VOUT across the capacitor. The Q2 can be turned on with TTL or CMOS control signal to reset the ramp voltage, by discharging the capacitor to ground through R2. The resistor R2 is used to limit the discharge current for Q2 to operate within its SOA rating. Initially Q1 is ON because it’s turned-on when its gate-to-source voltage, VGS =0V. Any voltage applied on +VDD will create a current that will follow the MOSFET Q1 and charge the capacitor, C1. As the voltage across C1 increases, the output voltage, VOUT, will start to increase until it reaches it regulated voltage of 5.0V. Q1 acts as a source-follower with its gate (G) is connected to a fixed 5.0V output. The voltage on S will follow the voltage on G, minus VGS. This results, VS = VOUT -VGS, where VGS is the voltage required to supply the input current. dV = 0.1V / μS dt The capacitor C1 value should be small enough to reduce charging and discharging a larger amount of energy and large enough so that output loads and stray capacitances will not introduces significant error. C1 is chosen to be 10.0 nF. Assume the ramp voltage, The charging current is defined as I = C1 • I = 1.0nF • 0.1V / μS = 100 μA dV dt (3) R1 value for 100μA current source can be determined using the equation (2): R1 = ⎞ VGS ( off ) ⎛ I D ⎜ ⎟ − 1 ⎟ I D ⎜⎝ I DSS ⎠ Where, VGS (off ) = Pinch-off voltage = -4.0V (Choosing a value between minimum -2.5V to maximum -5.0V) I DSS = Saturation current = 200 mA I D = 100μA ⎞ − 4.0 − 4.0 ⎛ 100μA ⎜ (0.0224 − 1) = 3.9106 x1000000 = 39.1kΩ − 1⎟⎟ = ⎜ 100 100μA ⎝ 200mA ⎠ 100μA Assume the switching frequency for Q2 is f sw = 250 Hz and the discharge time is t Dis −ch = 100μs . Power loss in the output capacitor, C1: 1 P = • C1 • V 2 • f sw (4) 2 Using equation (7), 1 P = • 10nF • 400 2 • 250 Hz = 800μJ • 250 Hz = 200mJ / S = 200mW 2 Discharging time, t Dis −ch = 4 • R 2C1 (5) Using equation (8), 100us R2 = = 10kΩ 4 • 10nF R1 = Many applications require linear voltage regulator that operates from high input voltage and comes from a wide voltage variations of 120 VAC to 240 VAC that corresponds to a maximum peak voltage of +/- 340V. Applications like CMOS ICs and small analog circuits require 5 to 15V DC power supply and need protection from very fast, high voltage transients and low quiescent current from linear regulator. Figure 10 shows a high voltage off-line linear voltage regulator using Depletion-mode MOSFET that can meet the above requirement of low transient voltage and low quiescent current. Figure 10: High Voltage Off-line Linear Voltage Regulator [2] High voltage transients are generated in telecommunication circuits because of lightning and spurious radiations and in automotive and avionics circuits because of inductive loads. The low quiescent current is required to minimize power dissipation in these linear regulators. HVIN Calculation: ⎛ V I D = I DSS ⎜1 − GS ⎜ V GS ( off ) ⎝ 2 ⎞ ⎛ ⎟ Solving for VGS = VGS ( off ) ⎜1 − I D ⎜ ⎟ I DSS ⎝ ⎠ Where, VGS = VOUT − VIN ⎞ ⎟ ⎟ ⎠ and I DSS = ∫ (VGS (th ) ) ⎛ ID H VIN = VOUT − VGS ( off ) ⎜⎜1 − I DSS ⎝ ⎞ ⎟ ⎟ ⎠ (6) Using equation (1), ⎛ 10mA ⎞ ⎟ = 5.0 + 4 • (1 − 0.3162 ) =7.7352V H VIN = 5.0 + 4 • ⎜⎜1 − ⎟ mA 100 ⎝ ⎠ Current-Monitor Circuit: A simple current monitor circuit using an op-amp and a Depletion-Mode MOSFET is shown in Figure 11. R1 monitors the current to the load and the MOSFET, Q1, provides an output voltage proportional to the current being monitored. R • R2 V OUT = I LOAD • ( S ) (7) R1 The resistance value of R1 should be a quality of 0.1% wire wound type with appropriate wattage rating. Figure 11: Current monitor using Depletion-Mode MOSFET and a singlesupply op-amp. For example, Rs= 0.1 Ω , 0.1%, R1=100 Ω , R2=1 k Ω Using equation (7) VOUT R • R2 0.1 • 1000 =1V/A = S = 100 I LOAD R1 References: [1] An introduction to depletion-mode MOSFETs, By Linden Harrison, Advanced Linear Devices, Inc [2] LND1 Series, Application Note, AN-D16, Supertex Inc.