Linear Systems replaces discontinued Toshiba

LSK489
en = 1.8nV√Hz, Ciss = 4pF, MONOLITHIC DUAL N-CHANNEL JFET
Description:
The LSK 489 high performance monolithic dual JFETs features
extremely low noise, tight offset voltage and low drift over
temperature specifications, and is targeted for use in a wide
range of precision instrumentation applications.
LSK489 removes significant cost for test screening time needed
to match IDSS on 2 individual JFETS and offers ZERO yield loss.
LSK489 On-Chip IDSS matching gives closest possible
synchronous electrical performance and also offers better
matched performance when the chip is subjected to
temperature.
Availability:
LSK489 – TO-71 hermetic package
LSK489 – SOIC-A
LSK489 – SOT-23, 6 lead
LSK489 – BARE DIE
Contact Micross for full package dimensions
1
ABSOLUTE MAXIMUM RATING @ 25°C (unless otherwise stated)
Features:

Reduced Noise due to process improvement

Monolithic Design

High slew rate & high CMRR 102dB

Low offset/drift voltage

Low gate leakage IGSS & IG
Benefits:




Tight differential match vs. current
Improved op amp speed settling time accuracy
Minimum Input Error trimming error voltage
Lower intermodulation distortion
Applications:

Wide band differential Amps

High speed temperature compensated single ended input
amplifiers

High speed comparators

Impedance convertors

High-Speed Driver
Pinout:
Storage Temperature
-55 to +150°C
Junction Operating Temperature
-55 to +150°C
MAXIMUM RATINGS
LIMIT
MAXIMUM RATINGS
LIMIT
UNIT
4
Continuous Power Dissipation, per side SD210DE 300mW
SD214DE
5
Power Dissipation,
total
500mW
Gate-Drain,
Gate-Source
±40V
±40V
Drain Current
50
mA
GateVoltage
Forward Current
IG(F) = 10mA
Gate to Source
Voltage
VGSO = 60V
Gate-Substrate
Voltage
±30V
±30V
Lead Temperature
300
°C
Gate to Drain
Voltage
VGDO = 60V
Drain-Source
Voltage
30V
20V
Storage Temperature
-65 to 150
°C
Source-Drain Voltage
10V
20V
Operating Junction
-55 to 125
°C
Temperature
MATCHING CHARACTERISTICS, TA = 25°C unless otherwise noted
Drain -Substrate
Voltage
30V
25V
Dissipation
300 CONDITIONS mW
CHARACTERISTIC
SYMBOL
MIN
TYP Power
MAX
UNITS
Source-Substrate
Voltage
15V
25V
DIFFERENTIAL GATE TO SOURCE CUTOFF
|VGS1 - VGS2|
20
mV
VDS = 10V, ID = 1mA
VOLTAGE
ELECTRICAL
GATE
TO SOURCESPECIFICATION
SATURATION CURRENT RATIO
IDSS1
0.9
1.0
VDS = 10V, VGS = 0V
LIMITS
IDSS2
PARAMETER
SYMB
TEST CONDITIONS
TYP
UNIT
SD214DE
COMMON MODE REJECTION RATIO
CMRR
95
102
dBSD210DEVDG = 10V
to 20V, ID = 200µA
OL
MIN
MAX
MIN
MAX
- I = 10µA
1.8
2.035
VDS = 15V, ID = 2mA, f = 1kHz
DRAIN-SOURCE BREAKDOWN
V(BR)DS
VGS = VBS = 0V,
30
D
NOISE
VOLTAGE
e
nV
/
√Hz
NBW = 1Hz
n
VOLTAGE
VGS = VBS = -5V, ID = 10nA
30
10
20
2.8
3.5
VDS = 15V, ID = 2mA, f = 10Hz
SOURCE-DRAIN BREAKDOWN
V(BR)SD
VGD = VBD = -5V, IS = 10nA
22
10
20NBW = 1Hz
VOLTAGE
V
COMMON SOURCE INPUT CAPACITANCE
CISS
4
8
DRAIN-SUBSTRATE
V(BR)DBO
V = 0V, ID = 10nA
35
25I = 500µA, f = 1MHz
pF15
VDS = 15V,
COMMON SOURCE REVERSE TRANSFER
CRSSGB
3
D
BREAKDOWN VOLTAGE
Source Open
CAPACITANCE
SOURCE-SUBSTRATE
V(BR)SBO
VGB = 0V, IS = 10µA
35
15
25
ELECTRICAL
CHARACTERISTICS
@ 25°C unless otherwise noted Drain Open
BREAKDOWN
VOLTAGE
CHARACTERISTIC
DRAIN-SOURCE
LEAKAGE
IDS(off)
GATE TO SOURCE BREAKDOWN VOLTAGE
SOURCE-DRAIN
LEAKAGEVOLTAGE
ISD(off)
GATE TO GATE BREAKDWON
GATE TO SOURCE PINCH-OFF VOLTAGE
LEAKAGE
IGBS
GATEGATE
TO SOURCE
OPERATING VOLTAGE
DRAIN
TO SOURCEVOLTAGE
SATURATION CURRENT
THRESHOLD
VGS(th)
GATE OPERATING CURRENT
CONDITIONS
VSYMBOL
= 10V MAX
0.4 UNITS
10
GS = VBS = -5VMIN VDS TYP
BVGSS
-60 VDS =- 20V
- 0.9
V
VDS = 0, ID10
= -1nA
nA
V(BR)
=
V
=
-5V
V
=
10V
0.5
10
V
±30
±45
V
I
=
±1µA,
I
=
I
=
0
A (Open Circuit)
GD G1 – G2
BD
SD
G
D
S
VGS (OFF)
-1.5 VSD =- 20V -3.50.8
V
VDS = 15V, 10
ID = 1nA
VDB
0.001
0.1 VDS = 15V, I0.1
V
, VGB = ±4 -0V
VGS= VSB = 0V-0.5
-3.5
V
D = 500µA
2
IDSS
2.5 VSB =5 0V
150.8
mA
V0.1
VGS = 0
VDS
= VGS , ID = 1µA,
0.5
1.5
DG = 15V,1.5
IG
-2558
pA
= 200µA
VGS -2
= 5V
70 VDG = 15V, ID70
- VGS-0.8
nA
= 10V -1038
45
45 TA = 25°C
GATE
TO SOURCE LEAKAGE CURRENT
pA
VDG = -15V, VDS = 0V Ω
DRAIN-SOURCE-ON
RDS(on)
VSB =IGSS
0V, ID = 1mA- VGS =- 15V -10030
RESISTANCE
FULL CONDUCTION TRANSCONDUCTANCE
Gfs
1500 VGS =- 20V
- 26
VDG = -15V, VGS = 0, f = 1kHz
µS
TRANSCONDUCTANCE
1000 VGS1500
- 24
VDG = 15V, ID = 500µA
= 25V
FULLDYNAMIC
OUTPUT CONDUCTANCE
GOS
35
VDG = 15V, VGS = 0V
FORWARD
OUTPUT
CONDUCTANCE
0.2
2
VDG = 15V, ID = 200µA
TRANSCONDUCTANCE
NOISE FIGURE
NF
0.5
dB
VDS = 15V, VGS = 0V, RG = 10MΩ
SD210DE / SD214DE - Bare die and wafer form, contact
f = 100Hz, NBW = 6Hz
Micross
forMaximum
full datasheet
andvalues
dimensions
Note
1 - Absolute
Ratings are limiting
above which serviceability may be impaired, Note 2 - Pulse width ≤2ms, Note 3 - All MIN/TYP/MAX Limits are absolute values. Negative signs indicate electrical
polarity only, Note 4 - Derate 2.4mW/°C above 25°C, Note 5 - Derate 4mW/°C above 25°C
Information Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties
which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
Micross Components Ltd, United Kingdom, Tel: +44 1603 788967, Fax: +44 1603788920, Email: [email protected] Web: www.micross.com