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TELEPHONE: (973) 376-2922
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FAX: (973) 376-8960
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
2N5564/5565/5566
Matched N-Channel JFET Pairs
Product Summary
Part Number VGS(olD 00
V(BR)css Min (V) grs Min (mS) IG T>1> (pA) |VGsi - VGS2| Max (mV)
-0.5 to -3
-40
-40
7.5
7.5
-0.5 to -3
-40
7.5
2N5564
-0.5 to -3
2N5565
2N5566
Features
Two-Chip Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 3 pA
Low Noise: 12 nV/Vffe~@ 10 Hz
GoodCMRR: 76 dB
Minimum Parasitics
-3
-3
-3
Benefits
5
10
20
Applications
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time
Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signals
Maximum High Frequency Performance
Wideband Differential Amps
High-Speed, Temp-Compensated,
Single-Ended Input Amps
High-Speed Comparators
Impedance Converters
Matched Switches
TO-71
Description
The 2N5564/5565/5566 are matched pairs of JKETs
mounted in a TO-71 package. This two-chip design
reduces parasitics for good performance at high frequency
while ensuring extremely tight matching. This series
features high breakdown voltage (V(BR)DSS typically >
55 V), high gain (typically > 9 mS), and <5-mV offset
between the two die.
Top View
Absolute Maximum Ratings
Gate-Drain, Gate-Source Voltage
Gate-Gate Voltage
Gate Current
Lead Temperature (Vi6" from case for 10 sec.)
Storage Temperature
Quality Semi-Conductors
-40 V
± 80 V
50 mA
300 °C
-65 to 200°C
Operating Junction Temperature
Power Dissipation : Per Side3.
Total*
Notes
a. Derate 2.6 mW/°C above 25°C
b. Derate 5.2 mW/°C above 25°C
-55 to 150°C
325 mW
650 mW
Specifications'
Limits
2N5564
Parameter
2N5565
Typb Min Max Min
Symbol
Test Conditions
V(BR)GSS
IG = -luA,V D S = OV
-55
-40
Vas(off)
VDS = 15 V, ID = 1 nA
-2
-0.5
5
2N5566
Max
Min
Max
Unit
Static
Gate-Source
Breakdown Voltage
Gate-Source
Cutoff Voltage
Saturation Drain Current0
Gate Reverse Current
Gate Operating Current
Drain-Source
On-Resistance
Gate-Source Voltage
Gate-Source
Forward Voltage
-40
-40
V
IDSS
IGSS
IG
-3
-0.5
30
5
-3
-0.5
30
5
-3
VDS = 15V,VOS = OV
20
30
mA
V G S =-20V,V D S = OV
-5
-100
-100
-100
| TA = 150°C
-10
-200
-200
-200
PA
nA
VDG = 15 V ID = 2mA
| TA » 125°C
-3
PA
nA
-1
TDS(on)
VGS = 0 V, ID = 1 mA
50
VGS
VDG = 15 V, ID = 2 mA
-1.2
VGS(F)
lG = 2mA,V D S = OV
0.7
100
100
100
1
1
1
Q
V
Dynamic
Common-Source
Forward Transconductance
gfs
Common-Source
Output Conductance
gos
Common-Source
Forward Transconductance
gfs
Common-Source
nput Capacitance
QM
Common-Source Reverse
Transfer Capacitance
Cr*
Equivalent Input
'ioise Voltage
6n
*Ioise Figure
NF
VDS - 15 V, ID = 2 mA
f = 1 kHz
9
7.5
35
vDs = 15 y iD = 2 mA
f = 100 MHz
VDS - 15 V, ID - 2 mA
f = 1 MHz
VDS = 15 V, ID = 2 mA
f=10Hz
8.5
12.5
7.5
45
12.5
45
7
7
7.5
12.5
mS
45
US
mS
7
10
12
12
12
2.5
3
3
3
12
50
50
50
nV/
VHI
1
1
1
dB
pF
1 RG = 10 MQ
Matching
Differential
Gate-Source Voltage
|vosl-vGS2|
VDG = 15 V, ID = 2mA
5
10
20
mV
Gate-Source Voltage
3ifferential Change
with Temperature
AlVos.-V^I
VDG = 15 V, ID = 2 mA
TA = -55 to 125°C
10
25
50
uv/°c :
Saturation Drain
Current Ratio
AT
'DSSI
'DSS:
ransconductance Ratio
Common Mode
{ejection Ratio
VTA*. ~ 1 ^ v v^o
n v
0.98
0.95
1
0.95
1
0.95
1
Bfsi
8fs2
VDS = 15 V, ID = 2 mA
f = 1 kHz
0.98
0.95
1
0.90
1
0.90
1
CMRR
VDG = 10 to 20V
ID = 2 mA
76
dB
Notes
a. TA = 25°C unless otherwise noted.
b. Topical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. Pulse test: PW a 300 us duty cycle S3%.
TO-71
Dim
Millimeters
Min
M«ut
Inches
Min
Max
A
AI
0b
0D
0D]
e
«1
J
k
L
4.32
5.33
0.76
0.41
0.48
5.31
5.84
4.S2
4.95
2.54 BSC
1.27BSC
0.92
1.17
0.72
1.22
12.70
-
0.170
0.210
0.030
0.016
0.019
0.209
0.230
0.178
0.195
0.100 BSC
0.050 BSC
0.036
0.046
0.028 rb.048
0.5DO
-